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sc_markt
04-15-1990, 11:12 PM
Last year, after the new powermacs were introduced at MWNY, I noticed a reference to DDR-SDRAM on the Apple store web site. It was when you clicked continue 2 times and got to the last page with the summary. This is where it mentioned DDR-SDRAM. I took a screen shot so I would have a record of the price.

I'm wondering if they were going to use DDR but changed their minds at the last minute and the person in charge of updating the store forgot to remove it.

If I knew how to paste the picture in with this post, I would.

- Mark

watanabe
02-01-2002, 07:46 PM
Bad topic name...
Anyway I was just reading my new macaddict(March/02) and got to the ads. OWC has is advertising:
*NEW* DDR MEMORY
Double Data Rate Rame for the 2002 Apple PowerMacs
128MB.....$CALL
256MB.....$CALL
512MB.....$CALL

Just thought it was an interesting little tidbit of info. I know it's probably just speculation on their part that we will finally get better subsytems, but it's still interesting none the less.

applenut
02-01-2002, 07:52 PM
I guess even resellers didn't think Apple would be stuck with SDRAM at this time.

Junkyard Dawg
02-01-2002, 09:35 PM
You should have named this thread, "CONFIRMED: NEW POWERMACS TO SHIP WITH DDR RAM MOBO!!!"

That would have been cool! huh, huh, he he , huh, huh, yeah, ddr RAM rules! :p

qazII
02-02-2002, 09:45 AM
Bumping back to the top. This thread was pushed to the bottom as a reply was added to it when the AI clock was somehow set to April 15/16, 1990.

watanabe
02-02-2002, 12:24 PM
yeah, but it's not really solid info :p just some *small* retailer making a guess.. least that's what I think.

Powerdoc
02-02-2002, 03:00 PM
Well we can say that there is DDR ram clocking at 500 mhz in the dual GHZ powermac.
Of course it's only a L3 cache but with a memory bandwitch up to 4 GByte per second.
I think that we will never see DDR ram mobo in a G4 for this reason.
Because the architecture of the memory of the new G4 is different of an architecture of Athlon or P4, it has a very efficient L3 cache system, that can make useless the use of a DDR memory instead SDRAM memory.

I think it will be of the greatest interest to see comparision between a G4 800 with L3 cache with the new G4 without L3 cache. Unfortunately, the too chips are slighty different and the old G4 800 has the old version of the L3 cache.

Is there anyone on AI ready to bet with me that the L3 cache brings the same amount of extra performance than the use of DDR ram ?

BobtheTomato
02-02-2002, 04:35 PM
Stupid question
I saw on another thread that the Top of the line GeForce 4 has a 660 Mhz memory clock. Why isn't this memory clock speed available for main system memory? If you could run the mmory bus at 600 Mhz it seems like you would oupace any current DDR solution.

Powerdoc
02-02-2002, 04:39 PM
[quote]Originally posted by BobtheTomato:
<strong>Stupid question
I saw on another thread that the Top of the line GeForce 4 has a 660 Mhz memory clock. Why isn't this memory clock speed available for main system memory? If you could run the mmory bus at 600 Mhz it seems like you would oupace any current DDR solution.</strong><hr></blockquote>
are you sure to be in the right topic

Telomar
02-02-2002, 04:54 PM
Interesting article on the future of PC2700 DDR memory.

<a href="http://www.theinquirer.net/01020204.htm" target="_blank">DDR RAM</a>

RazzFazz
02-02-2002, 09:42 PM
[quote]Originally posted by powerdoc:
<strong>
Because the architecture of the memory of the new G4 is different of an architecture of Athlon or P4, it has a very efficient L3 cache system, that can make useless the use of a DDR memory instead SDRAM memory.
(...)
Is there anyone on AI ready to bet with me that the L3 cache brings the same amount of extra performance than the use of DDR ram ?</strong><hr></blockquote>

This is wishful thinking.

An L3 cache is only ever of any use with data that get's used more than once, which specifically is not the case with most multimedia data.

There are cases where L3 + SDR is faster than DDR alone, but there are a lot of others where this is not so.

And, given OS X's memory requirements, it would probably fall into the second category unfortunately.

Bye,
RazzFazz

RazzFazz
02-02-2002, 09:48 PM
[quote]Originally posted by BobtheTomato:
<strong>Stupid question
I saw on another thread that the Top of the line GeForce 4 has a 660 Mhz memory clock. Why isn't this memory clock speed available for main system memory? If you could run the mmory bus at 600 Mhz it seems like you would oupace any current DDR solution.</strong><hr></blockquote>

For one, this most definitely is DDR memory at 330MHz (and they just give the "effective" MHz number, as everyone seems to do). Furthermore, frequencies as high as those rule out the use of socketed memory modules (i.e. the chips have to be soldered directly onto the board, with minimal circuit lengths). This is kinda undesirable for main memory, since RAM is probably most frequently upgraded.

Bye,
RazzFazz

Programmer
02-02-2002, 11:52 PM
[quote]Originally posted by powerdoc:
<strong>Is there anyone on AI ready to bet with me that the L3 cache brings the same amount of extra performance than the use of DDR ram ?</strong><hr></blockquote>

It depends on what you're doing, powerdoc. If you have a program that has to touch each pixel of a 100 megabyte image or movie exactly once, then your vaunted L3 cache will do nothing for you. On the other hand, if you have a 2 megabyte image that you will be touching repeatedly, then it will make a much bigger difference than DDR.

I agree that having a faster L3 cache makes a big difference, but that doesn't mean that DDR RAM won't deliver a performance benefit as well. Consider what happens when the L3 cache fills up with modified data and then you need to make room for a new piece of data... some old data from the cache must be written back to the main memory. With DDR RAM this takes half as long.

Programmer
02-02-2002, 11:54 PM
[quote]Originally posted by BobtheTomato:
<strong>Stupid question
I saw on another thread that the Top of the line GeForce 4 has a 660 Mhz memory clock. Why isn't this memory clock speed available for main system memory? If you could run the mmory bus at 600 Mhz it seems like you would oupace any current DDR solution.</strong><hr></blockquote>

The problem is that the current G4's bus is limited to 64-bits x 133 MHz, non-double pumped. This means that super fast memory couldn't get data into the processor any faster than 133 MHz SDRAM.

Programmer
02-02-2002, 11:57 PM
[quote]Originally posted by Telomar:
<strong>Interesting article on the future of PC2700 DDR memory.

<a href="http://www.theinquirer.net/01020204.htm" target="_blank">DDR RAM</a></strong><hr></blockquote>

Interesting blurb, and it should demonstrate why we'll probably never see a PowerMac of any sort with 333 MHz DDR RAM. The next widely available standard is probably going to be DDR-II, and Apple will likely stick to the widely available standards.

Spart
02-03-2002, 01:48 AM
I think Apple will skip DDR entirely and go to the next best thing for the PowerMacs. Just speculation, I know nothing, but Apple likes to adopt things before PCs do (USB, Firewire, SuperDrive, etc.)., not after ("We missed the boat entirely" (refering to optical drives). The last thing they are going to want to do is go and say "Hey, we finally got there too!".

Programmer
02-03-2002, 07:46 AM
[quote]Originally posted by Spart:
<strong>I think Apple will skip DDR entirely and go to the next best thing for the PowerMacs. Just speculation, I know nothing, but Apple likes to adopt things before PCs do (USB, Firewire, SuperDrive, etc.)., not after ("We missed the boat entirely" (refering to optical drives). The last thing they are going to want to do is go and say "Hey, we finally got there too!".</strong><hr></blockquote>

Possibly -- DDR-II is coming. The only complication is that memory is expensive until it reaches widespread adoption, so this would cut into their margins.

Junkyard Dawg
02-03-2002, 08:41 AM
Maybe Apple will stick with sdRAM far into the future,

"The DDR RAM myth: why two heads are better than one, and why a Powermac with sdRAM is actually3 times faster than a PC with ddr RAM. It's a myth that memory bandwidth or speed has any affect on system performance, what really matters is that powermacs use a special kind of RAM that is actually faster, because it has two brains instead of one brain. The RAM with the most brains is always the fastest".

he he, I like the two brains are better than one slogan, Apple should make a myth out of it.

Programmer
02-03-2002, 10:04 AM
[quote]Originally posted by Junkyard Dawg:
<strong>Maybe Apple will stick with sdRAM far into the future,

"The DDR RAM myth: why two heads are better than one, and why a Powermac with sdRAM is actually3 times faster than a PC with ddr RAM. It's a myth that memory bandwidth or speed has any affect on system performance, what really matters is that powermacs use a special kind of RAM that is actually faster, because it has two brains instead of one brain. The RAM with the most brains is always the fastest".

he he, I like the two brains are better than one slogan, Apple should make a myth out of it.</strong><hr></blockquote>

Heh, where'd you get that crap? Its total bunk.

RazzFazz
02-03-2002, 08:36 PM
[quote]Originally posted by Programmer:
<strong>
Heh, where'd you get that crap? Its total bunk.</strong><hr></blockquote>

There's actually some truth to it - think memory bank interleaving.

Bye,
RazzFazz

Outsider
02-03-2002, 10:41 PM
Would memory bank interleaving have the same bandwidth as DDR-SDRAM? Say 4 slots that you upgrade 2 at a time. It still doesn't solve the bandwith to CPU problem though, unless MPX supports 128bit in the 745X series and i think it only has 64 bit support in those processors. But the spec is there to make 128bit MPX.

Programmer
02-03-2002, 11:26 PM
There are a whole pile of PC chipsets to choose from, and there are remarkable performance differences between them even with the same kind of memory. Several of them deliver substantially better performance than the Apple chipset is even theoretically capable of. The Apple chipset delivers remarkably close to the theoretical memory speed these days, but it is still well behind the good PC DDR & RAMBus chipsets. By no stretch of the imagination can it be considered three times as fast!

It also doesn't use a "special kind of RAM", do any bank interleaving, or anything else mystical to somehow beat the PC. This is just wishful thinking... and even if Apple built a super memory subsystem, it still couldn't push data into the processor any faster because of the 64-bit MPX bus on the current processors. I really hope the next processor corrects this problem, but for that we have to wait for the next processor.

RazzFazz
02-05-2002, 05:16 AM
[quote]Originally posted by Programmer:
<strong>By no stretch of the imagination can it be considered three times as fast!

It also doesn't use a "special kind of RAM", do any bank interleaving, or anything else mystical to somehow beat the PC.
</strong><hr></blockquote>

Oops, guess my reply was kinda misunderstandable.

I was just trying to say that something like "two brains are better than one" in regard to memory could well be possible in future hardware designs by use of memory bank interleaving (and it is already true for dual channel rambus systems).

I never intended to say Apple did any of this in their current lineup, and sure of course it wouldn't give a 3x speed increase either, it just fits the "two brains" analogy.

Bye,
RazzFazz

RazzFazz
02-05-2002, 05:19 AM
[quote]Originally posted by Outsider:
<strong>Would memory bank interleaving have the same bandwidth as DDR-SDRAM? Say 4 slots that you upgrade 2 at a time.
</strong><hr></blockquote>

Yes, that's the point of doing it. :)


[quote]<strong>It still doesn't solve the bandwith to CPU problem though, unless MPX supports 128bit in the 745X series and i think it only has 64 bit support in those processors.</strong><hr></blockquote>

Of course. As stated above, I wasn't trying to say that interleaving was done on current hardware, and sure as hell beefing up the FSB would be a prerequisite to use it.


[quote]<strong>But the spec is there to make 128bit MPX.</strong><hr></blockquote>

I read that several times now, but only on rumour sites - does anyone have a link that proves this is more than a rumour?

Bye,
RazzFazz

Amorph
02-05-2002, 05:24 AM
[quote]Originally posted by Programmer:
<strong>It also doesn't use a "special kind of RAM", do any bank interleaving, or anything else mystical to somehow beat the PC. This is just wishful thinking... and even if Apple built a super memory subsystem, it still couldn't push data into the processor any faster because of the 64-bit MPX bus on the current processors. I really hope the next processor corrects this problem, but for that we have to wait for the next processor.</strong><hr></blockquote>

OTOH, Apple could go to "dual channel" SDRAM, with each bank feeding half of the 128-bit variant of the MPX bus... but what are the odds? :)

DDR II <a href="http://www.ebnews.com/digest/story/OEG20010625S0104" target="_blank">looks promising</a>, but it also looks like it's not coming to 2003.

Hmm.

That dovetails with some estimates for the ETA of the G5. And the G5 has been rumored to ship with a 400MHz (effective) bus - DDR II starts at 400MHz.

Food for thought, I suppose.

[ 02-05-2002: Message edited by: Amorph ]</p>

RazzFazz
02-05-2002, 08:27 AM
[quote]Originally posted by Amorph:
<strong>
OTOH, Apple could go to "dual channel" SDRAM, with each bank feeding half of the 128-bit variant of the MPX bus... but what are the odds? :)
</strong><hr></blockquote>

Well, depends on whether you can find a G4 somewhere that actually supports 128 data lines... :)

Bye,
RazzFazz

ThinkingDifferent
02-05-2002, 10:31 AM
I wouldn't be surprised if Apple with RAMBUS. :eek:

Outsider
02-05-2002, 11:13 AM
Neither would I. Say what you want about rambus the company but the technology is sound. One you get past the initial latency it's very fast and on par with DDR pricing now.

Powerdoc
02-05-2002, 04:09 PM
[quote]Originally posted by Outsider:
<strong>Neither would I. Say what you want about rambus the company but the technology is sound. One you get past the initial latency it's very fast and on par with DDR pricing now.</strong><hr></blockquote>
The rambus technology is now nature, it was not in the beginning , but it's still more expansive than DDR ram (in France , i don't know the prize of the US market).
Rambus also, is not a standart, you can bet you will see Apple jump drectly to Quaddata rate ram. 133 mhz *4 equal 533 mhz : isn't it impressive ?

timortis
02-05-2002, 07:02 PM
[quote]Originally posted by Programmer:
<strong>

Heh, where'd you get that crap? Its total bunk.</strong><hr></blockquote>

Take it easy, JD was just being sarcastic. He's just spoofing the total bunk that's "the megahertz myth" the way Apple presents it.

Whisper
02-06-2002, 02:00 PM
[quote]Originally posted by RazzFazz:
<strong>

Well, depends on whether you can find a G4 somewhere that actually supports 128 data lines... :)

Bye,
RazzFazz</strong><hr></blockquote>

Would a dual G4 count?

RazzFazz
02-06-2002, 09:05 PM
[quote]Originally posted by Whisper:
<strong>
Would a dual G4 count?</strong><hr></blockquote>

No, 'cos there's only one 133MHz 64bit MaxBus connecting the processor module to UniNorth, which is shared by both processors.

Bye,
RazzFazz

Whisper
02-07-2002, 02:09 AM
[quote]Originally posted by RazzFazz:
<strong>

No, 'cos there's only one 133MHz 64bit MaxBus connecting the processor module to UniNorth, which is shared by both processors.

Bye,
RazzFazz</strong><hr></blockquote>

Does it absolutely have to be that way, or it that just how Apple happens to be doing it now?

Outsider
02-07-2002, 02:21 AM
It's the nature of an MPX bus. It's a bus, not point-to-point.

RazzFazz
02-07-2002, 09:25 PM
[quote]Originally posted by Whisper:
<strong>
Does it absolutely have to be that way, or it that just how Apple happens to be doing it now?</strong><hr></blockquote>

That's how the G4 and MaxBus were designed to work.

You might be able to give every processor his own individual front side bus (by means of a northbridge with two separate MaxBuses), but this would basically be nothing short of a hack, very difficult to implement, and most likely completely infeasible. Infact, it would probably be even slower than the current, shared bus architecture, because of lack of support for cache coherency and snooping across the buses. Thus, you'd have to go through main memory instead, and that's orders of magnitude slower.

Bye,
RazzFazz

[ 02-07-2002: Message edited by: RazzFazz ]</p>