Apollo 7460 vs. 7450(51)

blizaineblizaine
Posted:
in Future Apple Hardware edited January 2014
Ok, ever since the info started "leaking" about the G5 from MOSR, The Register, ext... I got my hopes way up there (as, I'm sure, most of yours are/were).



Now that the school of thought is that the G5 is not coming, I want to have a little more reasonable expectations and excitement for MWSF 2002.



Anyone care to describe the differences between the announced Apollo (7460) and the current G4?

- Altivec? - 4 units in 7460? Is this the same as the current G4?

- SOL and 20-30% speed increase? Is that per clock-cycle (i.e. ?theoretically? a 867Mhz 7460 is 30% faster than 867Mhz 7451)?

- Any other differences worth mentioning?



Thanks, I guess I'm just looking for something to be excided about come MWSF in the Pro line-up.



I would ask about DDR and bus rates but I don't think anyone knows what Apple will actually do regarding this, right?



Later,

Blizaine

Comments

  • Reply 1 of 18
    outsideroutsider Posts: 6,008member
    If we get the 7460 then I hope the bus is wider/faster. 133MHz@64bit is too slow for a modern workstation. Should be either 133x4 or use a 200MHz bus double pumped. That's faily easy to implement. Now if only the 7460 had a built in memory controller...



    The 7450 was said to have 4 Altiven units. I think they merely mean the 4 units that make up the main Altivec unit. Marketing people are not the most technically savvy people.



    SOL and 20-30% speed increase? Is that per clock-cycle (i.e. ?theoretically? a 867Mhz 7460 is 30% faster than 867Mhz 7451)



    Nope, it means actual MHz improvements. So a 30% increase to 866MHz would be 1,126MHz. If you use 1GHz as a base number (since there must be quite a few of them made just not used in Apple machines) then it's 1.3GHz. As you can see, the G4 needs more than SOI for real speed increases. It needs a 130nm process so we could probably see those 1.2-1.6GHz speeds. On a 7 stage pipeline that would be quite a feat.
  • Reply 2 of 18
    franckfranck Posts: 135member
    [quote]Originally posted by Blizaine:

    <strong>Ok, ever since the info started "leaking" about the G5 from MOSR, The Register, ext... I got my hopes way up there (as, I'm sure, most of yours are/were).



    Now that the school of thought is that the G5 is not coming, I want to have a little more reasonable expectations and excitement for MWSF 2002.



    Anyone care to describe the differences between the announced Apollo (7460) and the current G4?

    - Altivec? - 4 units in 7460? Is this the same as the current G4?

    - SOL and 20-30% speed increase? Is that per clock-cycle (i.e. “theoretically” a 867Mhz 7460 is 30% faster than 867Mhz 7451)?

    - Any other differences worth mentioning?



    Thanks, I guess I'm just looking for something to be excided about come MWSF in the Pro line-up.



    I would ask about DDR and bus rates but I don't think anyone knows what Apple will actually do regarding this, right?



    Later,

    Blizaine </strong><hr></blockquote>



    Altivec is the same as every &gt; 500MHz G4 sold by Apple (PPC7450). The all have 4 altivec units ( In fact, it's one altive engine with four units: float,simple, complex,permute)



    IIRC,the PPC7400 only has one altivec engine with 2 units, complex and permute.[not sure about details]



    It's not SOL but SOI: Silicon on insulator. This process reduces electrical loss during operation of the microproessor. So the processor will either:

    - run at higher frequencywith the same electrical and heat dissipation

    - run at the same frequency, requiring less current and producing less heat.

    So, SOI will permit a 20-30% speed increase while the processor will clock 20-30% higher.



    AFAIK, PPC7460 = PPC7450 + SOI



    You can find details at <a href="http://e-www.motorola.com/webapp/sps/site/taxonomy.jsp?nodeId=03M943030450467M98653"; target="_blank">Moto's site</a>.



    [ 12-06-2001: Message edited by: Franck ]</p>
  • Reply 3 of 18
    razzfazzrazzfazz Posts: 728member
    [quote]Originally posted by Outsider:

    <strong>If we get the 7460 then I hope the bus is wider/faster. 133MHz@64bit is too slow for a modern workstation. Should be either 133x4 or use a 200MHz bus double pumped.</strong><hr></blockquote>



    Sure, 200MHz x2 would be sweet, but keep in mind you also need memory that's able to deliver data fast enough - current DDR-RAM is 133MHz x2 (though some chipsets already support 166MHz x2).





    [quote]<strong>That's faily easy to implement.</strong><hr></blockquote>



    *cough* yeah, that probably explains why everybody has already implmented it. Oh wait...





    [quote]<strong>The 7450 was said to have 4 Altiven units. I think they merely mean the 4 units that make up the main Altivec unit. Marketing people are not the most technically savvy people.</strong><hr></blockquote>



    Well, technically, the 7450 *does* have 4 AltiVec (execution) units: Vector Float, Vector Int Simple, Vector Int Complex and Vector Permute.

    You can't blame Motorola or Apple for the fact that popular rumor mills led their readers into believing the 7450 would have four times the AltiVec units of the 7400.



    Bye,

    RazzFazz



    [ 12-06-2001: Message edited by: RazzFazz ]</p>
  • Reply 4 of 18
    powerdocpowerdoc Posts: 8,123member
    [quote] 7460?

    - SOL and 20-30% speed increase? Is that per clock-cycle (i.e. ?theoretically? a 867Mhz 7460 is 30% faster than 867Mhz 7451)?

    ) [/QB]<hr></blockquote>

    you are reffering to the new chip from IBM the PPC 750 fx (specification on the IBM site) which is suppose to go 25 % faster at equal speed.



    The 7460 is a SOI 7450 with improvements in the gestion of the memory. (new memory bus, or better gestion of the cache : difficult to say)
  • Reply 5 of 18
    blizaineblizaine Posts: 239member
    thanks for the good info guys.



    I feel a tad bit smarter now
  • Reply 6 of 18
    matsumatsu Posts: 6,558member
    They really need to shrink the die size on 7460, no question. What are they going to use for their laptops if they don't? IBM will deliver a 1Ghz PPC part on a 4 stage pipline. With SOI and the smaller .13u process, it manages to run a big 512KB on-die cache and yet still be very efficient and cool. It also supports a 200Mhz FSB. That 4 stage pipe sounds awfully short; even without Altivec this ought to be an interesting performer. I'm thinking it might even be faster than the current G4's in many tasks. IBM claims it will scale to 2Ghz by the end of 2002. Interesting. The only omission seems to be the lack of Altivec or similar SIMD unit, for which details are sketchy. Some IBM statements indicate that Sahara does indeed have Altivec like enhancements, others claim it has no SIMD unit, still others say that IBM will implement it's own Altivec type unit in SaharaII, scheduled for release at the end of 2002.



    Moto needs to supply something big. If not a G5, then a much improved G4. The only reason the 7440 runs cool enough in a laptop is they striped out half the cache. They don't have a suitable laptop chip without both a smaller process, and SOI. They could probably get by with a smaller cache (to shrink the die) but this would be a neutered chip compared to a full spec 7460.



    What will Apple do if for the first half (or so) of 2002 they have better G3's than G4's??? Especially for the laptop space? Where the Sahara seems ideally suited.



    [ 12-06-2001: Message edited by: Matsu ]</p>
  • Reply 7 of 18
    blablablabla Posts: 185member
    [quote]Originally posted by Matsu:

    <strong> IBM will deliver a 1Ghz PPC part on a [b]4 stage[ 12-06-2001: Message edited by: Matsu ]</strong><hr></blockquote>



    Actually.. its 5 stages.
  • Reply 8 of 18
    matsumatsu Posts: 6,558member
    Still quite intriguing. I'd like to see how it performs next to a pentium 3/4. The power consumption is insanely low, I think the IBM press release of a few weeks ago said it would consume around 3 watts at 800Mhz. That'd make a pretty damn good iBook chip.



    [ 12-06-2001: Message edited by: Matsu ]</p>
  • Reply 9 of 18
    marcukmarcuk Posts: 4,442member
    Altivec has 4 execution units as previously stated, the difference between the 7400 and 7450 is that the 7450 can dispatch 2 instructions for processing at the same time (as long as they go to different ex units) while the 7400 sends only one.
  • Reply 10 of 18
    daverdaver Posts: 496member
    So the 7460 is:



    (a) 7450 with SOI

    (b) 7450 on a smaller process with SOI

    (c) 7450 with SOI and fast bus support

    (d) 7450 with SOI, on a smaller process and with fast bus support



    What's the deal? I'd really appreciate it if someone would clear this up!



    Could someone post a link to IBM's 750FX specs?
  • Reply 11 of 18
    sc_marktsc_markt Posts: 1,402member
    According to the Register, one of the differences in the Apollo is that it will have a 256 bit wide internal bus.



    Here is the link for more information.



    <a href="http://www.theregister.co.uk/content/39/23192.html"; target="_blank">http://www.theregister.co.uk/content/39/23192.html</a>;
  • Reply 12 of 18
    heinzelheinzel Posts: 120member
    The press blurb for the PPC750FX is here:

    <a href="http://www-3.ibm.com/chips/news/2001/1017_750fx.html"; target="_blank">http://www-3.ibm.com/chips/news/2001/1017_750fx.html</a>;
  • Reply 13 of 18
    rickagrickag Posts: 1,626member
    Or



    So the 7460 is:



    (a) 7451 with SOI

    (b) 7451 on a smaller process with SOI

    (c) 7451 with SOI and fast bus support

    (d) 7451 with SOI, on a smaller process and with fast bus support



  • Reply 14 of 18
    razzfazzrazzfazz Posts: 728member
    [quote]Originally posted by sc_markt:

    <strong>According to the Register, one of the differences in the Apollo is that it will have a 256 bit wide internal bus.</strong><hr></blockquote>



    And what exactly do they mean by "internal bus"?



    (BTW: The 7450 already has 256 bit wide paths to its L1 caches according to the moto website)



    Bye,

    RazzFazz
  • Reply 15 of 18
    stimulistimuli Posts: 564member
    They mean the bus at which the L2 (on-die, running at core speed, 256KB) 'speaks' to the processor.
  • Reply 16 of 18
    bernardbernard Posts: 59member
    I read the 750fx would use 1.2v on 1Ghz thats gona be a kick ass ibook chip(or ti book). with a full 256bit 512k , 4 stage, 1Ghz-should cream a desktop running any G4&lt;1.2Ghz on non altivec apps.
  • Reply 17 of 18
    thttht Posts: 5,525member
    <strong>Originally posted by Matsu:

    They really need to shrink the die size on 7460, no question. What are they going to use for their laptops if they don't?</strong>



    That's what is Apple going to use for their laptops. Motorola as far as I know is not in the PC business anymore



    The die size of the 7460 will be shrunk if the 7460 is a HiP 7 (Moto's 0.13u, SOI, low-k dielectric process) chip. There's just a new conflicting rumor from Maccentral and The Register that the 7460 is a HiP 6 (0.18u) + SOI chip.



    <strong>IBM claims it will scale to 2Ghz by the end of 2002. Interesting.</strong>



    Always read the fine print or bad news at the end of press releases. IBM's PR on the 750fx says:



    Select customers are currently evaluating the hardware with general sampling available in January of 2002. The PowerPC 750FX is planned to initially debut at 700 MHz, with versions at speeds up to 1 Ghz later that year.



    IBMspeak for dates are notoriously early. They invented the preemptive vapor product release after all (and for which they were under antitrust litigation for years).



    The "debut at 700 MHz" statement may very well mean the 750fx will only debut at 700 MHz in January of 02. Being optimistic, I wouldn't expect anything higher than an 850 MHz PPC 750fx in Q1 02. A 1 GHz 750fx will probably be shipped Q3 02. They did nearly the exact same thing with the PPC 750cx/cxe press release.



    <strong>Moto needs to supply something big. If not a G5, then a much improved G4. The only reason the 7440 runs cool enough in a laptop is they striped out half the cache.</strong>



    The MPC 7440 has everything the 7450 has except for backside cache tags (and therefore lacks backside cache). So a 7440 and a 7450 without backside L3 cache are for all intents and purposes the same chip performance-wise.



    It runs cool because it operates at 1.5V compared to the 7450's 1.8/1.9V internal core voltage. Decreases in power consumption goes by the square of the voltage [ratio] decrease.



    <strong>They don't have a suitable laptop chip without both a smaller process, and SOI. They could probably get by with a smaller cache (to shrink the die) but this would be a neutered chip compared to a full spec 7460.</strong>



    If the 7460 is a HiP 7 chip, it'll have a smaller die, consume less power, and clock above 1 GHz.



    <strong>What will Apple do if for the first half (or so) of 2002 they have better G3's than G4's??? Especially for the laptop space? Where the Sahara seems ideally suited.</strong>



    It is yet to be proven that Sahara will be clocked higher or be faster than any Moto 74xx when it is released.



    The 750fx may not even be clocked higher than 733 MHz when it is released in January 02. The advantage of 512 KB of on-die L2 compared to 256 KB of on-die L2 also isn't as great as one would think.



    [ 12-09-2001: Message edited by: THT ]</p>
  • Reply 18 of 18
    powerdocpowerdoc Posts: 8,123member
    Is there any people here, to say that the Appolo chip will be called the 7460 ?



    The fact that the chip will be called 7460 means very little change , perhaps just the Fab process on hip 7 (0,13 SOI ).

    Renember, the only difference between a 7410 and a 7400 is the watt consomption (because of the better fab process of the 7410).

    The 7450 was much more different, so why not called the Appolo chip, the 7500 ?
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