Intel to ship 45-nanometer chips in 2007
Intel in the second half of 2007 will begin commercial shipments of the first PC processors based on a 45 nanometer (nm) manufacturing process, the company said this week.
On Wednesday the company demonstrated what is says is the first fully functional SRAM (Static Random Access Memory) chips using 45nm process technology, its next? generation, high?volume semiconductor manufacturing process. According to a company statement, the chip has more than 1 billion transistors.
Though not intended as an Intel product, the SRAM chip demonstrates technology performance, process yield and chip reliability prior to ramping processors and other logic chips using the 45nm manufacturing process. "It is a key first step in the march toward high?volume manufacturing of the world?s most complex devices," the company said.
Achieving this milestone means Intel is on track to manufacture chips with this technology in 2007 using 300mm wafers, and continues the company?s focus on pushing the limits of Moore?s Law, by introducing a new process generation every two years.
Today, Intel leads the industry in volume production of semiconductors using 65nm process technology, with two manufacturing facilities making 65nm chips in Arizona and Oregon and two more coming online this year in Ireland and Oregon.
"Being first to high volume with 65nm process technology and the first with a working 45nm chip highlights Intel?s leadership position in chip technology and manufacturing," said Bill Holt, vice president, general manger, Intel Technology and Manufacturing Group. "Intel has a long history of translating technology leaps into tangible benefits that people appreciate. Our 45nm technology will provide the foundation for delivering PCs with improved performance?per? watt that will enhance the user experience.?
Intel?s 45nm process technology will allow chips with more than five times less leakage power than those made today, the company said. This will improve battery life for mobile devices and increase opportunities for building smaller, more powerful platforms.
In addition to the manufacturing capabilities of its D1D facility in Oregon, where the initial 45nm development efforts are underway, Intel has also announced two high?volume fabs under construction to manufacture chips using the 45nm process technology: Fab 32 in Arizona and Fab 28 in Israel.
On Wednesday the company demonstrated what is says is the first fully functional SRAM (Static Random Access Memory) chips using 45nm process technology, its next? generation, high?volume semiconductor manufacturing process. According to a company statement, the chip has more than 1 billion transistors.
Though not intended as an Intel product, the SRAM chip demonstrates technology performance, process yield and chip reliability prior to ramping processors and other logic chips using the 45nm manufacturing process. "It is a key first step in the march toward high?volume manufacturing of the world?s most complex devices," the company said.
Achieving this milestone means Intel is on track to manufacture chips with this technology in 2007 using 300mm wafers, and continues the company?s focus on pushing the limits of Moore?s Law, by introducing a new process generation every two years.
Today, Intel leads the industry in volume production of semiconductors using 65nm process technology, with two manufacturing facilities making 65nm chips in Arizona and Oregon and two more coming online this year in Ireland and Oregon.
"Being first to high volume with 65nm process technology and the first with a working 45nm chip highlights Intel?s leadership position in chip technology and manufacturing," said Bill Holt, vice president, general manger, Intel Technology and Manufacturing Group. "Intel has a long history of translating technology leaps into tangible benefits that people appreciate. Our 45nm technology will provide the foundation for delivering PCs with improved performance?per? watt that will enhance the user experience.?
Intel?s 45nm process technology will allow chips with more than five times less leakage power than those made today, the company said. This will improve battery life for mobile devices and increase opportunities for building smaller, more powerful platforms.
In addition to the manufacturing capabilities of its D1D facility in Oregon, where the initial 45nm development efforts are underway, Intel has also announced two high?volume fabs under construction to manufacture chips using the 45nm process technology: Fab 32 in Arizona and Fab 28 in Israel.
Comments
Originally posted by Zandros
Is it much harder to translate directly to 32 nm, or is this just a case of making more money by slowing development down?
Are you kidding? Trolling maybe?
Originally posted by Zandros
Is it much harder to translate directly to 32 nm, or is this just a case of making more money by slowing development down?
Every step towards 0.01 nm is just Intel trying to make more money...
to invest in the quest to deliver 0.01 nm chips.
Originally posted by onlooker
Are you kidding? Trolling maybe?
What? Now, do not accuse me of that.
It was a serious question. I understand that the development of new gate lengths cost money, but I wanted to know if it was significantly more expensive to directly translate to 32nm rather than 45nm. Because it is possible, right? Or do I misunderstand your reaction?
Anyway, this is a good reminder that there's ALWAYS something better coming. Whatever cool thing is on the horizon, if you wait and buy it, there will be something else on the horizon already.
Originally posted by nagromme
I think the surprise just came from how difficult it has been for companies to get to 65nm. That makes it surprising to think they can easily skip to 32. (I don't think they can.)
Anyway, this is a good reminder that there's ALWAYS something better coming. Whatever cool thing is on the horizon, if you wait and buy it, there will be something else on the horizon already.
this is why you should only upgrade when you REALLy need to.
Originally posted by Zandros
What? Now, do not accuse me of that.
It was a serious question. I understand that the development of new gate lengths cost money, but I wanted to know if it was significantly more expensive to directly translate to 32nm rather than 45nm. Because it is possible, right? Or do I misunderstand your reaction?
Die shrinks create require navigating a thicket of problems, from design and material processes to outfitting fabs and getting reasonable (profitable) yields. All of it is fraught with peril and very expensive.
Chip manufacturers use the lessons learned and the infrastructure build-out at each level to facilitate the transition to the next. Trying to jump a level is just as likely and doable as abruptly doubling the clock speed of your CPU offerings.
A good sign.
Of course, Intel does seem to be having some chip shortages at present. Of course, everyone making laptops probably wants the Duo's so the demand is pretty high.
Originally posted by aplnub
Why are Fabs located in Israel? Is that a second silicon valley, or great tax advantages, or just coincidence?
Probably a combination of a lot of scientists/engineers, tax cuts and a welcoming public all in one place.
Originally posted by aplnub
Why are Fabs located in Israel? Is that a second silicon valley, or great tax advantages, or just coincidence?
So we can have funny names for our processors, like Yonah and Merom. I'm hoping for a quad-core 45 nm Yitzhak.
Originally posted by BRussell
So we can have funny names for our processors, like Yonah and Merom. I'm hoping for a quad-core 45 nm Yitzhak.
All part of the long march to the .01 nm Bupkis.
Originally posted by aplnub
Why are Fabs located in Israel? Is that a second silicon valley, or great tax advantages, or just coincidence?
The Pentium M core, on which Core Solo/Duo are heavily based, was designed by Intel's Israel design center. I'm not sure if the Fab preceded the design center, or was a thank-you for them saving Intel's bacon from the P4 fires.
Originally posted by aplnub
Why are Fabs located in Israel? Is that a second silicon valley, or great tax advantages, or just coincidence?
Intel has actually been doing business in Israel for a long time. I think their first overseas fab was Fab 8 in Jerusalem. Israel is a very high-tech country and it's especially strong in computer science (RSA and PHP come out of Israel for example). It has the highest ratio of engineers per capita in the world so there's tremendous talent and the government is really eager to attract foreign investment because the economy has been depressed because of the conflict. I think they gave Intel $5+ billion in tax breaks to build the new fab.
Originally posted by ukieboarder
Will this new 45-nanometer chip make the MacBook Pro (with Merom) in September 2006 obsolete, because I am waiting for 2nd revision macbook pro with merom and because I dont want rev A. and because I can wait till Sept. but I cant wait for 2007. I am planing on keeping this computer for 3-4 years.
Intel is back to pushing Moore's law to the limits, so with Apple along with the flow of course the 45nm chips will make the MBP rev.B obsolete. But if you wait and wait, you'll never get one. I'm waiting for the rev.B to come out, because more 3rd party programs will be universal.
Intel Sossaman CPU is expected to be released in H1 2006. Sossaman is the Xeon processor based around a 65nm Yonah core. Sossaman is a low power processor, with the 2Ghz revision having a TDP of 31W, with the 1.67Ghz LV version having a TDP of just 15W.
Intel Celeron M 4xx (Yonah) series is expected to be released in Q2. The Celeron M 4xx series is based on a single core version of Yonah featuring 1MB L2 cache, a 533FSB, and no EIST support.
Intel 945GMS chipset for Yonah is expected to be released in Q2. Based on the Calistoga chipsets, the 945GMS will feature a 667Mhz FSB, and single channel DDR2-533 memory interface.
Intel 940GML chipset for Yonah is expected to be released in Q2. Based on the Calistoga chipsets, the 940GML will feature a 533Mhz FSB, and single channel DDR2-400 memory interface.
Intel E7520 (Blackford) chipset for Dempsey, forming the Bensley platform, is expected to be released in Mid 2005. Blackford features dual independent front side busses, allowing 17GB/s of bandwidth between the two cores, and a quad channel FB-DIMM memory controller supporting up to 64GB of memory. This chipset is also expected to feature support for a 1066Mhz FSB speed, Intel's I/O acceleration, Intel Virtualisation Technology (formally Vanderpool) Intel Active Management technology and PCI Express
Intel Merom Mobile processor, the successor to Jonah and part of the Santa Rosa platform, is expected to be released in September on a 65nm process. Merom is a Dual Core CPU combining the architecture of NetBurst and the Pentium-M to achieve both high performance and lower power consumption. Merom utilises the FSB and EM64T of NetBurst, but is largely based around the Pentium M architecture. The CPU is a 4-issue design (compared to the 3 issue cores of the Athlon 64 and Pentium 4 architectures) with a 14 stage pipeline - significantly shorter than that of NetBurst CPUs (from 20 in Willamette to 31 stages in Prescott). The shorter pipeline will ensure that Merom and it's derivatives will not clock as high as Precott, but it will likely clock as fast or faster than the Athlon 64 - i.e. around 3Ghz. However, the IPC of Merom is likely to be better than the Athlon 64 due to it's 4 issue superscalar design and vastly better than the P4.
Merom will feature 4MB of L2 cache shared between the two cores and will feature a direct L1 to L1 cache transfer system between the L1 caches of each of the cores to improve performance. Merom will also feature a number of enhances prefectching schemes to enhance the use of the caches. Merom is expected to launch at a clock speed of 2.33Ghz.
Intel Crestine-GM (Crestline?) chipset for Merom is expected to be released in Q3. Crestine-GM is part of the Santa Rosa platform and is expected to support an 800Mhz FSB speed, DDRII 800 SDRAM and PCI Express. Crestine is expected to interface to ICH8-M, featuring support for Serial ATA 300, and the Golan2 / Annadel wireless chipset supporting 80211a/b/g and 11n WiMax.
Intel Xeon DP (Woodcrest) processor is expected to be released in H2. Woodcrest is the successor to Dempsey, but is based on the Conroe core. Woodcrest is expected to have 8MB of L2 cache and feature Intel's Dual Independent Bus system. The Processor Side Bus for Woodcrest is expected to be clocked at 1333Mhz.
Intel Millville desktop CPU is expected to be released in Q1 2007. Millville is expected to be a single core version of Allendale, containing 1MB of L2 cache.
Intel Kentsfield desktop CPU is expected to be released in Early-Mid 2007. Kentsfield is expected to be a quad core CPU contained in a multi-chip package (i.e. 2 Dual Core CPUs in a single package). Kenstfield is expected to feature 4MB of L2 cache.
Intel Stealey mobile CPU is expected to be released in Mid 2007. Stealey is expected to be a single core budget CPU featuring 512KB of L2 cache.
Intel Penryn mobile CPU is expected to be released in H2 2007 on a 45nm process. Penryn is the successor to Merom / Gilo and is expected to be a dual core CPU based on a 45nm process and containing either 3MB or 6MB of L2 cache.
Intel Yorkfield desktop CPU is expected to be released around 2009. Yorkfield is expected to be based on a 45nm process and contain 8 CPU cores in a multi die package. Yorkfield is also expected to contain 12MB of shared L2 and may comprise of 4xWolfdale chips in a single package.
Intel 32nm process is expected to come online in 2009.
Intel 22nm process is expected to come online in 2011.