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Posts by pats

Seems like a perfect fit for Apple's datacenters. SSD has much faster speed and low power consumption.
Gazoobee Then maybe you should buy a stylus like this http://adonit.net/jot/touch/ Here's a news flash, there are a number of 3rd party stylus for the iPad.
The panel was rumored to use a PET based film touch layer with the lamination down by TPK. Double sided ITO (DITO) on film to replace one layer of glass. We still don't know the backplane could be A-Si, LTPS or IGZO. The power consumption looks great for the size of the screen with a battery rated at 16 Watt Hrs. The Nexus 7 claims 8hrs with the same size battery.
You are correct although some of the standard libraries might contain Samsung IP, the bigger issue IMO with dual sourcing the A6 at 28NM is Samsung is using Gate First process and TSCM is using Gate Last. This will require two separate design flows, which while not impossible the spacing and design rules would not be the same so I put the rumor in the crazy category. I would expect maybe Samsung does a die shrink on the A5 for the lower end devices if Apple moves to a...
Interesting time as we move from circuit switched to packets for the mobile networks and as the carriers continue to argue how they will do SMS & MMS for LTE as well as basic voice, Apple has a solution for IOS waiting in the wings. It would-be a simple matter to pay the carrier networks for that last mile data network and the Apple service can provide the connection to the old POTS and carrier network and let the rest ride on the cloud.
I think your optimistic on Nvidia's timeline for Kal-el. The first silicon was shown at MWC in Feb. So it won't likely be in a shipping product in June. More likely late 2011. I would expect Apple to have an A6 design based on Samsung's 32/28nm process for 2012 which will provide plenty of power and reduce power consumption. Apple has implemented dynamic frequency and voltage clocking and a wider memory bus then Nividia so that contributed to the increased die size...
There are tons of power savings techniques and and the frequency scaling to the task is just an enhancement from last generation. The A5 most likely also puts unused cores to sleep otherwise their is no way to get the same battery life. For tasks that can be shared across cores the task finishes quicker and then the core sleeps until the next task. This can be done very fast. Also with OpenCL and Grand Central Dispatch, Apple has provide the tools to increase...
Sorry wasn't really clear and missed the graphic which listed the package size and answered my question. The actual dimension of the POP package is what Apple needs to find room for on the iPhone 5 board. The POP is now rectangular. The old A4 was a 14.1 x 14.1 square the new 14.3 x 16.7 rectangle so they can still fit the 14.3 and clear out for 2.6mm of board space on one side. I agree with changing the display size is unlikely but I think they can fit the new POP by...
Why do you discard the larger display when reputed engineering drawings are making the rounds? Also I missed the package size difference. The die is much larger for the A5, but some of the difference can be made up in the POP. Do we have the size of the packaging? As far as pricing, Apple is buying from the foundry and someone like MOTO is buying from Nvidia which is buying from the foundry so I think their price estimates for Tegra 2 are suspect. The silicon and...
That is pretty generalized statement to make about dual core . The reality is slightly different. The A9 has more advanced power management capability so for a task which can be optimized for a multicore you can save power by shutting down a core or moving into a sleep state quicker after completing the task. The A9 instruction pipeline is different then the A8 and allows out of order processing so most tasks will complete faster at the same clock even on the same...
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