Intel to grow next-gen notebook chip offerings

[AppleInsider]

Intel Corp. plans to extend its upcoming Montevina platform to include two new classes of chips that will allow system manufacturers like Apple to build a variety of new and low-power notebook systems, according to a published report.

Due to hit the open market in June, the fifth-generation Centrino platform and Santa Rosa successor has long called for four classes of notebook chips, including a high-performance X-class, a standard T-class, a low-voltage L-class, and an ultra-low voltage U-class.

However, DigiTimes in a report published Friday claims the chipmaker will tack on a new P-class for power-optimized energy-efficient high-performance notebook systems that will sport a thermal design power (TDP) between 20-29 watts.

Additionally, the publication's sources say the Santa Clara-based firm will also add an S-class of microprocessors which will include a smaller package size aimed at small form factor products. The S-class will further be broken down into three segments -- SP, SL and SU -- which will sport TDP ranges of 20-29W, 12-19W , and 11.9W, respectively.

Traditionally, Apple has adopted chips from Intel's T-class of notebook processors for its MacBook lines. Chips in that class currently have a TDP of approximately 35W, including an upcoming array of first-gen Penryn chips destine to make their way into the Mac maker's mid-Winter notebook lineup.

When it arrives in June, Montevina will serve as the foundation for the second generation 45-nanometer notebook processors detailed above and also feature a faster 1,066MHz front-side bus and support for DDR3 memory.

[ View this article at AppleInsider.com ]

[JeffDM]

Is there really a need to have so many power grades? That's 8 steps between and including 10W to 35+W, whatever the X class is supposed to consume.

[shanmugam]

everyone is interested to know when Apple starts using "E" series ...

disgruntled xMac user

[zunx]

Great! Give me fanless bedroom-quiet Macs! Besides handheld Macs with full Mac OS X 10.5.1 inside.

[heffeque]

Originally Posted by AppleInsider

and support for DDR3 memory.

DDR3 consumes less than DDR2 so... good :-)

[NarutoSasuke]

Is Montevina the platform that Nehalem is supposed to run off of? I remember seeing some posts in all the CES news about Montevina, but I thought that was for MID and UMPC's... this is starting to get confusing since Intel has been branching out so much.

[TB6387]

Originally Posted by NarutoSasuke

Is Montevina the platform that Nehalem is supposed to run off of? I remember seeing some posts in all the CES news about Montevina, but I thought that was for MID and UMPC's... this is starting to get confusing since Intel has been branching out so much.

If I'm not mistaken, similar to the the transition between Santa Rosa and Penryn, Montenvina is the optimization of Penryn, 45 nm, and Nehalem is the die shrink of Montenvina from 45nm to 32nm.

[mjteix]

Originally Posted by TB6387

If I'm not mistaken, similar to the the transition between Santa Rosa and Penryn, Montenvina is the optimization of Penryn, 45 nm, and Nehalem is the die shrink of Montenvina from 45nm to 32nm.

Not quite.
Santa Rosa and Montevina are chipsets/platforms.
Penryn is the 45nm shrink of Core 2 XXXX.
Nehalem will be a new Core still at 45nm with integrated memory controller and more.
Montevina will support new penryn chips (1066FSB, new P-type voltage, new SP, SL, SU small packages, and THE quad...).

History:
Core Duo/Solo + Napa chipset (667FSB) *original MBP, MB, iMac, Mac mini
Core 2 Duo (64 bits) + Napa chipset (667FSB) *Merom MBP, iMac and later MB and Mac mini
Core 2 Duo/800 + Santa Rosa chipset (800FSB) *Latest MBP, iMac, and recenty MB
Penryn/800 + Santa Rosa chipset (800FSB) *Could be announced at MWSF (MBP, iMac)
Penryn/1066 + Montevina chipset (1066FSB) *Could be announced at WWDC (MBP, iMac, MB, Mac mini)
Mobile Nehalems will be announced mid-2009 with dedicated chipsets (new core & architecture) could be announced at WWDC 2009

Hope this clarifies a little