or Connect
AppleInsider › Forums › Mac Hardware › Future Apple Hardware › UMA3, HyperTransport, and RapidIO
New Posts  All Forums:Forum Nav:

UMA3, HyperTransport, and RapidIO

post #1 of 11
Thread Starter 
What of UMA3? Wasn't this supposed to be the DDR/PCI-X platform we all waited for in the pre-AI blackout? It seems kind of antiquated now. The new paradigm in chipsets is integration! And the roadmap is all different now. In the past it was straight foward: you would have a processor that connected to a PCI/memory controlled dubbed 'northbridge' which in turn connected to the PCI bus, memory (RAM), and peripheral controller (aka southbridge). Now it's a bit complicated; we have a CPU connecting to a system controller that may or may not be PCI 32/64, and the CPU has a direct connection to RAM and on top of that the North and southbridge seem to have combined and, and.... man is this complicated. And now we have a RapidIO and HyperTransport conflict. What will Apple use and how? Maybe they will use both. What direction do you think Apple is heading towards?
post #2 of 11
[quote]Originally posted by Outsider:
<strong>What of UMA3? Wasn't this supposed to be the DDR/PCI-X platform we all waited for in the pre-AI blackout? It seems kind of antiquated now. The new paradigm in chipsets is integration! And the roadmap is all different now. In the past it was straight foward: you would have a processor that connected to a PCI/memory controlled dubbed 'northbridge' which in turn connected to the PCI bus, memory (RAM), and peripheral controller (aka southbridge). Now it's a bit complicated; we have a CPU connecting to a system controller that may or may not be PCI 32/64, and the CPU has a direct connection to RAM and on top of that the North and southbridge seem to have combined and, and.... man is this complicated. And now we have a RapidIO and HyperTransport conflict. What will Apple use and how? Maybe they will use both. What direction do you think Apple is heading towards?</strong><hr></blockquote>

Regarding RapidIO and HyperTransport, I'm virtually certain that they'll use both. See <a href="http://forums.appleinsider.com/cgi-bin/ultimatebb.cgi?ubb=get_topic&f=1&t=000010" target="_blank">this thread</a> for why. I'm also confident that it will use DDR memory. Among other reasons, Rambus is a proprietary, single-company, product. I think with Apple's well publicized parts shortages for some of their high-end products, they won't go that route again. As for PCI-X, is the spec for that even finalized yet? If so, I expect to see it. If not, I hope that they'll upgrade the current slots from 33MHz to 66MHz. I would also like to see eight interleaved memory slots. I don't know the technical details of doing this, but I know that if they did the same way I would, it would give up to 8x the memory bandwidth (depending on how many slots are filled and how much data you manipulate at a time) without really affecting the latency. Did I leave anything out?
post #3 of 11
Hence UMA2? What we got wasn't UMA 2, it was 1.5.

All those specs you listed are correct and will be a big part of the architecture for the PowerPC 8500.
~Winner of the Official 2003 AppleInsider NCAA Men's Basketball Tournament Pool~
Reply
~Winner of the Official 2003 AppleInsider NCAA Men's Basketball Tournament Pool~
Reply
post #4 of 11
Who knows what the MPC85XX series is being used for, it certainly doesn't look like your run-of-the-mill network processor.

RapidIO
DDR-333
DMA
Giga-E
PCI-X

all on chip.

Weird.
I can change my sig again!
Reply
I can change my sig again!
Reply
post #5 of 11
That is wierd. It almost looks like it's designed to be the hub in a hub-and-spoke architecture. You just hang an ASIC "northbridge" off the RapidIO bus - with USB and FW and IDE - and you've got a PC.

Absent a "northbridge" this looks to my untrained eye to have "router" written all over it.
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
Reply
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
Reply
post #6 of 11
Note the SoC sprinkled liberally around the 8540 page. System on a Chip. It's the big thing now of days but I have no clue what they are used for. Some embedded purpose I'm sure.
post #7 of 11
Thread Starter 
I think SoC is the future of ALL systems, be them routers, PDAs, computers, microwave ovens... it's the eventual evolution. In the old days the FPU was seperate from the CPU. They were later integrated. Same with L1, L2, cache. PCI and memory controller compined on one chip. Apple integrates the firewire and ethernet controller on the northbridge. It's all leading there anyway.
post #8 of 11
Can someone explain this stuff to me? AI's been gone so long I haven't kept up on future technologies.
post #9 of 11
[quote]Originally posted by Outsider:
<strong>I think SoC is the future of ALL systems, be them routers, PDAs, computers, microwave ovens... it's the eventual evolution. In the old days the FPU was seperate from the CPU. They were later integrated. Same with L1, L2, cache. PCI and memory controller compined on one chip. Apple integrates the firewire and ethernet controller on the northbridge. It's all leading there anyway.</strong><hr></blockquote>

Integration can be a great thing for performance and simplicity. But you give up flexibility every time you integrate more features. Every time a new technology comes out you will have to redesign the entire chip instead of just one small component of a larger system. This is why SoC works great for embedded systems but I think you won't see a full scale adoption come as quickly in the PC market. (although we do now have the nForce chipset and soon AMD will incorporate a memory controller onto their cpu, getting closer)
post #10 of 11
[quote]Originally posted by Eskimo:
<strong>Integration can be a great thing for performance and simplicity. But you give up flexibility every time you integrate more features. Every time a new technology comes out you will have to redesign the entire chip instead of just one small component of a larger system.</strong><hr></blockquote>

Couldn't you just redesign that one small part of the chip? I know it's a bit more complicated than that, but it seems like on a well laid out chip it shouldn't be that much of an issue.
post #11 of 11
Thread Starter 
I think the way they are designing the chips makes it easy to update just one part of it, for example replacing the firewire 800 core with the 1600 core. If you look at the die up close you'll see a basic seperation on die that makes it easy to modify the chip. this would be an ideal solution for Apple since they already have total control over their systems and OS. For someone like Dell who don't even make their own motherboards a more external component solution is easier. Same for Mobo makers like Asus and Abit; they rely on Intel, VIA, AMD, etc. for chipsets and have no control over the features and must design around them. Advantage? Apple. But Apple is lagging in key areas like RAM support and I think they need to devote more resources to the internal technologyg versus the 'external' like snazzy new cases and non essential markets.
New Posts  All Forums:Forum Nav:
  Return Home
  Back to Forum: Future Apple Hardware
AppleInsider › Forums › Mac Hardware › Future Apple Hardware › UMA3, HyperTransport, and RapidIO