All I said was that if the controller had a few simple DSP instructions on board to do transformations on the data coming from memory, it might be possible to sniff out those instructions and divert them, if the DSPs understood a subset of AltiVec instruction set. Why a subset? Because they're not going to have the full capability of AltiVec, but if they recognize the same instructions, no custom instructions have to be generated, either by the programmer or by the compiler, and the additional hardware will be transparent.
<strong>Heh, you know not what you ask.</strong><hr></blockquote>
No, I do, sort of. I knew it would require an instruction decoder in the memory controller.
I was trying to think of ways to make the little DSPs transparent.
At this point, I've come to the conclusion that there are too many reasons why it couldn't happen. But it was a fun thought experiment.
[quote]<strong>I'm not familiar with their architecture, but I suspect it is quite different than a "little DSP in the memory controller". There are very cool things that can be done by auxilary processors, and it would be cool if Apple was actually doing something like this... but I doubt it.
The bus you're refering to is MicroChannel?</strong><hr></blockquote>
No, it was called the Channel architecture, and as far as I can recall it predates the personal computer revolution. MicroChannel was a scaled-down version for the PC which was utterly doomed when that became a commodity market. I don't know the exact details, but several of the people I work with programmed Channel architectures back in the day, and it was capable of some powerful stuff. Not just Boolean logic. A (very simple) DSP would be in line with what it could do.
[quote]<strong>Now, if the memory controller and CPU would do some kind of data compression before putting the data on the bus, that would effectively increase memory bandwidth and would definitely be "worth it". That's not likely to happen on MPX.</strong><hr></blockquote>
No, but it would be nice. The biggest disadvantage I can think of is increased latency. That, and performance would vary significantly based on how well the data compressed at any given moment, which might yield some odd results.
That would work for me. As nifty as a dedicated DSP on the memory controller might be in theory, it has a good chance of getting orphaned, like the DSP in the old AV series. Or IBM's ill-starred MicroChannel architecture.
<strong>Exactly... and it means Apple (and maybe one or two 3rd parties) will spend programming resources code a few things up for it, whereas they could instead be doing cool things that will work on all AltiVec-equipped PowerPCs going forward.</strong><hr></blockquote>
Apple could get around that by putting them in every single memory controller they shipped, across all models. Then it would be something like Quartz Extreme, that kicked in if you had the proper hardware, and was translated and handled by the CPU if it wasn't there. That way Apple would work around the problem that killed the AV DSP (shipping in exactly two expensive models for a couple of years), and the one that killed MicroChannel (relevance, incompatibility in a commodity market).
This is not the first time something like this has come up. The "Raycer chip," "QuickTime-on-a-chip," and various rumors about dedicated MPEG acceleration have all pointed this way for a couple of years now. That could mean that where there's smoke, there's fire; or it could mean that where there appears to be smoke, there's a lot of hot air.
I have my reservations about auxiliary processors, though. They've done well in the embedded market, and in big iron, but they have a poor track record in personal computers.
[quote]<strong>Ah well, hopefully they at least go to the 166 MHz MPX, DDR333.</strong><hr></blockquote>
I wouldn't complain.