What the heck does all this mean;
"One of Denver’s architectural quirks involves dynamic code optimization, a computing technique that hearkens back to the days of Transmeta, a high-profile startup that also used code interpretation and optimization in the early 2000s. But Transmeta failed in part because it simply couldn’t deliver the performance that customers expected, which Boggs ascribed to the “cliff” between natively executed code and what was interpreted. (Intel and AMD, among others, also quickly ramped up the performance of their own mobile chips to compensate.)
Denver solves that problem, Boggs said, by having a much more powerful hardware platform to run non-native code, however inefficiently. It also waits until a core sits idle to begin the code translation process, and it includes new low-power states beyond what the 32-bit K1 itself offers.”The issues you saw with Transmeta devices you won’t see with Tegra,” he said.
The Denver chip includes a 128KB, 4-way level 1 instruction cache, a 64KB, 4-way level 2 data cache, and a 2MB, 16-way level 2 cache, all of which can service both cores. Denver also sets aside 128MB of main memory as an interpretation cache, that the main operating system won’t be able to see or access."
Well their claiming it will be twice as fast as the 32bit model, which is already a screamer in it's own right, twice as fast is unlikely but if it reaches 1.5 times the speed, then they will defiantly have a hit on their hands. We'll just have to wait until someone sticks it into something.
Update: Aaaahhh, okay, now it's starting to make sense as to why they went in this direction.
"As part of the Dynamic Code Optimization process, Denver looks across a window of hundreds of instructions and unrolls loops, renames registers, removes unused instructions, and reorders the code in various ways for optimal speed. This effectively doubles the performance of the base-level hardware through the conversion of ARM code to highly optimized microcode routines and increases the execution energy efficiency.
The slight overhead of the dynamic optimization process is outweighed by the performance gains of already having optimized code ready to execute. In cases where code may not be frequently reused, Denver can process those ARM instructions directly without going through the dynamic optimization process, delivering the best of both worlds"
- See more at: http://blogs.nvidia.com/blog/2014/08/11/tegra-k1-denver-64-bit-for-android/#sthash.udp6pcfq.dpuf
If it actually works then we're defiantly looking at potential i3 speeds on a ARM chip, the current 32bit model is already reaching Celeron territory, though it's the GPU 3D Mark scores that are crazy awesome, 2722 overall, I ran the test myself, that's insane. Still skeptical about the 64bit chip though, we need a development board, let's go Nvidia, clock be ticking.
Edited by Relic - 8/12/14 at 6:11pm