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post #121 of 376
Quote:
Originally posted by Tomb of the Unknown
Please. You don't rewrite your OS and tell all your developers they have to rewrite their software to support a highly parallel achitecture just because you want a low power laptop.

What you are proposing would have 1 scalar integer, 1 scalar FPU and 1 SIMD. Not very well balanced. Four of them would just mean you're compounding the imbalance by a factor of four.

Wrong again. Not only will ALL Macs look like this in 5 to 10 years, but Apple has told developers to re-optimize (NOT rewrite - existing software would still work but slower - have a look at DrangonFlyBSD sometime) their software over and over again, with each leap forward in computing architecture. Apple is the only desktop computer maker that can and does succeed in this too.

Barto
Self Indulgent Experiments keep me occupied.

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Self Indulgent Experiments keep me occupied.

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post #122 of 376
Thread Starter 
Tomb, this is just beginning of mac's cell based future.

they can implement MPI early, and mac developer will also kno that future desktop will also have it

PowerPC 970 is like 60 watts. good luck putting that in laptop

each APU has two FPU and one VMX. I think it would be obvious to you with the 11.2GFlop DP performance total.
post #123 of 376
Quote:
Originally posted by Barto
You are dead wrong, my friend.

I don't think so.
Quote:
What is biting the bullet? Biting the bullet is recognising that CPUs can't keep getting hotter and using more power indefinitely, and finding a new way. That new way is increasing-parallel computing using small, extensible and fast chips like the 440 and the Crusoe.

No, that would be the old way. Neither the 440 or the Crusoe are new.
Now if you were talking about something like a chip capable of reversable computations, I'd say that would be something new. But 4 440's on an MCM?

It is to laugh.
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #124 of 376
Thread Starter 
it is a new way. the old way is the 970. it has already be done similar with processor like the Pentium and athlon.

the new way is using many low power core
post #125 of 376
Quote:
Originally posted by Tomb of the Unknown
No, that would be the old way. Neither the 440 or the Crusoe are new.
Now if you were talking about something like a chip capable of reversable computations, I'd say that would be something new. But 4 440's on an MCM?

So Cell is just the old way?

That's an honest question. Because what this all is is the adoption of the architecture that IBM has quite forthrightly said is the future, and IBM is building it around the 440 family, literally.

No, it's not an entirely new paradigm, like reversible ternary logic, but as a mainstream architecture it's radical enough to be called new, and feasible enough not to be a pipe dream.

At least as far as Apple's concerned (i.e., in terms of personal computer architecture), the old way involves a single CPU that does as much of the heavy lifting as possible, and Apple's already moving away from that.
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post #126 of 376
Quote:
Originally posted by Nr9
Tomb, this is just beginning of mac's cell based future.

Well, it's nice that you think so, but the 440 has nothing, repeat, nothing to do with the cell architecture that IBM, Sony and Toshiba are developing. Which by the way, would be really new if they succeed. (And they may not, there is always a certain amount of risk in these kinds of joint ventures.)
Quote:
they can implement MPI early, and mac developer will also kno that future desktop will also have it

You apparently don't know what MPI is.
Quote:
each APU has two FPU and one VMX. I think it would be obvious to you with the 11.2GFlop DP performance total.

Sorry, missed that. So each 440 will have a 440 FPU2 and a VMX unit? Heh. So much for your low power implementation.

I still have problems with this whole concept. No, sorry, I don't think so. Your calculation is based on a 700 Mhz clock which is at the upper limit for the 440GX. It's doubtful that the short pipelines in the 440 will clock that high, not for any kinds of realistic yields anyway.
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #127 of 376
Quote:
Originally posted by Amorph
So Cell is just the old way?

That's an honest question. Because what this all is is the adoption of the architecture that IBM has quite forthrightly said is the future, and IBM is building it around the 440 family, literally.

I'm sorry? Where does this come from? I haven't heard that IBM is basing the cell architecture on their 440 line of chips.
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #128 of 376
Quote:
Originally posted by Tomb of the Unknown
Sorry, missed that. So each 440 will have a 440 FPU2 and a VMX unit? Heh. So much for your low power implementation. .

The transistor count would still be FAR less than, for example, the 970.

Quote:
Originally posted by Tomb of the Unknown
I still have problems with this whole concept. No, sorry, I don't think so. Your calculation is based on a 700 Mhz clock which is at the upper limit for the 440GX. It's doubtful that the short pipelines in the 440 will clock that high, not for any kinds of realistic yields anyway.

The 440 won't scale because it has a short pipeline? WTF? The G4+ has seven stages. The G3 has 4 and it goes to 1GHz or so. Not only is the pipeline not that big a deal, but IBM's chip fabs will surely help it scale.

Barto
Self Indulgent Experiments keep me occupied.

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Self Indulgent Experiments keep me occupied.

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post #129 of 376
Link to Blue Gene/L.

"The supercomputer has 1,024 cell processors on 512 chips"

"IBM's PowerPC microprocessors will serve as basic building blocks. In contrast to microprocessors for personal computers, however, IBM believes that future machines will be powered by many processors that work together like bees in a hive."
Self Indulgent Experiments keep me occupied.

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Self Indulgent Experiments keep me occupied.

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post #130 of 376
Thread Starter 
Cheap small core like 440 is a step toward the cell base computing.

I know what MPI is. you will see. wait for next year.

440 FPU2 and VMX is not that high power.

you can have all your problems you want with this concept, but try not to turn it into a battlefront-esque discussion.

you will see next year.
post #131 of 376
Quote:
Originally posted by Tomb of the Unknown
I'm sorry? Where does this come from? I haven't heard that IBM is basing the cell architecture on their 440 line of chips.

The articles on Blue Gene/L, actually, have mentioned that it's part of their Cell project. Perhaps they're wrong?

I'm curious about what Cell is based on, if not the 400 series, since that's not at all a bad place to start given the nature of the project, and given IBM's fondness for reusing cores (c.f. the POWER series), and also given the 440's flexibility and extensibility. The whole point, as I understand it, is to use lots of low-power chips in a cluster arrangement. The claims I have seen made about Cell utterly discount the 970 or any of its kin...
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post #132 of 376
Quote:
Originally posted by Barto
Link to Blue Gene/L.

"The supercomputer has 1,024 cell processors on 512 chips"

"IBM's PowerPC microprocessors will serve as basic building blocks. In contrast to microprocessors for personal computers, however, IBM believes that future machines will be powered by many processors that work together like bees in a hive."

I repeat. Where has IBM said they are basing the cell architecture on the PPC 440?
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #133 of 376
Quote:
Originally posted by Tomb of the Unknown
I repeat. Where has IBM said they are basing the cell architecture on the PPC 440?

Where have they said what they are basing it on? I'm more interested in positive information than claims that absence of evidence is evidence of absence.
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post #134 of 376
Quote:
Originally posted by Amorph
The whole point, as I understand it, is to use lots of low-power chips in a cluster arrangement. The claims I have seen made about Cell utterly discount the 970 or any of its kin...

Absolutely. But it's also based on improved chip to chip (or core to core, depending on how you want to look at it) communications. I think cell will be very different from the 440. It may not even be PPC.

The idea behind cell is a kind of computational mesh, a fabric of cores if you will. The 440 is just another "core on a bus" SoC design.

And yes, 7 stages is short, depending on other features. The 440GX is only rated to 650 Mhz at the top end. IBM may well be able to ship a 700MHz version, since their roadmap calls for it to scale up to 800MHz, but then, the roadmap has the 750GX at up to 1.1 GHz and I don't see any 1.1GHz iBooks. (Yet.)

But again, that's the top end. Where do you go from there, even if you can get there in the first place?
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #135 of 376
Thread Starter 
deleted because redundant*
post #136 of 376
Quote:
Originally posted by Amorph
Where have they said what they are basing it on? I'm more interested in positive information than claims that absence of evidence is evidence of absence.

http://www-1.ibm.com/mediumbusiness/...rging/sti.html
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #137 of 376
Quote:
Originally posted by Nr9
the Blue Gene is a demonstration of the viability of cell technlogy using 440 cores.

No, it most certainly is not. It is a demonstration of how to build a supercompter from embedded CPUs.
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #138 of 376
Thread Starter 
tomb, that is the specific processor they codenamed Cell

Cell computing is a concept. It is beginning to surface in prototypes of the Blue Gene using 440 cores.
post #139 of 376
Thread Starter 
why dont you do a google for Blue Gene and cell
post #140 of 376
Quote:
Originally posted by Tomb of the Unknown
http://www-1.ibm.com/mediumbusiness/...rging/sti.html

From that:

Quote:
Sony and Toshiba and IBM (STI) announced that they had teamed up to design an architecture for what is termed a system-on-a-chip (SoC) design. Code-named Cell, chips based on the architecture will be able to use ultra high-speed broadband connectivity to interoperate with one another as one complete system, similar to the way neural cells interoperate over the brain's network.

So, uh, we have SoC chips connected in a high-speed fabric to operate as a complete system. This is different from the technology under discussion in what way? And this rules the 440 (or a similar technology) out how?

The page is long on marketing and short on detail, but:

Quote:
IBM has an unmatched history and capability of building custom chips and believes the one-size-fits-all model of the PC does not apply in the embedded space; embedded applications will require a flexible architecture, like Cell.

Cell also brings together, for the first time, many leading-edge IBM chip technologies and circuit designs developed for its servers.

Again, this looks a lot like what we're talking about: The 440 is the basis for any number of custom chips; it's an embedded CPU, which Cell is explicitly using here; it's a flexible, extensible architecture; and not only is it bringing in leading edge technologies and designs, this thread adds more: L2 as a prefetch cache for L3 and the MCM.

Sorry, but after reading that, the 440 looks even more likely as a candidate, or at least as a core from which IBM will develop Cell.
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post #141 of 376
Quote:
Originally posted by Nr9
Cell computing is a concept. It is beginning to surface in prototypes of the Blue Gene using 440 cores.

No, cellular computing is a concept. One that has been around for some time.

You are conflating cellular computing with the cell architecture that STI are researching, that's all.
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #142 of 376
Thread Starter 
cell is short for cellular

the STI cell architecture is not revolutionary. it is same thing as cellular computing
post #143 of 376
Hmm. Apparently 440's only go up to 600Mhz (am I wrong?) If they beef 'em up to 800Mhz by the launch, having 4 will result in impressive performance:
100%
+24%
124%
+21%
145%
+18%
163%.
In hard-scale,
100%
+30%
130%
+26%
156%
+22%
178%
But...
100%
+8%
+6%
+5%
119%. In apps such as Office and Stuffit when not doing two things. And that's optimistic; in real life, possibly 110%. Then again:
100%
+38%
+32%
+15%
185%
Multitasking. Why the sudden decrease for the 4th processor? Because users are not that likely to be performing 4 tasks at once, compared to how often they will perform 2 or 3 at once. But 185% is very impressive. So what's the average?
About 150%. Very impressive. It's worth noting that a dual processor setup's 20-37% improvement pales in comparison to the 60-85% improvement of quad processing. BUT, a 50% percent improvement (considering many apps aren't optimized for MP and have a very slight increase only) means you get only 1200Mhz equivalent. How is this equivalent to a 2Ghz G5 (single)? Unless either MP is better then I thought or the processing architecture is better then I thought, it looks it like it will barely match a G4, much less a G5! Even if we get lucky and get, say, 1400Mhz G5 performance, why bother? By late 2004 (which one said was the expected ship date,) we'd probably have 90nm G5's (the other style) and they might run at up to 1600Mhz in PowerBooks. Why bother with this tech so early on, when it will take until a time when a G5/1.6 for laptops is likely to be out?
These are mostly guesses.
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post #144 of 376
Thread Starter 
the programming model will be differenet. those number are meaningless
post #145 of 376
Quote:
Originally posted by Tomb of the Unknown
the roadmap has the 750GX at up to 1.1 GHz and I don't see any 1.1GHz iBooks. (Yet.)

That's because the iBook uses a G4+, not a 750GX, Mr. I Live Under A Rock.
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post #146 of 376
Quote:
Originally posted by Nr9
the programming model will be differenet. those number are meaningless

Oh.
Trainiable is to cat as ability to live without food is to human.
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post #147 of 376
Those sort of questions are good, because we really do have options now. I'm not willing to discount Cooligy's technology in concert with a 900-series processor (if not a 970 - IBM did say it was the first in a family). Even the big, hot 970 can adjust both its clock frequency and its core voltage as power saving measures, which are both crucial for notebook use.

Motorola has discussed a "high performance PowerPC" to be released next year, as well as batting around dual-core CPUs and memory controllers on die outside their 85xx series, and Crolles is coming online soon. Since every day is Pick On Motorola Day, I'm punting this low on the likelihood scale, despite the fact that most of this information comes directly from Motorola executives. It actually gained credibility in my sight when our front page reported it.

Then there's this. I know I've been a fairly tenacious defender of the idea, but that's mostly because of the alternatives, it's the one with the broadest implications, and it does seem to dovetail nicely with Cell, even if it is not exactly Cell (maybe Apple is playing with 440 cores in order to test the software side of the technology?). It's interesting, and it's made me play with OmniGraffle, and although there are obvious problems with this direction, there are obvious advantages, especially if you look forward.

I'm still interested in how Cell is unlike the 440 core.
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post #148 of 376
Nr9 is right, those numbers are meaningless. The user performing three tasks does NOT mean that only three CPUs are used, because almost any task can be subdivided into further tasks. A Cell-Style PowerBook would be a swift kick to the bum of developers to get them to increase the efficiency of their applications using multithreading, or possibly message-parsing (depending on how this pans out).

This whole concept (two twin core SoC chips on an MCM) seemed ridiculous to me when I first saw it, but looking at it objectively, it is difficult to find anything fundamentally wrong with it.

Barto
Self Indulgent Experiments keep me occupied.

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post #149 of 376
Well we already have the G5 whcih at the rate things are going will be deployed as SMP based machines by a very large percentage. Then we have to consider that Apple was multithreading things for a very long time and has considerable experience here.

Then we have the reality that 4X SMP type machines are coming, either with 4 distinct processors or via SMT equivalents or both. So similar hardware will be on the desktop sooner or later. Then the reality that XServes have been delayed much longer than required, so somethng is up there. This all adds up to interesting times ahead.

Quote:
Originally posted by Barto
Anyone else thinking a WWDC introduction?
post #150 of 376
I tend to agree, if we don't get quite what is described here we may very well get dual G4's on a die with a built in memmory interface. And if not a Motorola G4 maybe a follow on to IBM's 750 series.

Lets face it by the time the 970 is slowed enough and has other power savings measures taken it won't seem that fast. Now consider that Apple would not be using the same exact 440 that currently is on the market then you have open ended capabilities. That is it is very likely that Apple has used 400 series variants already for prototyping, how they would extend the chip is a bit of a mystery. Nothing described by Nr9 is impossible but that does not mean that it is the track that will be finally taken. Only time will tell.

What apple delievers in the future will probally be decide by a number of factors. Performance will only be one of them. But I do believe that if Motorola was suddenly able to deliver a single chip dual processor, with a combination of good performance and low power usage Apple would implement it. Any other machine delivered is likely to see a processor that may possibly be based on a combination of the 440 and 750 series

Thanks
Dave



Quote:
Originally posted by Barto
Nr9 is right, those numbers are meaningless. The user performing three tasks does NOT mean that only three CPUs are used, because almost any task can be subdivided into further tasks. A Cell-Style PowerBook would be a swift kick to the bum of developers to get them to increase the efficiency of their applications using multithreading, or possibly message-parsing (depending on how this pans out).

This whole concept (two twin core SoC chips on an MCM) seemed ridiculous to me when I first saw it, but looking at it objectively, it is difficult to find anything fundamentally wrong with it.

Barto
post #151 of 376
See, this is why I prefer AppleInsider Forums Future Hardware, as opposed to Arstechnica OpenForum BattleFront...

Even though there may be (serious) contention as to the reliability of the original poster, we can move beyond that & discuss a truly interesting concept in the future of mobile computing...

But know this Nr9, failing any positive proof towards your general wrongness of this subject before Winter 2004; any 'delay' in this project beyond your projected timeframe will thrust you directly into the same niche as kormac, kim kap sol, etc.

Many will slander you, many will shun you, some may worship you; most will not even remember...

I, for the time being, choose to exercise a decidedly reserved belief...
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post #152 of 376
One minor point: the thread discussing this in Ars is a Mac Ach thread, not a Battlefront thread.

I know cos I started it.

I am a little surprised that it isn't a little more active, though.
post #153 of 376
Quote:
Originally posted by Amorph
Then there's this. I know I've been a fairly tenacious defender of the idea, but that's mostly because of the alternatives, it's the one with the broadest implications, and it does seem to dovetail nicely with Cell, even if it is not exactly Cell (maybe Apple is playing with 440 cores in order to test the software side of the technology?). It's interesting, and it's made me play with OmniGraffle, and although there are obvious problems with this direction, there are obvious advantages, especially if you look forward.

I'm not saying that the approach is wrong in general. Just that Apple is not going to go with 4 440s in a powerbook. Just for the powerbook. It doesn't make sense. The 440 is poorly suited for the application, there's no OS support, and there are more cost effective engineering solutions.
Quote:
I'm still interested in how Cell is unlike the 440 core.

For one thing, SMP. The cell architecture would need to break new ground in interchip communications. In fact it may turn out to have a completely new instruction set. An instruction set designed to take into account the exigencies of a distributed architecture. The problem, as I see it, is latency.

So the question you should ask is: What's the difference between 4-8 cores on a chip and 4-8 seperate chips on a fast bus? That's the difference between cellular computing and the Cell architecture.
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #154 of 376
Quote:
Originally posted by Barto
This whole concept (two twin core SoC chips on an MCM) seemed ridiculous to me when I first saw it, but looking at it objectively, it is difficult to find anything fundamentally wrong with it.

Barto

You're obviously not trying hard enough.
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #155 of 376
Quote:
Originally posted by Barto
That's because the iBook uses a G4+, not a 750GX, Mr. I Live Under A Rock.

Yeah, well, it's still a 7 stage pipeline.

But you're right, I forgot that they moved to the G4. But that doesn't change the fact that the product specs for the 440GX are still listed at 650 MHz at the top end. IBM may ship another version (possibly even the mythical 440VX with altivec) running faster. But it's unlikely you'd see anything faster than 800 MHz without radical changes in the process and the implementation.

Why would Apple jump to a very mature implementation that's at the top end of it's scalability lifecycle for a new Powerbook product? What do they do for speed bumps? Add more cores? No, can't do that cause you'll start hitting the same power/performance curve as the PPC970 because adding more cores adds more transitors (and exponentially increases costs). So what do you do?
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #156 of 376
Quote:
Originally posted by jouster
I am a little surprised that it isn't a little more active, though.

Maybe if you had started your own thread instead of just linking to this one?
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #157 of 376
Thread Starter 
Quote:
Originally posted by Tomb of the Unknown
For one thing, SMP. The cell architecture would need to break new ground in interchip communications. In fact it may turn out to have a completely new instruction set. An instruction set designed to take into account the exigencies of a distributed architecture. The problem, as I see it, is latency.

So the question you should ask is: What's the difference between 4-8 cores on a chip and 4-8 seperate chips on a fast bus? That's the difference between cellular computing and the Cell architecture.

the Cell processor is likely to use MPI instead of SMP, read the goddamned description. u really think that sounds like SMP? i dun want to turn it into a battlefront discussion.. but u kno... thats really gay.

there is no difrence between cellular computing and cellular architecture or cell architecture. the STI Cell is just a single product in the cellular computing paradigm.

Quote:
Originally posted by Tomb of the Unknown
You're obviously not trying hard enough.

you kno.. meaningless one liners like that are really uncalled for. are you from battlefront or something?

Quote:
Originally posted by Tomb of the Unknown
Why would Apple jump to a very mature implementation that's at the top end of it's scalability lifecycle for a new Powerbook product? What do they do for speed bumps? Add more cores? No, can't do that cause you'll start hitting the same power/performance curve as the PPC970 because adding more cores adds more transitors (and exponentially increases costs). So what do you do?

the Book E architecture has lot of life to it. Simply change the cores to newer ones. you wont hit the same performance/power dissipation curve as 970. that is the whole point of using lot of small core instead of big one. the 970 is 60 watts at 2GHz and that isn't peak.

apple can get this done and their future desktop and notebook will be easy, cheap and scaleable. the OS can run a small MPI kernel on each processor and it work together. Future desktops may have 16 or 32 of these grid based cores.
post #158 of 376
Well one thing is rather clear it appears that Apple will have to employ a laptop processor that id based on one or more current designs. I say this because it is fairly clear now that the 970 will not make a viable laptop processor even with a die shrink. The 700 series is a bit dated and would need modifications for vector processing and possibly other usages. Considering this and the fact that the 400 series has been around a bit, you could see Apple and IBM using this as a base for a new processor. Given information floating around that Apple and IBM are wroking on a low power processor it is not unreasonable to suspect that this is a path they are following.

As to the issues of scalability if they can get 10% better performnace clock fo clock then that 800MHz machine would perfrom almost like a 900 MHz placing it fairly close to several Apple machines currently on the market. Considering the process technologies that IBM has available to tap, one could reasonably believe that a new variant of this processor could hit much higher frequencies. One must understand that the 440 series is an embedded processor and as such was designed to meet perfromance specs other than clock rate. In a sense you scale in the same manner as all processor technologies of the past. You shrink the circuitry or improve the circuitry and keep the same basic design. Or you tweak the hardware so that a minmal investment in transistors yields the greast pay off (SMT & Cache). Scalling is a non issue.

Like I said before I don't know what Apple is up to and I don't know if there is any validity to this report. What I do know are described below:

1. Apple has been forced to spend a great deal of effort to optimize its OS and system libraires to support multithreaded operation. It is to the point now that it is very worthwhile to leverage this in new hardware designs.

2. It does not appear that the 970 will be a viable laptop processor anytime soon. Process shrinks or not the market is going to demand good performance and long battery life. Intels Centrino will soon be the benchmark here.

3. There has been little public information with regards to the 700 series. Makes one wonder if IBM punted on this one.

4 Lots of public discussions with respect to dual core G4's coming in the future. This could easyly be an alternative for Apple if the R&D effort around this rumored system fizzles out.

5. SMP systems offer alternative ways to manage power in laptops and other power constrianed PCs.

6. To remain more than competitive Apple will need to cut power usage by more that 1/2. One of the primary motivators behind many Apple laptop purchases has been time on battery for a given size machine. Intel now has machines that exceed what Apple can deliever here.

So given the above, it is very possible that Apple will take drastic action to lower cost and improve power. SOC technology and the low power associated with it are one consideration in reaching this goal. As far as how and R&D effort based on the 400 series translates into a real product we can buy, well that is up in the air. Every indication is that we will most likely see a new family of processors targeted towards laptop usage. Maybe not this year or even early next, but certainly in the future. That such chips may employ SMP and SOC features are very real possibilities. In the end Apple has little choice but to innovate here.

Thanks
Dave


Quote:
Originally posted by Tomb of the Unknown
Yeah, well, it's still a 7 stage pipeline.

But you're right, I forgot that they moved to the G4. But that doesn't change the fact that the product specs for the 440GX are still listed at 650 MHz at the top end. IBM may ship another version (possibly even the mythical 440VX with altivec) running faster. But it's unlikely you'd see anything faster than 800 MHz without radical changes in the process and the implementation.

Why would Apple jump to a very mature implementation that's at the top end of it's scalability lifecycle for a new Powerbook product? What do they do for speed bumps? Add more cores? No, can't do that cause you'll start hitting the same power/performance curve as the PPC970 because adding more cores adds more transitors (and exponentially increases costs). So what do you do?
post #159 of 376
Thread Starter 
Dave, Apple is not only multithreading the OS. they have been working on this for quite a long time and it will take longer:

this is because the PowerBook G5 architecture requires a mini-OS on each core and then link together with message passing, sorta like a mini-cluster. OS X 10.4 is likely to provide functionality. Most of the user interface will be offloaded to the graphics chip. the overall system architecture is very high bandwidth and low latency and that is what make it possible. Some third party work has alraedy been done in this area, and that should help the implmenetation.
post #160 of 376
Quote:
Originally posted by Tomb of the Unknown
Maybe if you had started your own thread instead of just linking to this one?

I did not start my own thread because, as I explained in the Ars one, I am not knowledgeable enough about the field. merely interested. As such, I wanted to bring it to the attention of the Ars community, since there seem to be some clever people there.
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