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post #281 of 376
Quote:
Originally posted by Nr9
xgrid.. hint hint

Hmmm, good point, but again, this is for specialized software that can distribute the calculations across several processors and then join the results. Am I mistaken?
post #282 of 376
Quote:
Originally posted by Nr9
xgrid.. hint hint

I don't get the hint. What on earth does Xgrid have to do with Powerbook G5 and the supposed 4 CPU thingamabob you spoke about at the beginning of this thread?
post #283 of 376
Quote:
Originally posted by Henriok
I don't get the hint. What on earth does Xgrid have to do with Powerbook G5 and the supposed 4 CPU thingamabob you spoke about at the beginning of this thread?

Exactly what I was thinking. What are you saying? Please explain.
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post #284 of 376
IBM, Sony, Toshiba team on processor architecture for broadband

Cell will be fast on its own, exponentially faster on a network with other cell processor based computers (be they workstations, servers, game consoles or laptops thus the hint).

Screed
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post #285 of 376
Heh --- the article seems to echo "Terminator" sentiments ("one massive computer."). Very interesting, though....the plot thickens.
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post #286 of 376
I'm guessing that Nr9's proposed 4 by 440 Powerbook G5 wouldn't use xgrid itself but some more specialized, stripped down version, thus the "hint, hint" comment.

Nr9 - any time frames mentioned by your source, other than 2004?
just waiting to be included in one of Apple's target markets.
Don't get me wrong, I like the flat panel iMac, actually own an iMac, and I like the Mac mini, but...........
just waiting to be included in one of Apple's target markets.
Don't get me wrong, I like the flat panel iMac, actually own an iMac, and I like the Mac mini, but...........
post #287 of 376
If someone is saying there is a quad processor powerbook in the making you have all gone off the deep end.
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post #288 of 376
Hi Guys;

Not to throw more fuel on the fire but IBM is set to announce a new 440 SOC processor on 1/21/2004. Initial indications are that the processor is desinged as a support CPU for servers. Interestingly it is to incorporate a cross bar switch. No mention of any other capabilities have been made but I would imagine that is what the net seminar is for on the 21st.

While I'm still not convinced that Apple will take this direction I'm not at all convinced either that the 970 will ever make it into a laptop this year. So I have to believe that Apple has alternatives to the 970, most likely a conventional CPU but a multiprocessor 440 based machine is still not out of the running. Apple likes to innovate, but I'm not convinced that they will want to diverge that far from the norm, that is a multiprocessor 440 based machine.

What would really be neat is to see a Linux vendor deliver such a machine. Linux is where much of the softwar einnovation comes from these days, it would be nice to see a little hardware innovation coming from there also.

Whatever the case it does look like 2004 is shaping up to be THE hardware year for Apple.

Dave
post #289 of 376
Quote:
Originally posted by wizard69
While I'm still not convinced that Apple will take this direction I'm not at all convinced either that the 970 will ever make it into a laptop this year.

I agree. We have to wait though just to see what's exactly this alleged PowerTune technology.
post #290 of 376
Thread Starter 
Quote:
Originally posted by Henriok
I don't get the hint. What on earth does Xgrid have to do with Powerbook G5 and the supposed 4 CPU thingamabob you spoke about at the beginning of this thread?

because the 440 doesn't support SMP
post #291 of 376
Quote:
Originally posted by Nr9
because the 440 doesn't support SMP

I thought it was already established that each core would run a microkernel (32K?) and use message passing. No need for SMP or hyperthreading.
post #292 of 376
If any of this is true, has anyone come across hints of the 440 deep inside of Panther?
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post #293 of 376
the way i see things logically:
apple has optimized all its core pro applications to run on 64bit. even the new version of Logic Audio is due out soon, optimized for G5, 64bit.apple has a strong market and loyalty in the pro audio area. lotsa peopel here use powerbooks. it would be foolish not to offer 64bit processing here. also the very fact that the iBooks are now G4 mean that there is going to be a significant change of PowerBook chips. maybe not the 970, but who knows whats brewing in the apple labs? i for myself desperately need to replace my aging pismo and am waiting for the next major PowerBook upgrade. cant get a desktop as i am travelling a lot.
post #294 of 376
Whoa, people cool down. This guy (Nr9) is having you on.
The Cell concept calls for linking thousands to millions of SOCs via broadband connections (optical fiber down to cable modem speeds) to distribute unused processing power wherever it is needed in a network.
The Cell CPU will have a different instruction set than current CPUs as well, so current Applications will not run on it.

XGrid is somewhat similar in that it is designed for massive amounts of CPUs forming the computing grid (wide area).

Nothing in those two concepts can be easily adapted to a 4-core multi chip module. And a laptop is the most unlikely machine to introduce network based next gen technology, both because of energy consumption and the simple fact that notebooks spend a lot of time off a network.
post #295 of 376
Im not sure if this has been brought up...but....
1. how would Apple market such a system with 4 400Mhz chips ?...is that 1.6Ghz G5 ?

2. from the software standpoint...wouldnt everything need to be recompiled ? and wouldnt that be one hell of a hastle.

(if answered already, just let me know)

Cheers
post #296 of 376
Quote:
Originally posted by Hawkeye_a
1. how would Apple market such a system with 4 400Mhz chips ?...is that 1.6Ghz G5 ?

There are presently PowerPC 440 cores up to 700 MHz, and there will be up to 1 GHz soon. Since we are talking about two dual core chips here (to a total of 4 cores) I guess that Apple would market them as lets say 2x 1.4 GHz if they'd choose a 700 MHz core.
Even if it was more like 4x 700 MHz in reality, that'd be something that might confuse the market. The concept is heard enough for us to comprehend so..
Quote:
Originally posted by Hawkeye_a
2. from the software standpoint...wouldnt everything need to be recompiled ? and wouldnt that be one hell of a hastle.

There will be a hell of a hassle for someone. If they do it, it'd either be a hassle for IBM since they are making the chips. If they are clever they can mask the dual core chips so that they in reality acts like one for all intents and purposes.

The cue of instructions and data going into the 4 core CPU would have to handled by some pretty magnificent operating unit.

Or.. The hassle would be Apple's since they are making the operating system and developmet tools. The operating system could make some nifty cue issuing so that the 4 core CPU would get a balanced workload. Perhaps doing some forced threading so all four cores have something to do at all times.

Or.. it would be the developers that have to make their apps even more threaded. That is aldready happening though.

This is way above my head. I'd like Nr9 to explain how the hell this is supposed to be done. I don't think we have that thing sorted out after quite a long thread. Xgrid in its present condition is far far from an aswer to this problem, so I have really no idea of what he was hinting about earlier.
post #297 of 376
Thank you, Smircle.

We've hashed this over. It's not going to happen. Cell is not a handful of 440-family cores, or even derivatives. It's something radically different. Any API or software layer to distribute processing over a Cell architecture would have to be so much more fine-grained than Xgrid as to be a completely different implementation. Xgrid assumes small numbers of big CPUs; Cell assumes big numbers of tiny cells (not CPUs in any traditional sense).

To the extent that Cell requires a dedicated programming model (which extent is not known publically) it will be difficult for Apple to change over to that model, just because of 20 years of legacy that assumes a particular sort of Von Neumann architecture, and because the entirety of their system is written in languages that predate any notion of threaded or distributed execution.
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post #298 of 376
Well, as Smircle pointed it out, no chance to see a cell powerbook in the near future.

There is only two choices for the next generation of powerbook :
- the G5
- the G4 design from IBM

Even on 90 nm the G5 still produce a lot of heat (but not more than a mobile athlon), and may have heat issues in the present slim alu case, or battery issues.
I think that IBM has to produce a mobile G5 with a low voltage, and why not SSOI

Otherwise, there is still the future G4 design, but frankly i see more this chip in the ibook than in any others products.
post #299 of 376
Quote:
Originally posted by Powerdoc
...and why not SSOI

Care to explain what difference this would make?
Thanks.
post #300 of 376
Quote:
Originally posted by PB
Care to explain what difference this would make?
Thanks.

Strained Silicon on insulator. It's an improvement of SOI, the goal is to reduce electricity leakage, thus save watt, and produce less heat.
post #301 of 376
Quote:
Originally posted by Powerdoc


...

There is only two choices for the next generation of powerbook :
- the G5
- the G4 design from IBM

...

That's what I see too. Though I would prefer to see a G5PB instead of a PowerBook G4 Extreme.

What do you think? How fast could IBM make their G4 at 90 nm or next year then at 65 nm?
post #302 of 376
Quote:
Originally posted by amarone
That's what I see too. Though I would prefer to see a G5PB instead of a PowerBook G4 Extreme.

What do you think? How fast could IBM make their G4 at 90 nm or next year then at 65 nm?

It seems to take about two years for IBM to design a chip with their tools - that's fast, by the way - so the questions are: Have they started, and if so, when?

I'll have to edit in an attribution, but I noticed on Ars a claim that the 970s in the new Xserve run at 10-20W typical, and 55W max. The huge gulf between those values suggests to me that "typical" includes PowerTune and bus slewing and various other power-saving throttles - a refined version of the method used in the PowerMac G5. It also suggests that Apple has the option of putting a 90nm 970 on powersaving mode permanently - essentially underclocking it and activating other power-saving features - and stuffing it in a PowerBook. The question then becomes whether the resulting architecture offers significant enough performance over a G4 or G4-like architecture that can go full bore.

It also means that, unlike a G4, it can't really go lower than 10-20W under light use, which would negatively impact battery life.

Anyone have the wattage for the MPC7400 that went into the original PowerBook G4? That was quite a monster, if I remember right.
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post #303 of 376
Quote:
Originally posted by Amorph
It seems to take about two years for IBM to design a chip with their tools - that's fast, by the way - so the questions are: Have they started, and if so, when?

I

I have heard rumor about sahara 2 a PPC 750 derived chip with a SIMD unit two years ago ( i doubt that this rumor discribed the G5). May be the chip is not so far away.

As someone mentionned in a post some months ago (perhaps you Amorph) it's always difficult to start both a new design and a fabbing process. Perhaps we will see this chip in some more months, when IBM will be 100 % operational with the 90 nm process.

However, i think i'll take a full speed new G4 anytimes over a downclocked G5 (stuck in the powersafe mode).
post #304 of 376
Quote:
Originally posted by Amorph
I'll have to edit in an attribution, but I noticed on Ars a claim that the 970s in the new Xserve run at 10-20W typical, and 55W max. The huge gulf between those values suggests to me that "typical" includes PowerTune and bus slewing and various other power-saving throttles - a refined version of the method used in the PowerMac G5.

This dovetails nicely with an AI rumor from Dec 03:
"At the lowest -- albeit unknown -- clock-speed, the PowerPC 970FX dissipates approximately 12-Watts. Preliminary tests conducted earlier in the year on a 2.5GHz PowerPC 970FX G5, built around the 90nm process, showed the processor to dissipate 62-Watts. For comparison, a chip of equal clock frequency, which was manufactured on IBM's current 130nm process, dissipated a considerable 96 watts."

This figures, however, strike me as a little high. The 970 consumed 42W at 1.8Ghz (according to Ars). If those figures are right, the effect of the structure shrink is a bit underwhelming.

I am no expert in the art of building computers, but it seems to be clear that considering the massive breathing holes of the XServe, the CPU used there cannot be the same as in a future notebook.
post #305 of 376
Quote:
I am no expert in the art of building computers, but it seems to be clear that considering the massive breathing holes of the XServe, the CPU used there cannot be the same as in a future notebook.

With the caveat that I don't see the current G5 winding up in a notebook either:

The Xserve has to cope with two 970s, both of which have to be able to run full throttle (110W cumulative), as well as three fast hard drives, which have to be able to run full throttle, as well as a high-performance motherboard (the northbridge "companion chip" in the PowerMac apparently chews 30W all by itself. The one in the Xserve would be die-shrunk, but probably not all that much more power-efficient due to leakage.) Furthermore, the Xserve's cooling has to be massively redundant and capable of dealing with high ambient temperatures - a roomful of racks of Xserves is going to get warm even with the industrial cooling solutions such a room will demand. A hypothetical PowerBook has the options of always throttling the CPU, using a lower-performing (and cooler) motherboard, only one significantly slower (and cooler) hard drive, and unlike an Xserve it has the option of letting itself overheat and shut down in pathological cases, because notebooks aren't and cannot reasonably be uptime-critical.
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post #306 of 376
While I remain unconvinced that the claims of a multipprocessor PowerBook made by NR9 will become a product I have to respond to some of your claims.

First cell is a concept, there is nothing to keep an implemenation from being a bit differrent. There is nothing to keep someone form taking a few of the cell concepts and implementing this with an industry standard instruction set. Sure this won't be a "CELL" processor per say, but it will none the less use some of the ideas.

XGrid from what we know at this time is suppose to work with independant computers but there is nothing to keep such technology from managing indepedant compute resources on the same motherboard.

As to the type of network, fiber is certainly choice but what is to keep someone from implementing an on board bus and a few cross bar switches as the communications medium?

To say that these sorts of concepts can not be engineered into a multichip module is misleading. The implication is that there would be SOC computers communicating across the MCM. This is not exactly a leap of technology as IBM, AMD, Motorola, Intel and a host of other manufactures have been build SOC implementations for some time now. Add a couple of those to a MCM, along with a few interconnects and in effect you have networked a system of computers. Take the time to implement a SOC device from the ground up to support distrubuted processing and you have the potential for an interesting machine.

The potential I see with such an implementation actually is in the potential for making a portable with scalable power usage. In fact I see power usage as a very good reason to pursue such a design. The network really has nothing to do with a PowerBook implementation, the network would be contained with in the MCM and the SOC that it is supporting.

All that being said I have to agree that there is problally some leg pulling going on. While such a machine may very well have been a R & D effort I don't see Apple pursueing this implementation. Mainly the issue from my perspective would be a marketing one. Unless the features could be implememted in a very tranparent way to the user Apple would opt for the simpler system.

One idea that does come to mind is to implement a 440 SOC as a system helper processor to support a G4 or follow on processor. So instead of SMP you end up with aSMP. That is have one full performance high power processor running the usual user tasks and have a very low power processor running a good deal of the rest of the OS. The idea being to add 700 to a 1000 MHz of extra integer power at the expense of 1 or 2 watts of extra energy usage. While nobel in thought the biggest problem is Alt-Vec which is shoe horned into all sorts of system code, on the other hand OS/X still runs on 603 systems.

In a nut shell what has been described seems to be possible, I just don't see Apple as having the guts to explore non mainstream ideas at the moment.

Thanks
Dave




Quote:
Originally posted by Smircle
Whoa, people cool down. This guy (Nr9) is having you on.
The Cell concept calls for linking thousands to millions of SOCs via broadband connections (optical fiber down to cable modem speeds) to distribute unused processing power wherever it is needed in a network.
The Cell CPU will have a different instruction set than current CPUs as well, so current Applications will not run on it.

XGrid is somewhat similar in that it is designed for massive amounts of CPUs forming the computing grid (wide area).

Nothing in those two concepts can be easily adapted to a 4-core multi chip module. And a laptop is the most unlikely machine to introduce network based next gen technology, both because of energy consumption and the simple fact that notebooks spend a lot of time off a network.
post #307 of 376
Quote:
Originally posted by wizard69
While I remain unconvinced that the claims of a multipprocessor PowerBook made by NR9 will become a product I have to respond to some of your claims.

First cell is a concept, there is nothing to keep an implemenation from being a bit differrent.

No, Cell in this case is the name of a specific implementation which IBM will be shipping soon. That's the relevant item in this thread.

The only thing approaching a description was posted on the front page here, and it doesn't look anything like what's described in this thread. Of course, it could be wrong. We'll just have to wait for IBM to release documentation. However, it's a safe bet at this point that they're not talking about bunches of PowerPC cores.

Quote:
XGrid from what we know at this time is suppose to work with independant computers but there is nothing to keep such technology from managing indepedant compute resources on the same motherboard.

That's still higher level than Cell appears to require, and it's not necessary anyway - there are already means to manage independent compute resources within a machine: Multitasking and multithreading. Xgrid handles a fairly specific problem that's more widespread in big computing than in anything a PowerBook would be expected to handle.

Quote:
As to the type of network, fiber is certainly choice but what is to keep someone from implementing an on board bus and a few cross bar switches as the communications medium?

I didn't discuss bandwidth because it's only indirectly relevant to the question. Xgrid is best at moving fairly large chunks of a problem (i.e., chunks that would require the attention of an entire processor core) around. Cell appears to be lower-level than that.

With any kind of grid or cluster or distributed computing, more bandwidth is obviously better. Another option for nearby machines: HyperTransport can be run over cable, allowing a single logical motherboard to span multiple physical boards.

Quote:
To say that these sorts of concepts can not be engineered into a multichip module is misleading.

I'm not saying that. I'm saying that Cell cannot be compared to an MCM or anything similar. It's not just a cluster of conventional CPUs that happens to have phenomenal bandwidth and latency.
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post #308 of 376
Quote:
Originally posted by Amorph
No, Cell in this case is the name of a specific implementation which IBM will be shipping soon. That's the relevant item in this thread.


Well everything that I've read, which I admit is awfully thin technically says to me that Cell will be very flexible in implementation. Futher this page: http://www.siliconvalley.com/mld/sil...ey/7260515.htm seems to indicate that Cell is Power based to some extent. I find it hard to believe that they would choose to implement an entirely new instruction set when there is a a viable one to extend.
Quote:

The only thing approaching a description was posted on the front page here, and it doesn't look anything like what's described in this thread. Of course, it could be wrong. We'll just have to wait for IBM to release documentation. However, it's a safe bet at this point that they're not talking about bunches of PowerPC cores.

Yes cell is a bit of a mystery, but I have to think that cell would at least in part implement PPC. Lets face it IBM has had trouble establishing PPC in the market place in the face of the i86 standard. Trying to move the market to an entirly new instruction set would seem to be more work than is required when there is still plenty of room to extend PPC. One only has to look at all of theother high peformance processors that have disappeared over the years due to the lack of market acceptance. A cell processor based on PPC has a positive effect for that product in that PPC will continue to gain market share.
Quote:
That's still higher level than Cell appears to require, and it's not necessary anyway - there are already means to manage independent compute resources within a machine: Multitasking and multithreading. Xgrid handles a fairly specific problem that's more widespread in big computing than in anything a PowerBook would be expected to handle.

Well yes Multitasking and multithreading (and Process control) are task management, but task management generally targeted at one independant system. That can be a single processor or or some type of SMP. Xgrid extends handling of processes and thread ascross multiple systems. There is nothing to keep an engineer from implementing multiple systems on one PC board and having them communicate via a bus or port of some type.

Since the one feature of Cell that seems to make all of the trade publications is the concept of SOC communicating over a variety of communications channels. It seems to be a possibility that xgrid could be extended to support an array of these processors.
Quote:


I didn't discuss bandwidth because it's only indirectly relevant to the question. Xgrid is best at moving fairly large chunks of a problem (i.e., chunks that would require the attention of an entire processor core) around. Cell appears to be lower-level than that.

With any kind of grid or cluster or distributed computing, more bandwidth is obviously better. Another option for nearby machines: HyperTransport can be run over cable, allowing a single logical motherboard to span multiple physical boards.

Exactly there are many options to tie together machines or systems. There is no reason that xgrid could not be extended to tie systems into a working unit over hypertransport. While I'm not to sure that will ever happen as I suspect that xgrid clusters will use other interconnects. I use the word clusters becuase I doubt that hypertransport is going to tie machines that are too far apart.
Quote:



I'm not saying that. I'm saying that Cell cannot be compared to an MCM or anything similar. It's not just a cluster of conventional CPUs that happens to have phenomenal bandwidth and latency.

Yes I understand this. I just think that Cell may very well just be that a cluster of conventional CPUs. Well conventional in the sense of having a 440 derived core, with an assortment of accelleration hardware tack on around the core.

The thing with the 440 core is that it is rather small and could certainly be implemented as a SOC device with a large assortment of peripherals. In reality there are Soc processors from IBM right now that implement limited PPC systems. Cell could just be a more elaborate implemetation.

The MCM is somebodies elses suggestion. My take on MCM,s is that they are to expensive for consumer level machines.

What is rather funny here is that I'm defending a product that may very well be the work of somebodies imagination with information about a product that doesn't even exist yet. The concept is cool though, low power and high performance.
Quote:

post #309 of 376
Thread Starter 
Quote:
Originally posted by Amorph
No, Cell in this case is the name of a specific implementation which IBM will be shipping soon. That's the relevant item in this thread.

if you take off the capital C then it isn't.
post #310 of 376
Quote:
Originally posted by Powerdoc
Well, as Smircle pointed it out, no chance to see a cell powerbook in the near future.

There is only two choices for the next generation of powerbook :
- the G5
- the G4 design from IBM

Even on 90 nm the G5 still produce a lot of heat (but not more than a mobile athlon), and may have heat issues in the present slim alu case, or battery issues.
I think that IBM has to produce a mobile G5 with a low voltage, and why not SSOI

Otherwise, there is still the future G4 design, but frankly i see more this chip in the ibook than in any others products.

wasnt it rumoured that Apple and/or IBM have been tinkering with liquid cooling the processors ? expecially for laptops ? i remember reading something about this somewhere.

for now im going to have to disagree with the original concept of the thread... 4 400Mhz processors. Not feasable imo. true the power consumption and heat deciptation might be perfect for portables, but the fact that the 10k odd apps on MacOSX now need to be recompiled/edited in some special way for laptops and desktops seperately is too great a problem to be overlooked.
- Apple wont be able to market the laptop as a PowerBook G5 because it's not a PPC970.
-Fom a developer standpoint..... it's too much of a hurdle to have some code accelerate for the 4-400s and for G5s at the same time.
-Consumers... im still trying to comprehend the idea...i cant imagine what consumers will think.

At best .... IBM might take some design ques from the 400 or whatever the chip is and encorporate it into a portable version of the G5. thus maintaining a 64bit architecture, basically the same instruction set, but less bandwidth or something to keep it cool and power savvy.

Thats just my opinion on the whole thing.
post #311 of 376
Quote:
Originally posted by Amorph
Cell is not a handful of 440-family cores, or even derivatives. It's something radically different.

AI said that the upcomming PowerPC 300 series might be a variation of the Cell chips. 300 would different from 440 but they seem to share quite a lot, modularity, SOC design, multi core and power saving features.
post #312 of 376
Quote:
Originally posted by Hawkeye_a

. . . Fom a developer standpoint..... it's too much of a hurdle to have some code accelerate for the 4-400s and for G5s at the same time. . .



Is there any technological barrier to making a "cell" processor that will run current OS X software natively? If a cell processor executes the PPC instruction set, current OS X applications should run and not care about the nuts and bolts of how the processor does it.

Another possibility is a new core, like the 2 Watt 440 core but a 64-bit core. Possibly IBM and Apple are using 440 cores in prototypes.

One reason I am following this topic is that is sounds a lot like a class I took in 1991. It was called "Distributed Computing." It covered message passing and discussed advantages of the Mach kernel, among many other things. So this idea is intriguing, of having many cores, each running a tiny Mach kernel, all interconnected with a master or controlling processor that interfaces with the computer's operating system.

If hypertransport is used, as mentioned here, all these cores would not have to be in the same package. There could be a single master CPU and the cores could be added in separate packages of say four cores each. Comments?
post #313 of 376
Quote:
Originally posted by wizard69

Yes cell is a bit of a mystery, but I have to think

Which makes it a perfect fit for anyone who is trying to start a big mystery thread about a radically different architecture.

Apple had a hard time convincing developers to move their code to MacOS X. They had an equally hard time to get them to move from 68K to PPC. To expect Adobe et al. to invest now to make their code fly on both the 970 and another, radically different architecture below one platform would be expecting too much. With the 970, Apple has introduced a sufficiently different CPU to disgruntle some developers (MS's Mac BU's masochist stance not withstanding) and keep them occupied for the next years adapting to 64 Bit.

Most anything would feel slower on a 4x700Mhz machine than on a 1.8Ghz 970 single CPU, because some computational problems cannot be distributed to two CPUs, no matter what (Nr9s hypothetical new approach to coding is not going to help).
post #314 of 376
Hi Snoopy;


Quote:
Originally posted by snoopy
Is there any technological barrier to making a "cell" processor that will run current OS X software natively? If a cell processor executes the PPC instruction set, current OS X applications should run and not care about the nuts and bolts of how the processor does it.


This is in essence what would make a Cell based Mac possible that is if Cell can execute PPC software then this is a possibility. If cell can't execute PPC softeare then I think it is fair to say there is no chance at all of Apple picking up the technology.

You are right, current applications would not know what is up as far as the hardware goes. Just as many applications do not know or care if they are running on an SMP system.
Quote:
Another possibility is a new core, like the 2 Watt 440 core but a 64-bit core. Possibly IBM and Apple are using 440 cores in prototypes.

Well currently the fastest 440 based SOC's run at 4 watts, with a massive process shrink and some other engineering effort they should be able to get this down to 1 watt. The 64 bit question is interesting as I suspect the shift to 64 bit will be much faster than many suspect. The problem is creating a low power 64 bit machine, 64 bits doubles the number of bits being handled at any one time thus impacting power usage. In the portable realm the only thing keeping back 64 bit usage beyond the power issue is the ability to expand RAM to make use of the extended address space. The RAM issue will quickly go away as technology extends there.
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One reason I am following this topic is that is sounds a lot like a class I took in 1991. It was called "Distributed Computing." It covered message passing and discussed advantages of the Mach kernel, among many other things. So this idea is intriguing, of having many cores, each running a tiny Mach kernel, all interconnected with a master or controlling processor that interfaces with the computer's operating system.

Yes there are hints in the world of computing that everything described is possible and would not adversely impact Apples current software base. While I suspect that a laptop would not introduce a master slave relationship there are many possibilities to what could be introduced.
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If hypertransport is used, as mentioned here, all these cores would not have to be in the same package. There could be a single master CPU and the cores could be added in separate packages of say four cores each. Comments?

I think that the Master CPU idea is out at least in the sense of one much more powerful than the others. There would most likely be symmetry in processor capabilities.

Still I suspect that we are having our collective legs pulled. I say this even though I see such a laptop as solving very real issues.
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post #315 of 376
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Originally posted by Hawkeye_a
wasnt it rumoured that Apple and/or IBM have been tinkering with liquid cooling the processors ? expecially for laptops ? i remember reading something about this somewhere.

for now im going to have to disagree with the original concept of the thread... 4 400Mhz processors. Not feasable imo. true the power consumption and heat deciptation might be perfect for portables, but the fact that the 10k odd apps on MacOSX now need to be recompiled/edited in some special way for laptops and desktops seperately is too great a problem to be overlooked.


I'm not sure why people think that all these applicaitons need to be recompiled. You would still be running on a Mac OS/X operating system and you would still be using the PPC instruction set.
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- Apple wont be able to market the laptop as a PowerBook G5 because it's not a PPC970.

Yep a big problem. On the other hand I'm not to sure we will see a PPC970 in a laptop (PowerBook sized and capable) anytime soon so the marketing problem still remains.
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-Fom a developer standpoint..... it's too much of a hurdle to have some code accelerate for the 4-400s and for G5s at the same time.

Well an interesting problem, but the number of processors are not an issue. Even now developers have a varing number of processors that the application may run on. Two on the PowerMac G5 soon to be four when multi processor cores come out. So the number is not the issue.

Now the lack of a vector unit could hamper things but this is no differrent than having 603 hardware out and about. Add a vector unit and what I think will happen is that the developers imply won't care. Ultiment optimization will alway be for the Desktop line anyways. Think about it how many developers optimise their software for any of the laptops.
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-Consumers... im still trying to comprehend the idea...i cant imagine what consumers will think.

This would be a big marketing issue. We won't have to worry because I don't think Apple is going this route.
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At best .... IBM might take some design ques from the 400 or whatever the chip is and encorporate it into a portable version of the G5. thus maintaining a 64bit architecture, basically the same instruction set, but less bandwidth or something to keep it cool and power savvy.

Rumor has it that Apple and IBM are heavily invested into the development of a low power processor which could very well fill the arraingement you describe above. Of course what is known about this processor is is thin as what is known about cell. Every indication is though that cell is a concept, not so much a specific architecture, so it is possible that IBM may try to merge the concepts from several design fronts into a low power processor for Apple. The usual way of the world so this really shouldn't be a surprise.
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Thats just my opinion on the whole thing.

Much as mind is, while the discussion is appealing, I don't think Apple will take this route at all. It is too easy for them to play it safe.
post #316 of 376
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Originally posted by wizard69

. . . I think that the Master CPU idea is out at least in the sense of one much more powerful than the others. There would most likely be symmetry in processor capabilities. . .



Thanks for the comments. Regarding the master CPU, I was thinking about AltiVec instructions and floating point. Possibly one CPU could have an SIMD unit and FPU to handle these. Threads without such instructions could be passed to one of the simple cores. I don't know enough about hardware to say whether this would work.

If AltiVec and floating point operations could appear in a high percentage of threads, then more SIMD units and FPUs would be needed. Here again, I don't know enough about current application software to make a good guess. Possibly, one package of two or four cores could contain one FPU and one SIMD unit. I'm guessing that these units would need to be assigned to just one core. In this case, the message passing scheme would need to identify when an FPU or SIMD unit is required.
post #317 of 376
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Originally posted by wizard69


. . . Rumor has it that Apple and IBM are heavily invested into the development of a low power processor which could very well fill the arraingement you describe above. . .



I believe this make a lot of sense. Consider that the G5 had to wait for the 90 nm chip, with more power management features too I believe, to fit into a 1U Xserve. If IBM builds blade servers there will be many CPUs in a box. It makes sense to have them run as cool as possible. Since this goal is also what is needed for a PowerBook, both companies are highly motivated. Good partnership. Regarding the PowerBook, I too think it will be such a chip, not a cell. The cell idea is fun to think about however.
post #318 of 376
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Originally posted by wizard69
Rumor has it that Apple and IBM are heavily invested into the development of a low power processor which could very well fill the arraingement you describe above.

May I repost the seemingly last evidence available on the net today, directly from IBM's mouth? Note they talk about Embedded PowerPC's, something that the G5 is not.
post #319 of 376
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Originally posted by wizard69
I'm not sure why people think that all these applicaitons need to be recompiled. You would still be running on a Mac OS/X operating system and you would still be using the PPC instruction set.

C and C++ do not do parallellism. They are designed to assume that there is one CPU. All means to distribute work across multiple CPUs or cores has to be done outside of those languages, using system libraries. 99% of the time, it's done manually by the programmer, and the threads are very coarse because the application only expects 1 or 2 large, fast CPUs.

If you want that application to run on 4 small CPUs (or possibly many more in the case of Cell) a mere recompile would be the best case. The more execution cores you have to target, the more redesign and reimplementation you'd have to do. Because there is no provision in C or in C++ for dividing up work, and historically there's been no need, except in supercomputing applications, this is not easy. In particular, debugging and troubleshooting threaded code is exasperating, and the exasperation increases supralinearly with the number of threads.

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Well an interesting problem, but the number of processors are not an issue. Even now developers have a varing number of processors that the application may run on. Two on the PowerMac G5 soon to be four when multi processor cores come out. So the number is not the issue.

It's not an issue now because the only dual-processor machines also happen to use the fastest available chips, so threading is a luxury. On the platform proposed in this thread, it would become a necessity, and that would have a tremendous impact on application design - especially among the big, monolithic Carbon applications originally designed for an OS that had mediocre threading support bolted on late in its life. Furthermore, an application designed to spread itself over a large number of individually weak chips won't run as well on a platform built on one or two fast chips, because threading carries overhead.

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Now the lack of a vector unit could hamper things but this is no differrent than having 603 hardware out and about. Add a vector unit and what I think will happen is that the developers imply won't care. Ultiment optimization will alway be for the Desktop line anyways. Think about it how many developers optimise their software for any of the laptops.

This makes no sense. Professional applications are optimized for professional machines, not "desktops" or "laptops". PowerBooks are professional machines. Apple pitches them that way, and people use them that way. A PowerBook that couldn't run AltiVec-heavy apps like Photoshop, DVD Studio Pro, Final Cut Pro, Logic, etc., would not sell at anywhere near the rate of the current PowerBook.

The market is moving to notebooks, generally. Apple sold an unheard-of 197,000 PowerBooks last quarter. This is exactly the wrong time to start gimping them.

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Every indication is though that cell is a concept, not so much a specific architecture, so it is possible that IBM may try to merge the concepts from several design fronts into a low power processor for Apple.

One more time. Cell, upper-case-C, is a particular implementation shipping from IBM soon. Cell, lower-case-c, is a noun referring to a self-contained entity. Cellular computing is a concept. They are three different, if not unrelated, things.

As to the suitability of Xgrid: Generally, you can choose between a solution that scales up well and a solution that scales down well. Xgrid is suitable for powerful CPUs connected by (relatively) low bandwidth. Because of that, it is less suitable for weaker CPUs connected by high bandwidth. As soon as you start distributing computations across nodes, you have to become sensitive to both available resources and available bandwidth, because any inefficiency will squander a surprising amount of your available power. A solution for powerful CPUs with low bandwidth interconnects is only suitable for that situation.
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post #320 of 376
Thread Starter 
Quote:
Originally posted by Amorph

One more time. Cell, upper-case-C, is a particular implementation shipping from IBM soon. Cell, lower-case-c, is a noun referring to a self-contained entity. Cellular computing is a concept. They are three different, if not unrelated, things.

actualy the latter two are the same. you can talk about a "cell based architecture"
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