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post #81 of 376
Quote:
Originally posted by T'hain Esh Kelch
Arent Orion something with stars (And a Metallica song) and not a desert?

It's a contellation yes. Orion is not a codename for the 7xx-series witch seem to have a desert theme to its codenames (Sahara, Gobi and Mojave), it's a codename in the 4xx-series witch seem to have heaven-related codenames (Aurora and Orion).

And.. Amorph's and Barto's diagrams were very beautiful! I'm not worthy
post #82 of 376
Quote:
Originally posted by T'hain Esh Kelch
Arent Orion something with stars (And a Metallica song) and not a desert?

Orion is a legendary Greek warrior who was turned into a constellation by the gods. Among the "stars" that make up the constellation are the supergiants Rigel and Betelgeuse, and the Orion Nebula.

The change in name might have something to do with the fact that it will mark the end of the G3 as it has existed, and also something to do with the fact that a constellation is a single figure made up of many individual stars.

Quote:
Riiiight. Photoshop already screeeams!

Whether Photoshop screams will be Adobe's problem. It certainly could...
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
post #83 of 376
I will have to agree with several other posters...

This is the most exciting stuff in Future Hardware in some time...

Now if we could just get Kormac in here to verify!!!

No, really, I do find the idea of Apple using some derivative of IBM PPC4xx series CPUS in a cell-configuration for future PowerBooks to be VERY exciting!

Rmember the old adage folks; Many hands make light work!

Now if we could get Apple to purchase Alias from SGI...
Late 2009 Unibody MacBook (modified)
2.26GHz Core 2 Duo CPU/8GB RAM/60GB SSD/500GB HDD
SuperDrive delete
Late 2009 Unibody MacBook (modified)
2.26GHz Core 2 Duo CPU/8GB RAM/60GB SSD/500GB HDD
SuperDrive delete
post #84 of 376
Quote:
Originally posted by MacRonin
Now if we could get Apple to purchase Alias from SGI...

You just never give up, do ya?
...we have assumed control
...we have assumed control
post #85 of 376
Quote:
Originally posted by Amorph
Whether Photoshop screams will be Adobe's problem. It certainly could...

Exactly my point. Many companies doesnt take the time to optimize their apps properly... And some of them takes years to do it!
And Adobe seems to favor the dark side more and more.. Photoshop 7.0.1 is pretty sluggish at some points..
"There's no bigot like a religious bigot and there's no religion more fanatical than that espoused by Macintosh zealots." ~Martin Veitch, IT Week [31-01-2003]
"There's no bigot like a religious bigot and there's no religion more fanatical than that espoused by Macintosh zealots." ~Martin Veitch, IT Week [31-01-2003]
post #86 of 376
Quote:
Originally posted by T'hain Esh Kelch
Exactly my point. Many companies doesnt take the time to optimize their apps properly... And some of them takes years to do it!
And Adobe seems to favor the dark side more and more.. Photoshop 7.0.1 is pretty sluggish at some points..

I think Adobe feels why put the extra work in on the Mac side to optimize for dual processors or altivec or 64-bit or whatever when on the "dark side" they can just throw crap at a 3Ghz+ P4 and have the same or in many cases better results

its a shame but, well, guess in a way it kind of makes sense.
post #87 of 376
Quote:
Originally posted by Rhumgod
You just never give up, do ya?

NOPE!

Seems to me the only sure-fire way to get properly optimized software is if Apple actually owns the software in question...

After all, if Apple owned Alias right now, I would bet we would have a fully-optimized version of Maya Unlimited for Mac OS X/G5s already...

As opposed to a less-than-optimized version of Maya Complete...

In a perfect world, Apple would buy Alias, port Unlimited over to OS X, secure RenderMan from Pixar and integrate it as the default renderer in Maya, and then come out with a complete suite of VFX/DCC/3D tools...

The all Apple pipeline, both in hardware AND in software...

Hey! Get that zealot brand away from me!
Late 2009 Unibody MacBook (modified)
2.26GHz Core 2 Duo CPU/8GB RAM/60GB SSD/500GB HDD
SuperDrive delete
Late 2009 Unibody MacBook (modified)
2.26GHz Core 2 Duo CPU/8GB RAM/60GB SSD/500GB HDD
SuperDrive delete
post #88 of 376
After carful reading of this thread I have concluded...

1. Nr9 was deprived of love as a child... or he really has inside information. Apple legal is perking their ears.

2. The idea of a quad CPU PB before a quad CPU PM is interesting.
post #89 of 376
This same subject has leaped over to the arstech forums...

http://episteme.arstechnica.com/6/ub...5231&m=7951003

Seems to hold some contention on our friend Nr9, and whether or not he is actually legit, or just another troll...

Here is his posting history over there...

http://episteme.arstechnica.com/6/ub...562&u=57509882

Apparently he has been banned from the arstech forums for excessive trolling...

Wondering if this is the same guy?!?

Comments?

Not trying to start shit, just trying to check the overall spin on this subject...
Late 2009 Unibody MacBook (modified)
2.26GHz Core 2 Duo CPU/8GB RAM/60GB SSD/500GB HDD
SuperDrive delete
Late 2009 Unibody MacBook (modified)
2.26GHz Core 2 Duo CPU/8GB RAM/60GB SSD/500GB HDD
SuperDrive delete
post #90 of 376
MacRonin: I've been aware of this for a long time, and it's actually my main reason for giving him a pretty harsh response initially. I'm convinced this Nr9 is the same Nr9 as on Arstechnica. His posting style is equal, and I found this to be equally ridiculous as his trolling over at Ars. I seriously doubt that Nr9 has any insider information, but we'll just have to wait and see.
post #91 of 376
Quote:
Originally posted by MacRonin
This same subject has leaped over to the arstech forums...

http://episteme.arstechnica.com/6/ub...5231&m=7951003

Seems to hold some contention on our friend Nr9, and whether or not he is actually legit, or just another troll...

Here is his posting history over there...

http://episteme.arstechnica.com/6/ub...562&u=57509882

Apparently he has been banned from the arstech forums for excessive trolling...

Wondering if this is the same guy?!?

Comments?

Not trying to start shit, just trying to check the overall spin on this subject...


gee, great, always great when the losers over at Ars begin to add their "wisdom" the the discussion.

Just was reading there about an hour before this. they are more pathetic than ever.
post #92 of 376
This is by far the most interesting discussion here on FH in a long, long time. With that being said, I do hope that this praise isn't given to a thread started by a troll with sinister plans...
Pismo, Deus Ex Machina.
Pismo, Deus Ex Machina.
post #93 of 376
Quote:
Originally posted by Zapchud
I'm convinced this Nr9 is the same Nr9 as on Arstechnica. His posting style is equal...

I agree! His way of writing is very similar. He spells rather poorly, fails to put capital letters when starting new sentences and his grammar is flawed, sometimes leaving out entire words. It's very likely the same guy.
Pismo, Deus Ex Machina.
Pismo, Deus Ex Machina.
post #94 of 376
Nope no desire for an expensive ibook. What the ibook had was good battery life and decent (but by no means great) performance. I'm all for anything that can increase battery life and at the same time increase perfromance.

If they avoid the MCM route and where able to implement two SMP SOC processors we could end up with the best of both worlds. Reasonably good processor speed and extended battery life. What would be realy neat would be a controll panel with little switches that allowed you to put one or more of your processors to sleep.

I could see it now, 4 beavers knawing at their trees, click on the beaver (which represents a processor) and the beaver goes to sleep. Like wise a little store house in the Beavers den expands to represent increased battery life. Apple really needs to do this, I'd even sell them the rights cheap.

Dave



Quote:
Originally posted by Barto
Do you want an iBook that costs more than a PowerBook?

Thought not. This is a cool direction, but as with any new direction, expensive initially.

Barto
post #95 of 376
I followed one of the Ars Battlefront threads held up as an example of Nr9's trolling, and it's a claim that Macs are better than PCs because they weigh more, and so they're less likely to fall off desks in earthquakes. Now, I'm almost 100% positive that is trolling, given that it's a brilliant parody of the sorts of claims made in that forum, and the overzealous denizens of the Battlefront bit down hard on it.

I grew up on USENET. Trolling of this kind is an art form and a brutally effective form of parody. If he was in fact trolling the Battlefront, I can't judge him to harshly. It's a profoundly silly forum, not least for being full of overly earnest people who take irrelevant metrics, dubious engineering claims, and debates over platform superiority far too seriously. If he can get them riled up over the merits of engineering cases for their ability to stay upright in southeast Asian earthquakes, more power to him.

That said, how about the PowerBook G5? If he's trolling us, at least we've bettered the Ars crowd insofar as we've turned it into a good discussion. Let's keep that up, shall we?
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
post #96 of 376
Quote:
Originally posted by Amorph
I followed one of the Ars Battlefront threads held up as an example of Nr9's trolling, and it's a claim that Macs are better than PCs because they weigh more, and so they're less likely to fall off desks in earthquakes. Now, I'm almost 100% positive that is trolling, given that it's a brilliant parody of the sorts of claims made in that forum, and the overzealous denizens of the Battlefront bit down hard on it.

I grew up on USENET. Trolling of this kind is an art form and a brutally effective form of parody. If he was in fact trolling the Battlefront, I can't judge him to harshly. It's a profoundly silly forum, not least for being full of overly earnest people who take irrelevant metrics, dubious engineering claims, and debates over platform superiority far too seriously. If he can get them riled up over the merits of engineering cases for their ability to stay upright in southeast Asian earthquakes, more power to him.

That said, how about the PowerBook G5? If he's trolling us, at least we've bettered the Ars crowd insofar as we've turned it into a good discussion. Let's keep that up, shall we?

While he may have been frequenting the Ars Battlefront simply to post humorous replies and poke some fun at the people there, starting threads like this doesn't really qualify him for a front-row seat in church on sunday.

Microsoft is Racist

But I agree on your last remark, back to the topic of the Powerbook G5!!
Pismo, Deus Ex Machina.
Pismo, Deus Ex Machina.
post #97 of 376
Thread Starter 
heh everyone is trolling on battlefront to some degree, whether they kno it or not.

i dont think we need to discuss that

anyway, the processor has no real L2 cache but a 2KB prefetch buffer for L3
post #98 of 376
As much as I am enjoying this thread, I am rather ingorant as to how processors really works. Is there anywhere on the internet that I can visit that explains (in rather laymen-terms) how a processor is constructed and how it works? I suspect that would further enhance my enjoyment of this thread.

I seem to recall something written by John Siracusa over at Ars Technica regarding the G5. Is that a good place to start or are there better sites that explain processor design even simpler?

[EDIT: It wasn't written by John Siracusa but by Jon "Hannibal" Stokes.]
Pismo, Deus Ex Machina.
Pismo, Deus Ex Machina.
post #99 of 376
A rumor it is; but the concept is something to think about. If you take a couple of things into consideration, such as Apples commitment to multi threading and the use of vector operations, then you could see where this is a very real possibility. Now this could be a logn term joke who knows but it is none the less completely possible, though as mentioned before I really thing such a machine should be targeted at the low pwoer market and not the PowerBook market.

To keep things truely Symetric they would have to have a vector unit and FPU attached to each processor. So you would never be doing vector operation any greater than was implemented for each processor. You can not think of this a 512 bit vector operations, what you have would be the ability to process four threads of vector operations at a time. This would be absolutely wonderful though it may be a power usage killer.

The nice thing is that it may not reguire a rewrite at all, just about any multithread app that may have more than one thread doing vector operations would benefit. Along with that the syste would have access to vector operations. Yes heavy single thread vector operations would be slow, but do realize that only that app would be slower any other running software would not be impacted.

Why you would want to elimenate multi threading is beyond me. Multithreading is what makes this sort of machine feasable. Sure a CPU bound process will perform poorly but how much software out there is really that bound up. Lets face it the OS would benefit, just about every application written in the last few years would benefit, people who run multiple programs at anyone time will beenfit. The only people who would loose would be those running CPU bound programs that don;t multi thread well and don't make much use of system resources. Sure there are some programs like this but not many.

Alright who really cares about bench marks anyways, this is an Apple forum right. Really Apple has suffered for years with poorly performing machines, when it comes to bench marks, whats to stop this. Plus any reasonable marketing idiot will come up with multi thread benchmarks that show the potential of this machine. Further if marketed towards resonably intelligent customers 4X SMP will be a big draw in and of itself. It would also be reasonable to assume that bandwidth and VMX issues would be addressed so the 700 MHz performance would exceed the current results that come from the 750 series.

Like I said I have alot of reservations about the reality of this machine. On the other hand the concept is sound and would leverage in a very positive manner some of Apple greatest technology advantages. Sitting here in NY I don't know what Apple has up its sleeves, what I do know is that the sensible thing to do would be to introduce a low power 970 in the powerbook. This would be playing it safe for Apple and would satisfy the lust that their customers have for such a machine. One thing is for certain, Apple is about the only manufacture that could pull this off, that is a massive SMP portable.

Thanks
Dave


Quote:
Originally posted by Zapchud
Even though Amorph and Wizard69 did a fair job in getting something remotely credible out of this rumor, I still find this rumor to have way too many unanswered questions about it.

How will they get Altivec to perform acceptably?

Like it's been proposed now, we wind up with 4 Altivec-units. This would be pretty equivalent to a very low-clocked, but flexible 512-bit Altivec.
Even 256-bit Altivec has been doomed into the land of the law of diminishing returns, because it will be very hard to find enough parallelism in the code to exploit this (and it would make the unit itself a transistor monster, but that's not the concern here).

Yes, you could probably get acceptable performance out of these four units, if you're skilled enough as a programmer to manage to split the code onto all the units, but I believe that's pretty hard, and more importantly: It would require a rewrite of all code.

On regular code, optimized for the 970, and old (legacy) AV-code, it would perform at ~30% compared to the 970, because of the low clock-frequency, which is pretty low in my book.

This could be possibly be solved with the technology that would have to be the key to the biggest problem of this design entirely: To make it possible for all the cores to execute on the same thread, i.e. eliminate the need for multithreading. (And don't ask me how to do that, if it's even possible)

Without this, this pseudo-G5 Powerbook would be a terrible machine for all things involving less than 4 threads. A typical example of this is benchmarks. Benchmarks are almost always performed with the benchmark itself as the only running CPU-intensive task. And the typical benchmark (especially the cross-platform ones) is not multithreaded.

So unless some breakthrough is achieved relative to multi/single-threading, this machine would probably stand out as very slow in every aspect of benchmarking, except where they tested multitasking extensively.
post #100 of 376
Quote:
Originally posted by KANE
I seem to recall something written by John Siracusa over at Ars Technica regarding the G5. Is that a good place to start or are there better sites that explain processor design even simpler?

[EDIT: It wasn't written by John Siracusa but by Jon "Hannibal" Stokes.]

Hannibal's articles on CPU design are excellent. Don't be afraid to follow the links, either. Happy reading.
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
post #101 of 376
Hi Kane;

I suppose that Ars would be ok to start. The problem is that if you have no electronics background at all it may take awhile to digest the material.

Honestly the best way to get started with increasing your knowledge of microprocssors is to get an 8 bit development system or trainer board and crack the books. What you will find is that to really get an understanding of a mircoproccesor requires that you understand both programming and a little electronics. Unfortunately its been so long I really don't know what or whom to suggest as a vendor for such materials. the major suppliers would be a good place to start.

A more modern approach and probally alot cheaper would be to get one of the free microprocessor simulators that float around the internet. I've heard there are good ones out there, maybe someone can pipe in with a suggestion. A simulator and a few good books for the processor being simulated will get you started. The board approach above is nicer if you can afford it, writing programs to blink lights and drive motors can pull you in deep.

There is a bit of a jump from a 8Bit microproccesor to the PPC. The PPC is really close to being a mainframe processor on a chip, thus has its own quirks. In anyevent the concepts transfer without issue.

After writing all of this all I can say is read Hannibal's materials if you like, but without a back ground it may not be usefull. If however your interest is tweaked then you have a couple of ideas to consider above.

DAve


Quote:
Originally posted by KANE
As much as I am enjoying this thread, I am rather ingorant as to how processors really works. Is there anywhere on the internet that I can visit that explains (in rather laymen-terms) how a processor is constructed and how it works? I suspect that would further enhance my enjoyment of this thread.

I seem to recall something written by John Siracusa over at Ars Technica regarding the G5. Is that a good place to start or are there better sites that explain processor design even simpler?

[EDIT: It wasn't written by John Siracusa but by Jon "Hannibal" Stokes.]
post #102 of 376
Quote:
Originally posted by wizard69
Why you would want to elimenate multi threading is beyond me. Multithreading is what makes this sort of machine feasable. Sure a CPU bound process will perform poorly but how much software out there is really that bound up. Lets face it the OS would benefit, just about every application written in the last few years would benefit, people who run multiple programs at anyone time will beenfit. The only people who would loose would be those running CPU bound programs that don;t multi thread well and don't make much use of system resources. Sure there are some programs like this but not many.

Alright who really cares about bench marks anyways, this is an Apple forum right. Really Apple has suffered for years with poorly performing machines, when it comes to bench marks, whats to stop this. Plus any reasonable marketing idiot will come up with multi thread benchmarks that show the potential of this machine. Further if marketed towards resonably intelligent customers 4X SMP will be a big draw in and of itself. It would also be reasonable to assume that bandwidth and VMX issues would be addressed so the 700 MHz performance would exceed the current results that come from the 750 series.

Please read what I said one more time, I didn't say I want to eliminate multithreading just like that, but the need for it. That's the only way I can find a machine like this feasible. If all the cores could chew at the same thread, it would indeed be wonderful.

As for benchmarks, and poor-performing machines. Why do you think Apple's market share has been shrinking the last years? It's because they haven't afforded deals that have been compelling enough for the general customer. No, I don't want to turn this into yet another market share thread, but this is the very essence. If Apple offered machines that screamed bang for the buck, high performance, and all the sweet juice, market share would go up.

Benchmarks provides information about exactly this. And as you say, Apple's machines have not been very speedy, and customers knows this. How do they know? Just by looking at the clock-frequency? Yes, some do that, but a portion of the market more than large enough to be talked about do care a lot about benchmarks. They don't sell iMacs, Powerbooks, and mid/low-end hardware to people that's obsessed with benchmarks. And neither do they sell much to potential buyers that consults with these benchmark-caring, often enthusiasts.

You can't keep targeting reasonable intelligent customers like this, it's exactly what Apple's been doing for years, and it doesn't work satisfyingly. Apple wants to grow.

So for a 4x SMP-machine at 700MHz, you gotta have a pretty convincing and compelling offer to make. Heavy-ass multithreading is fine, fine for some. A ton of code has to be rewritten, and I have my doubts that programmers are willing to do that just because Apples one laptop-line is having 4x SMP.

It's good we're at least agreeing about the possible reality of this machine
post #103 of 376
Quote:
Originally posted by Nr9
heh everyone is trolling on battlefront to some degree, whether they kno it or not.

i dont think we need to discuss that

anyway, the processor has no real L2 cache but a 2KB prefetch for the L1.

And may I ask how large this L1 cache is? 64kB, as the current 440 core?

If that's so, no L2 cache will be a major performance-hit.
post #104 of 376
OK, another line of speculation:



This is a logical view, so L2 here could be on the same die as the cores or on the MCM (which is the next best thing). I'm also not entirely sure whether it makes sense to have a shared external cache. Some sort of control logic would be necessary, obviously. So the big L2 could be two caches, really, if that would make it easier to handle coherency issues. I'm getting in over my head here, so bear with me.

I too would be shocked if IBM didn't go with at least two fast caches per core. It seems to me that regressing to a G2 design is not part of the idea.

(The little grey bits in the image are the prefetch caches.)
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
post #105 of 376
Well if you can come up with a technology that eliminates the need for multithreading in systesm and software you would be a very wealthy man or woman!

Multithreading is what makes this machine feasable, it isn't the other way around. If the 4 processors cannnot be doing usefull work at the same time, then you will end up with very poor performance. Multihtreaded operating systems and applications software allow this to happen.

All cores chewing on the smae thread would not be wonderfull at all. That would mean that you did something 4 times that only needed to be done once. What you would want is an application that generated 4 or more threads to get its work done, then the system could come into its own. Granted some applications do not multithread easly and would suffer realative to those that do. But even with single threaded applications the overall results will be better than the same program on a single processor machine.

Apples market share has shrunk for a number of reasons performance has only been a small part of that. To go into this would mess up this thread so I won't.

It would be a total shame if Apple ever thought that its market was the "benchmark-caring" crowd. Apple has several markets and one of those is high performance. There are several ways to judge the performance of a machine, I'm sure Apple can find the proper way to present this performance.

Frankly I don't know if Apple wants to grow, I think Apple is Steves baby and he wants to see it healthy. One way to keep a company like Apple healthy is to innovate, history has shown us that Apple is healthest when she innovates. The other thing that Steve and the stockholders want is $$$$$$$$$$$. Money is what its all about in the end, unhappy shareholders can ruin a company in a blink of an eye. An innovative laptop that can demonstrate leading edge performance, in a number of different metrics, can bring in $$$$$$$$$$$$.

You have a fundamental misunderstanding of the software technologies that have been implemented recently. First a large portion of of the Software base that can benefit from being SMP aware already is. The more hardware that Apple sells that is SMP just provides even more programmers the incentive to go the SMP route. Almost all of the professonal PPC hardware that Apple has sold in the last few years has been SMP. Frankly they have been having a hard time even moving the single processor G5's, thus the recent marketing changes. The software base is there to take advantage of this mystery machine and has been for some time. Second; the state of the software base is only part of the equation. OS/X is a modern operating system many parts of which are multithreaded. Even if anyone specific applications program can not take advantage of the SMP facilites the operating system can. So you still come out ahead. Third; many of the application libaries are multithreaded also. So our poor single thread application MAY still make use of multithreading even if it wasn't written to do so itself.

Its not that I'm disagreeing with you, it is more a question of some of your reasoning being wrong. Yeah I understand that some applications wouldn't give the best results on this type of machine, but overall performance could be a fanatastic in the context of a laptop. Frankly we don't even know what that 700 MHz processor will be equal to, there is nothing to keep IBM from actually improving its performance.

What is compelling will differ between users, but the one advantage Apple had for a long time was run time on battery. If Apple can get back to excellent run times and extrodinary user experience then they have a good chance of success.

Thanks
dave


Quote:
Originally posted by Zapchud
Please read what I said one more time, I didn't say I want to eliminate multithreading just like that, but the need for it. That's the only way I can find a machine like this feasible. If all the cores could chew at the same thread, it would indeed be wonderful.

As for benchmarks, and poor-performing machines. Why do you think Apple's market share has been shrinking the last years? It's because they haven't afforded deals that have been compelling enough for the general customer. No, I don't want to turn this into yet another market share thread, but this is the very essence. If Apple offered machines that screamed bang for the buck, high performance, and all the sweet juice, market share would go up.

Benchmarks provides information about exactly this. And as you say, Apple's machines have not been very speedy, and customers knows this. How do they know? Just by looking at the clock-frequency? Yes, some do that, but a portion of the market more than large enough to be talked about do care a lot about benchmarks. They don't sell iMacs, Powerbooks, and mid/low-end hardware to people that's obsessed with benchmarks. And neither do they sell much to potential buyers that consults with these benchmark-caring, often enthusiasts.

You can't keep targeting reasonable intelligent customers like this, it's exactly what Apple's been doing for years, and it doesn't work satisfyingly. Apple wants to grow.

So for a 4x SMP-machine at 700MHz, you gotta have a pretty convincing and compelling offer to make. Heavy-ass multithreading is fine, fine for some. A ton of code has to be rewritten, and I have my doubts that programmers are willing to do that just because Apples one laptop-line is having 4x SMP.

It's good we're at least agreeing about the possible reality of this machine
post #106 of 376
IBM's vlc compiler has auto-threading capabilities. I have no idea how well they do. It's a given that a trained programmer could do better, but the fact that a trained programmer could write better assembly code hasn't stopped the compiler from taking off. If threading by compiler option works well enough it'll be widely adopted (it'll really need to make it into gcc before this happens, though). Cocoa, being a set of frameworks, is very well set up to spawn threads itself as needed, giving all Cocoa apps some of the benefit automagically. And, of course, NSThread makes manual threading as intuitive as it's ever going to be in languages designed before threads existed.

This seems to me to be work in the general direction of Cell. IBM certainly has an interest in making parallelism as easy as possible, because they're going this way no matter what Apple does. It's not running the same thread across multiple CPUs, but it's about as close as you can get.
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
post #107 of 376
Thread Starter 
The L3 cache is sufficient fast at 22.4GB/sec

the L1 cache is still 32/32
post #108 of 376
Thread Starter 
programmer will not rewrite software for just a laptop, but this is the general direction in which mac architecture will move, and apple will make that clear to developer
post #109 of 376
Quote:
Originally posted by Henriok
And.. Amorph's and Barto's diagrams were very beautiful! I'm not worthy

I wouldn't call my diagram "beautiful". It had no fire, no energy, no nothing!

If you want diagrams that look good, all you need is OmniGraffle. Fantastic program, it can even replace PowerPoint.

Barto
Self Indulgent Experiments keep me occupied.

rotate zmze pe vizspygmsr minus four
Self Indulgent Experiments keep me occupied.

rotate zmze pe vizspygmsr minus four
post #110 of 376
Quote:
Originally posted by Zapchud
If that's so, no L2 cache will be a major performance-hit.

The G4 (7400 & 7410) had no L2 cache as such, just 1MB of what we now call L3 cache.

Maybe this thing will use a combined memory/L3 controller similar to the POWER line (much scaled down, of course).

Look at it this way, the PowerPC 970 has L2 cache like the POWER4, but without the memory/L3 controller (for cost/performance reasons). Now what if this has the L3 without the L2? It may make sense for an SoC design, where you'd try and limit the size of the silicon, to have L3 cache instead of, rather than in addition to, L2.

Barto
Self Indulgent Experiments keep me occupied.

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Self Indulgent Experiments keep me occupied.

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post #111 of 376
Thread Starter 
on a sidenote considering my bestest grammar

it is the beauty of human language to remain coherent in the absence of strict syntax

we should take advantage of that. this is future of english.
post #112 of 376
Quote:
Originally posted by Nr9
programmer will not rewrite software for just a laptop, but this is the general direction in which mac architecture will move, and apple will make that clear to developer

Anyone else thinking a WWDC introduction?
Self Indulgent Experiments keep me occupied.

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Self Indulgent Experiments keep me occupied.

rotate zmze pe vizspygmsr minus four
post #113 of 376
"general direction in which mac architecture will move," eh? which branch of mac architecture? will we similar multi-core (i.e., beyond 2 CPUs) configurations with the 980 (or any other future progression of the 970-range CPU)?

I like the comment about syntax

at the same time, though, I'm taking it all with a little crystal of sodium chloride...
"Be entirely tolerant or not at all; follow the good path or the evil one. To stand at the crossroads requires more strength than you possess."

"Ordinarily he was insane, but he had lucid moments...
"Be entirely tolerant or not at all; follow the good path or the evil one. To stand at the crossroads requires more strength than you possess."

"Ordinarily he was insane, but he had lucid moments...
post #114 of 376
I confirm this. However, the unveiling will be closer to Summer 2004. The ship date might disappoint you guys. Winter 2004.
post #115 of 376
Quote:
Originally posted by Nr9
sorry I meant the L2 cache is prefetch for the L3 cache.

The L3 cache is sufficient fast at 22.4GB/sec

the L1 cache is still 32/32

OK, this is the same design IBM's using in the POWER5. Good.

Another attempt, just because OmniGraffle is so much fun:



Even if the public unveiling is summer 2004, I'd expect WWDC to be heavily slanted toward SMP programming and threading, with perhaps some sooper seekrit sessions for big and important developers. The whole thing is NDA'd, and if the last WWDC was any indication, Mac devs have gotten a little better at keeping quiet.

Winter '04 is fair as an introduction, though. That's right at the deadline Steve said he wanted for a "G5 PowerBook," which is good enough.
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"...within intervention's distance of the embassy." - CvB

Original music:
The Mayflies - Black earth Americana. Now on iTMS!
Becca Sutlive - Iowa Fried Rock 'n Roll - now on iTMS!
post #116 of 376
Quote:
Originally posted by wizard69
Why you would want to elimenate multi threading is beyond me. Multithreading is what makes this sort of machine feasable.

Which is a rather significant strike against the 440 as it is not SMP compliant.

From the BlueGene/L Overview PDF:
Quote:
Since the 440 CPU core does not implement the necessary hardware to provide SMP support, the two cores are not L1 cache coherent. A lockbox is provided to allow coherent processor-to-processor communication.

I think Nr9 has conflated some things he didn't understand and maybe is making some guesses.

The 440 does not have FPUs. This functionality is added by the 440 FPU2 which integrates via the aux port. It is capable of a special version of SIMD that IBM describes as SIMOMD (Multiple Ops and Multiple Data) and this may be what leads Nr9 to speculate about VMX. Otherwise, IBM would have to fabricate a custom co-processor that incorporates VMX and a scalar FPU.

Add the fact that the 440's performance in the BlueGene/L prototype is only as spectacular as it is thanks to the 440 FPU2's ability to do 2 FMADs per cycle (or 4 FLOPSs -- a total of 8 FLOPs with both CPUs engaged) but is otherwise not very spectacular (7 stage pipeline with 3 exec units) and it's unlikely this is a direction that IBM and Apple would go for mobile computing. Especially not when process reductions and a bit of creative airflow engineering would provide more performance at less cost in engineering cycles.
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #117 of 376
Thread Starter 
tomb

this powerbook g5 is obviously not SMP.

the multiprocessing is distributd via a message passing interface.

this is main reason for delay in OS X.

you are wrong if you think cooling engineering will let a 970 go in a powerbook. this is precisely the reason apple is going to this direction.

the 970 is very hot and suck lot power

if you add exotic form of cooling, you are likely to have very little battery life.

as for VMX and FPU, you can guess what the solution is. half of work already have been done.
post #118 of 376
Quote:
Originally posted by Nr9

the multiprocessing is distributd via a message passing interface.

this is main reason for delay in OS X.

Which makes very, very good sense. New DragonflyBSD-esque kernel in Mac OS X 10.4. If that happens btw, I told you so in advance (I first posted a thread about it months and months ago). I hope Jordan Hubbard is working his butt off!

Barto
Self Indulgent Experiments keep me occupied.

rotate zmze pe vizspygmsr minus four
Self Indulgent Experiments keep me occupied.

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post #119 of 376
Quote:
Originally posted by Nr9
tomb

this powerbook g5 is obviously not SMP.

If it's going to have 4 processors it had better be.

Quote:
[/b]the multiprocessing is distributd via a message passing interface.

this is main reason for delay in OS X.[/b]

Oh, I see. That's why we haven't seen Mac OS X ship yet. And here I thought I was just being delusional.

Please. You don't rewrite your OS and tell all your developers they have to rewrite their software to support a highly parallel achitecture just because you want a low power laptop.
Quote:
you are wrong if you think cooling engineering will let a 970 go in a powerbook. this is precisely the reason apple is going to this direction.

the 970 is very hot and suck lot power

Yes, this is true. At high speeds, at the current process size.
Quote:
if you add exotic form of cooling, you are likely to have very little battery life.

Which is why you implement things like speed step and look into solutions like cooligy's.
Quote:
as for VMX and FPU, you can guess what the solution is. half of work already have been done.

I don't think you get it.

The PPC970 has 1 SIMD (VMX), 1 scalar Integer and two scalar FPUs (and other assorted goodies, but lets not go there just yet) which is a nice blend of SIMD and scalar functionality. This makes it a good general purpose CPU.

What you are proposing would have 1 scalar integer, 1 scalar FPU and 1 SIMD. Not very well balanced. Four of them would just mean you're compounding the imbalance by a factor of four.
"Spec" is short for "specification" not "speculation".
"Spec" is short for "specification" not "speculation".
post #120 of 376
Quote:
Originally posted by Tomb of the Unknown
it's unlikely this is a direction that IBM and Apple would go for mobile computing. Especially not when process reductions and a bit of creative airflow engineering would provide more performance at less cost in engineering cycles.

You are dead wrong, my friend. You can keep coming up with "clever hacks" to keep big CPUs like the 970 cool in PowerBooks, keep refining the enclosure, but eventually you have to bite the bullet.

What is biting the bullet? Biting the bullet is recognising that CPUs can't keep getting hotter and using more power indefinitely, and finding a new way. That new way is increasing-parallel computing using small, extensible and fast chips like the 440 and the Crusoe.

Barto
Self Indulgent Experiments keep me occupied.

rotate zmze pe vizspygmsr minus four
Self Indulgent Experiments keep me occupied.

rotate zmze pe vizspygmsr minus four
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