PowerMac - Anyone else waiting? - Page 9

OK I can read now, you are questioning the 11/2003 announcement of the 1.8. I can buy that.


But it really depends on how Apple viewed the 1.8 addition, if they think that it was an update then they would have a different out look on it than we do. Did anything else change with the rest of the line? Like a slightly different chip set for the entire line? It doesn't have to be a faster processor to make it an update. Look at it like this: Apple waited a year and had little to show for it. IBM knows that they let Steve down not a way to a good working relationship. IBM and Apple know that they really need to come through. IBM recognized maybe early that clock speed was ending its life as an easy way to add performance. IBM had lots of experience using many different technologies on other chips for other customers. Maybe IBM made the original cell using a G5 and VMX units, ok maybe not. But I expect big things, because IBM has had lots of time to work on the problem. Time will tell.

Nice to hear some very positive G5 thoughts in here. I hope your right.

Looks like the game is going into high gear fast.

This will surely get a lot of attention at FOSE, April 5-7

Mar 1, 9:30 PM (ET)

By MATTHEW FORDAHL

SAN FRANCISCO (AP) - Promising improved performance without greatly increased power needs, Intel Corp. (INTC) unveiled details Tuesday of upcoming microprocessors that will put two or more computing engines on a single chip.

The world's largest chip maker plans to use the technology across its processor lines, from those powering mobile computers to the brains of high-end servers. In all, Intel has 15 projects under way developing dual-core or multi-core chips.

Intel plans to launch dual-core desktop chips in the second quarter, offering two varieties geared toward high-end and mainstream users, respectively. It's also planning dual-core and multicore chips for servers and notebooks for release later this year and in 2006.

The high-end desktop chip, dubbed the Intel Pentium Processor Extreme Edition, will run at 3.2 gigahertz - slower than the 3.8 GHz of today's top-of-the-line Pentium 4. Still, during one demonstration, it performed a task in half the time of its single-core counterpart.

Stephen Smith, vice president of Intel's Digital Enterprise Group, said performance improvements will vary depending on the job. Multicore chips offer the greatest improvement when the software is designed to distribute tasks over the multiple engines.

But the technology also should improve performance when multiple programs are running at the same time, he added. All modern PCs typically have several pieces of software working in the background, including antivirus tools, network utilities and others.

Also, the Extreme Edition's cores will use a technology that essentially nearly doubles the amount of work that can be handled by each core. Because of this, the operating system will work as though there are four cores, instead of the physical two.

The mainstream processor, dubbed the Pentium D, won't have that feature enabled. Smith also did not indicate that chip's clock speed.

The new processors' prices were not disclosed.

Intel isn't alone in bringing multicore chips to market. Rival Advanced Micro Devices also has plans to launch dual-core chips later this year.

And a trio of companies - International Business Machines Corp. (IBM), Toshiba Corp. and Sony Corp. (SNE) - are building a multicore chip based on a completely new architecture. It's expected to power Sony's next-generation PlayStation game console, among other devices.

The industry's move toward multicore processors comes as the number of transistors crammed on a single chip continues to increase in accordance with a famous prediction made by Intel co-founder Gordon Moore in 1965.

But while higher clock speeds are resulting in greater power demands, that is not translating into major gains in performance, threatening the historical growth in computing capabilities.

"It's the way the industry is going to be able to continue Moore's Law going forward by increasing the processing power in an exponential fashion over time," Intel CEO Craig Barrett told reporters at the company's forum for developers.

I thought IBM already made dual core Power processors, and announced this was going into the 9xx PPC architecture way before AMD. I like how they forgot to mention that processor. I hope IBM, and Apple beat them all to the punch on this. Come on WWDC.

That's funny. After they say that growth in transistors is not increasing performance, then this. I guess the exponent in the "exponential growth" is less than 1.

Yes, they make for quite some time now dual core Power processors, but where did they announce that this technology will make it down to the PPC9xx? I am not aware of any announcement like this.


IBM has beaten them long ago. But I doubt the duette Apple/IBM is so close to a dual core PPC9xx-based Power Mac release. Even if this happens in WWDC, in practice we talk rather about a parallel (PPC vs. x86) introduction of dual core processors and no about some advantage of the PPC side. Sad I would say, if one takes into account the long experience of IBM in these matters.

At early appearances I think AMD will still have a leg up on all of them, unless IBM starts using an on die memory controller which is what seems to give AMD all that power. You would think that being in a multi billion dollar company IBM processor designers would have figured this out already, and know exactly what to do. But you never know...

WOW! You design computer processors. You must be really smart? Duuuhhh.. I guess. \

Actually the power5 and power4 processors have on-die memory controllers, its just the 970 family that doesn't. I think this has something to do with apple? I also believe IBM was the FIRST company to design on-die memory controllers.

Either way, someone correct me if I'm wrong but I don't believe dual core is possible without on-die memory controllers.

That, I did not know, nor do I know if it's true, but it's good to hear as long as IBM takes great advantage of it.

That is like music to my ears.

Sure, it's possible. Just run two busses off the chip to a dual-ported memory controller.

You'll never see that in practice, though, because there's no reason to prefer that arrangement to an integrated memory controller. Busses traced across the motherboard are slower, more prone to interference, and more costly than on-chip busses.

I expect dual-core PPCs to start popping out of the woodwork this year and early next year. This is going to be an industry-wide transition.

I started thinking about that after I posted, anything is possible but who would be stupid enough to do it, the performance decrease would be too much... But like you said its more expensive and more prone to interference. Thanks AMorph.

Before people get all moist over Ondie memory controller let's temper that with a little info.

It's my understanding that on ondie memory controller benefits you chiefly in applications where memory latency is more imporant than overall bandwidth. Thus an Opteron will "kill" a Xeon in applications where latency is the prime pain point rather than massive througput.

I think sometimes at the desktop level IBM/Intel are loathe to utilize the extra transistors needed. Plus you have to make sure you have supported the right memory types or you'll have to add and external controller. I realize that now DDR is standard but soon we'll have XDR from Rambus and FB-DIMM from Intel. The market is going to have a bit of a shakeup possibly.

You said a lot, but are you just throwing that out there, or is there a point to it. I'm getting interested in this possible on die controller news, but I'm not sure what it was you were getting at. Were you getting at anything?

I think he means there are advantages and disadvantages to onchip memory controllers. Also that the technology can change from pros and cons to just pros?

Mainly my post is meant to temper excessive enthusiasm. Because on the intarweb you'll frequently see.

"OMFG!!!!!!!1111 Apple duzn't have teh Ondie mem controllerz..tehy suck!"

I think OMC will come (Freescale and 9XX chips) but I realize why IBM isn't putting them in the cpus yet. Sorry that my point wasn't that clear. I sincerely try to look at both sides of the coin but I have my bias like anyone.

Not that were even sure if they'll be in there anyway, but I was just curious.

It seems to me that Intel has drawn a fresh line in the sand.

What remains to be seen,
is who will cross it first and how.

Actually I think power has dedicated interfaces to off chip controllers. They aren't hooking directly to DDR memory with those guys.

Sadly this is wrong. Modern processors have an independant bus interface. That bus interface unit can be designed to communicate with two or more processors. Actually the unit is often communicating with the Cache. Adding another processor is not a big deal. What you do end up with is the potential for a squeeze on the FSB, that is not enough band width to effectively support both processors.

AS to what IBM/Apple will actually offer up that will be very interesting indeed. First we have to wonder how far the FSB can go beyond 1.5GHz. My thinking is that they would be far better off with an onboard memory controller, but Apple would really have to model this with the work loads they expect. There may be advantage to having the DMA circuitry off chip as the inteaction with the video card may be an issue.

Frankly I suspect that inorder to be really successfull and accomplish what Apple would want to accomplish they would have to implement a PPC chip with both a memory controller and an interface to the video card. Today that Video interface would be PCI-Express.

Dave

Thanks wiz. That about sums up what I was curious about at a few points.

Isn't the on-die memory controller at least required for a portable G5 since the existing Powermac memory controller is a furnace?

Power4 has an inline cache and memory architecture where the memory controllers are off-chip, inline with the off-chip L3 cache and on-chip L3 cache controllor. The main memory controller is in the off-chip L3 device. Main memory traffic had to go through all levels of cache to get to the processor.

Power5 has more of a backside cache and memory architecture where there is an on-chip backside L3 cache controller with off-chip L3 cache and an on-chip main memory controller. That is, main memory traffic didn't have to go through the L3 cache bus to get to L2 cache like in Power4. Main memory traffic can go directly to L2.


Very true, and in fact, reality for Intel. Intel's first gen dual core chips will use one Pentium GTL+ (whatever it is called and is now) front side bus to the system ASIC. The Pentium bus is a shared processor bus much like the Moto G4 processors where multiple processors can reside on one bus. Intel is just putting two Prescotts on one processor bus on the same chip. Said processor bus goes to the northbride (system ASIC) for main memory.

Always fear Intel though. They will be moving to multiple processor buses (FSBs) in later generations. Centrino dual-core chips will likely have an on-die memory controller, so all their bases are covered.


Simplest case should just be dual-core 970 with a large shared L2 cache (2 MB?) using the elastic processor bus. Provides minimal changes, like drop-in replacement, for Apple's architecture. I'm expecting Antares to be like this.

If it is dual-core with on-die memory controller, Apple will have to come up with a brand new Macintosh architecture with new core logic chipsets. That's a lot of work.


Hey, I suggested that 6 years ago. Also, Apple should have started an in-house fabless chip design group to design their processors and chipsets as well. As it was and is now, they can't even get IBM and Moto to do the little things to improve performance like more L2 cache or better FSB. They could have supported PC4000 or PC4400 DDR SDRAM for their 2+ GHz G5 systems too, but haven't, so they themselves have been laggards.

I really hope Apple proves they are not afraid of a lot of hard work. Steve jobs thanks them at every keynote on how hard they work. Because the second portion of what you said sounds like the best possible option for them, and us. (I base this solely on Opteron Performance vs. Everything else)

I was just reading about DOOM3 on the Mac, and it appears Apple is still struggling with OpenGL.
I don't see why they don't start re-designing, and re-vamping with performance in mind all across the board.

The thing I've noticed is their old reputation for Innovation is moving away from hardware, and into designing "artware". I think that is one of the main reasons their products (other than the iPod) just are not appealing as they used to be to legacy Mac users, and new ones alike. They do still have appeal, but it's nothing like it used to be. Not for me anyway.

THT, from what you said was the "simplest case", in that scenario what kind of performance gains could we expect to see?

We've been through this before, Its not just in apple's hands. Its in the Graphic Card Manufacturers, the software Developers and Apple's.

THen you didn't read what Aspire wrote did you? What I'm referring to is in apples hands.

[EDIT] Actually that's my bad. To benchmark they used the fastest ATI available on the Mac probably for affordability, and not for speed. If the would have used the Nvidia 6800 Ultra it would have been an entirely different perspective because Apple writes the Mac driver from the original source code from Nvidia. I'm not sure if Apple has anything to with ATI's drivers, but their (ATI's) OpenGL drivers could be questioned.

Although no matter what card you use they say performance will be 20% lower vs. a comparable PC.


It doesn't really matter who's hands you put it in. blaming everyone isn't going to make it 20% faster.

Intel is to be feared only as long as they are well managed. There is a reasonable question as to that being the case anymore. They still (after a couple of years) have not responded to AMD's challenge.

Yep that would be simple. But I do wonder what the cores will be in Antares. I do suspect though that Apple would prefer a more standard bus structure on the future processors they purchase from IBM. I could be completely wrong here, but elastic bus just doesn't impress me as something that a manufacture would want to support across all of its lines.

Well not exactly. They could still keep e-bus and simply handle memory transfers over the other bus. This owuld require modest changes to the north bridge. Better yet have memmory hanging off both buses with the block managed by the controller (northbridge) kept as share memory for the second processor module.

There are huge possibilities here, some more work than others. I just don't see the memory being so far from the processor as being a good thing at all for Apple. Especially when the get trounced by implementations that take care of that issue.

Well I'm not sure what is up with the PPC design capabilties. It is pretty obvious that Freescale when part of Motorola screwed up badly by not being customer oriented. I'm not sure if the same attitude is in place at Freescale now, they certainly could deliver a processor with the integration Apple could use. The question is will Apple ask for such a processor.

IBM and its 970 series is another joke all together. It is basically an OK processor that Apple can't use in half its hardware. Not exaclty inspiring. Further one could make the argument that for some machines like the iMac the 970 was shoe horned in and might not be the best of choices. So the question is can IBM deliver what Apple and the rest fo the industry needs. I think in Cell we can see the possibilites for future Apple processors. Hopefully soon we will see if IBM can transform the technology in Cell into hardware with broad appeal.

As to Apple doing its own in house design, well one only has to mention SUN. For processors to be viable they have to have broad apppeal plus a bit of committed marketing muscle. I'm not sure that that would be a good long term stradege. IBM did well with the 60x series but we have seen less take up with the 970 outside of Apple. This lack of take up appears to be the result of the processor being to specific to Apples needs. Or maybe IBM simply isn't marketing it effectively due to a possible short life span.

Dave

Do you have a link for their comment ?

A G5 equipped with a radeon X800XT beats a PC with a radeon X850 on quake 3 (which is, I think, the best game for a fair comparison).
Maybe it's because aspyr didn't port the game.

No the best way to compare would be to look at the G5 with the GFU, and the Opteron, with the GFU. But you'll never get 1/4th of the frames in DOOM 3 that you will with quake 3.

They only get 18.4 FPS at 1200x1600 with full 4x AA on in DOOM 3. Not that great. Not really playable really. Athlon with the GFU gets 45 FPS that more than duble the performance, and an Athlon with SLI gets 78 FPS that's 4.2 x the performance.

Don't be knocking aspire. They do great work. Remember that DOOM 3 wont take advantage of any dual CPU's either. But you can see it will take advantage of Dual GPU. HERE IS YOUR LINK

Performance-wise, they never were that great since the pre-486, 68030 days. They had a chance during the PPC 604 days, but the OS was lagging, IBM/Moto weren't exactly committed to the platform and Intel closed the window really fast with the P6 architecture CPUs.

I actually think the combination of OS X and dual CPU systems is the most innovative of their hardware compared to the past. So these days are pretty good for Apple.


As long as the memory performance is boosted similarly, Apple should see the typical 1.5x to 1.7x performance increase for multiple processors, with less scaling efficiency as they add more processors. Ie, 2 processors or cores at 1 GHz would be something like a 1.7 GHz single processor. 4 cores or processors at 1 GHz would be something like a 3 GHz single processor.

All for code that can take advantage of multiple processors of course. Code that is scalar won't see much improvement at all. The system will be very smooth and responsive though.

Thanks but I still don't see why you say the poor performance is apple fault. Nothing proves this so far. And where is the "20 % lower framerate no matter what card you use" you were refering to ?

In the link you asked for. Didn't you read the article after you asked to see it?




To sum it up.

That sentence was basically them saying this is typical, and it's not the game, or aspyres coding that doesn't perform on a Mac. It's essentially everything throughout the article is about the extent they went to to get this game running as fast as possible. They also say They will continue to try, and make the make the game perform better, and Apples periodic driver updates should hep as well.

Intel's fab capability is very forgiving to management and design mistakes. I don't see that going away. AMD better be scared because fab capability will win the dual-core wars, and Intel is going all dual-core from server to laptop afterall.


Bah. This is Apple we're talking about. They design hardware based on considerations more important to them than hardware performance. Laptop G5? Sure, Apple just needs to make it 1.5" thick. Cheap desktop G5? Use 1.6 970 CPUs with 1/3 FSB. They didn't even do the little effort to support PC4000 DDR SDRAM or better for the 2nd gen Power Mac G5s. That could have squeezed in another 5% performance improvement, maybe more for FPU.


I think this is too much of a kluge. If they are going to implement a non-uniform memory architecture they should at least arbitrate inter-processor traffic with a switched fabric. I think that is a major change in core logic and board design. On top of that, not quite sure how much of a performance improvement that would be compared to what they have now.


Memory architecture is about choices, and I don't see the 970 architecture as limiting. If latency is hurting 970 performance, IBM can increase L2 to 1 or 2 MB and add a backside L3. It did wonders for Power5. Also, the elastic bus is what allows Apple to place the memory so far from the processor. On bandwidth, the elastic bus does extremely well. Double its width to 64 bit would give it even more bandwidth.


The 970 holds its own. It's about equivalent to the Athlon 64 on a per MHz basis. Where it is hurting is integer performance and memory performance. If they can give it more integer resources, more L2 cache, a backside L3, more main memory performance and dual-core, it will be fine for the next year.


Not going to comment on Cell until more info is out.


Being fabless means you can take your design and go to different manufacturers. Apple already does it for its core logic chips, the CPU isn't that big of a difference to me. Ie, if IBM doesn't meet their needs, they can go to Intel, UMC, TSMC, TI or whoever has the best process. Freescale is out of the picture for high performance processors because that are about a year behind in fab technology. IBM and Intel have been shipping 90nm chips for about a year now and Freescale is yet to ship. They will only fall farther behind.

5%... don't you think that's a little high??

I have yet to see even DDR2-PC24300 have that much of a performance increase over PC3200... the theory is there, but I haven't seen the actual realworld performance... have any benches or anything? For them to move to PC4000 there would to have been a slight motherboard redesign. I personally don't think it's worth it... the performance difference between PC4000 and PC3200 is so tiny that the extra money going into R&D and testing would have been a waste. The only purpose I see in doing this is bragging rights.

Otherwise I agreed with your WHOLE statement.

Since when is PC4000 a JEDEC standard?

Does Apple have to use JEDEC approved memory? I wonder if JEDEC will approve XDR SDRAM?

No. Just look at the benches:

This Crucial Ballistix Tracer PC4000 Memory Review shows quite a bit of improvement for the Pentium 4 and Athlon 64. Anandtech would likewise say the same.


DDR-II is effectively quad pumped SDRAM. So DDR-II, PC2-4000 memory is 125 MHz SDRAM that can transfer 32 bytes/cycle (64 bits * 4/cycle) for a data rate of 4 GByte/s. DDR-I is double pumped SDRAM. DDR-I, PC4000 memory is 250 MHz SDRAM that can transfer 16 bytes/cycle (64 bits * 2/cycle) for a data rate of 4 GByte/s.

The reason, I believe, is obvious. DDR-II takes a latency hit due to its low clock rate at equivalent bandwidths to DDR-I, and therefore does not perform the same. The situation is no different from when DDR-I, PC1600 came on the scene and it didn't perform better than PC133 SDRAM memory. So, DDR-II won't have better overall performance than PC3200 until it has enough bandwidth and reduced latencies to make up for the lower clock. Maybe PC2-5400 will have better performance for all benches?


The 970 seems quite memory performance sensitive. PC4000 will produce real gains in performance.

I don't agree. All modern games are ported, not written for OS X. Also, most of them are directX. If OS X didn't allow to compete with PCs on games, then how a G5 could beat a PC with a better graphic card on quake 3 ? My conclusion is that quake 3 is the only well optimised game for OS X.
And looking at PC benchmarks, I would say that aspyr did a very bad job. I noticed framerates up to 3 times (!!) higher on high-end PCs with radeon X800XT, no matter what resolution and quality they used. I really don't think that OS X alone is responsible for that, because results are much closer between G5s and PCs on other games like halo and UT2004.

Doom 3 is an OpenGL game not a Direct X game no matter what platform. And you can't make a comparison of two systems using different cards. You need to use the same card. Apple has an OpenGL driver problem that they can't seem to get together. Quake 3 was never written ground up for OS X either. It still uses legacy CFM code. It's hardly gong to be the staple for comparison in anything for OS X. So unless I'm mistaken about that your conclusions are wrong.

Well, Quake 3 was at least developed in-house by id Software where Graeme Devine kept the Mac version up to date with the Windows version. In later versions, he even added lots of PowerPC Assembly optimizations and built in some Altivec support.

With Doom 3 being developed outside of id software, I would assume that it can't get quite as much attention to detail as quake 3 was given.

It is also one of the rare games that has SMP support, which is a definite benefit on a platform with quite a few dual processor machines.

Saturday will be 100 days past the average due update. And I think they are using the SP 1.8 GHz downgrade as an update cycle.