Originally posted by Telomar
Current multithreaded programs would run quite happily on MS' design after a recompile. There is nothing particularly spectacular about their core though.
It's not that the cores are "spectacular," whatever that means. It's that the design decisions they made are pretty novel. The trend had been toward wide cores with massive scheduling flexibility, and now this.
That said they would handle general purpose code about as well as the G4+.
Two major differences: 1) The G4 has lower latency access to RAM (better for lots of random access), while Cell has (significantly) higher bandwidth (better for streaming). 2) The G4 recovers quickly from a failed branch prediction, because of its 7-stage pipeline. The same scenario will make Cell, with its over-20-stage pipeline, unhappy. So code with lots of conditional execution will probably run better on the G4 (which can currently outrun the 970 on such code). Of course, Cell will crush the G4 on floating point, any kind of filtering or blitting code, etc. And that's before
you bring the SPEs into the equation.
Once you bring the SPEs into the equation, Cell gets a whole huge gob of performance, but the PPE spends more of its time managing the SPEs (the simple integer units on the G4 have a roughly analogous role, freeing the complex unit to focus on actual work while they handle the simple arithmetic that frequently accompanies FP and AltiVec code).
The debate over processor stages and in order and out of order design is somewhat moot given at the end of the day it is designed to do a specific task and decent frameworks and compilers will hide most of that unless you want to hand optimise it.
It becomes an issue once your code is running on a G4 and
a G4+ and
a 970 and
Cell—in single and dual and single-threaded and SMT configurations. Apple is trying to make it so that most of those issues will be handled by their frameworks, but at the end of the day, Cell on Macs will leave developers (Apple's and others') with three discrete performance profiles to target. Every new profile doubles the amount of testing necessary.
Cell is unique for the SPEs but again the PPE isn't new technology. Just a redesign of what was already out there.
No, Cell and Xenon are the first products in a discrete development line. They do not inherit from the 400, 700 or 900 series, and their philosophy is different from any of those three lines. I'm not sure what qualifications you require for "difference," but I suspect that it would be something alien enough that it couldn't implement POWER with anything like native performance. Obviously, the need to implement POWER constrains them from coming up with something really
I would be very surprised to ever see Apple adopt cell. It'd be absolutely atrocious in anything outside of multimedia and rendering in its current state. For a general CPU MS has the right idea and in fact I expect they chose that route precisely for that reason, so they can run more general apps on their console rather than focus on multimedia. In the end I doubt they will ever use either since they both produce too much heat.
I'd be surprised if either produces much more heat than the first 2.5GHz 970s. Even if they do, the Power Mac case is big and overdesigned enough that it had damn well better be able to a accommodate a few more watts.
Cell is automatically more attractive than Xenon simply for having standard AltiVec.
It's more attractive, too, because it's not a fixed design. That token ring bus is there for a reason. Sony asked for one PPE and 8 SPEs. Apple can ask for something else. I imagine they'd be keenly interested in something that boosted multimedia performance as much as the SPEs can (Apple coined the term "multimedia," after all, and they just hitched their wagon to the computationally intensive combination of H.264 and HD).
As an aside the idea of specific silicon to speed up certain processes is hardly new. Taking it on chip was a new slant but is the sort of thing you'd expect in tvs, consoles, set top boxes and other areas where cell might appear. General purpose computers have tended to use entirely separate add in cards.
SoC designs are nothing new, but high-end SoC implementations are. Most SoC designs are adopted for cost reasons.
The main advantage to bringing the SPEs on chip is the same as the advantage of bringing AltiVec on chip: If you add something new that programmers have to be aware of
, it had better be common or (preferably) standard, or it will be ignored. The old AV series Macs had a separate DSP chip. Hardly anything used it. AltiVec adoption has just started to really take off in the last year. (That's why it's so important that the implementation not change much from chip to chip—if it's not a consistent and well-supported platform, developers will stick to the general-purpose code that they know works.) If Apple does use Cell with the SPEs, they'll be making a commitment. But that commitment will pay off in the form of massive performance in exactly the sort of areas where Apple is strongest. The fallback—generic PPC code running on the PPE—won't be so bad, either, although as with all implementations there will be edge cases where it doesn't perform so well.