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G5 - The truth - Page 12

post #441 of 490
(Bump!)

So Trinity has re-arisen!! (Cube technology apparently used for the new iMac; see <a href="http://www.timecanada.com" target="_blank">Time Canada</a>)

Um, so now what? Dolphin?

Screed

[ 01-07-2002: Message edited by: sCreeD ]</p>
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post #442 of 490
[quote]Originally posted by KidRed:
<strong>haha. So what are you saying then Programmer?</strong><hr></blockquote>

Nothing, I thought I made that clear...


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post #443 of 490
OK, now we have some more evidence to base the speculation on.

The new iMac is indeed a G4.

Which means, the G5 is definitely on its way.

I remember posting in one of these threads a while ago reminding people that for Apple to have the impact of the original iMac, they must push its specs very close to the highest end PowerMac, just like they did in 1998.

Of course, this doesn't mean they won't re-introduce a clearer differentiation between the professional and consumer lines with a G5 at the next MacWorld.

God knows they seriously need G5s that perform at least twice as fast as the current G4s in their PowerMacs but whether we'll get them tomorrow, I don't know.
post #444 of 490
[quote]Originally posted by Dorsal M:
<strong>It's been a while and much has happened in the interim, but some things never change, especially the over optimistic and over pessimistic fellings shared on this board. But it's good to know some things never change. One thing i don't know is how this rumor about the G5 is so widespread. So far I have yet to see one in any lab allthough I don't doubt they exist; inside Apple labs. What we have seen though, is widespread use of the 7460 which is basically a 7450 with an improved method of manufacter. Still this is nothing to sneeze at. They offer linear performance over the 7450 at better speeds. The range so far has been ~900-1400MHz but it is hard to give exact numbers due to the variety of motherboards they exist on. I was shocked when the newer motherboard we were working on were not released at the Expo this past summer. Fully working DDR-SDRAM motherboards were ready with a full assortment of modern motherboard features including Fibre Firewire at speeds up to 1600Mbps with a fibre port and 2 lower speed (800Mb) normal ports. USB1.1 was still there but the board had support for DDR-SDRAM and an advanced system bus running at 266MHz. They were to include CPU's running at up to 1GHz. Perhaps faster CPU's were hard to come by.
Of couse they could have put that plan on ice and wait for the recently announced 333Mhz DDR-SDRAM. The board was fully compatible with the newer SDRAM standard and easy to impliment. this of course would imply the cpu bus to the main controller would be accordingly sped up to provice sufficient bandwidth. Internally on the main controller (memory+PCI+peripherals (there is no seperate southbridge controller)) there is a hyper transport link from PCI controller and peripherals such as ATA/133, USB, audio (also new), etc. Firewire and ethernet have their own seperate connections. This is an advanced peice of silicon. No, to me the only reason to release this board that is all ready this Expo is simple; many of the advanced features would go unused. perhaps there would have been a lack of advanced firewire peripherals. Or maybe they wanted to see the outcome of the memory wars between RAMBUS and the DDR consortium (there was in fact RAMBUS based prototypes of G4 systems floating around that we never came in contact with). In just over a month we will see a leap in performance from Apple's high end. It should be enough to justify their role in high end applications for years to come. We'll see.</strong><hr></blockquote>

Moving this up to the top. Where the hell are you Dorsal? Weed need the insider jam baby!
post #445 of 490
Hm, I would not expect too much of a company like Moto in the current state.

However, I wouldn't expect much from any company like Moto that does not even show a major product like the PowerPC processor in the featured products list on its own website.

Sad but true.

Moto's sig: We don't link to PPC.
post #446 of 490
[quote]Originally posted by Kate:
<strong>
Moto's sig: We don't link to PPC. </strong><hr></blockquote>

Maybe the sig can change to this:

We admit we suck
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post #447 of 490
[quote]Originally posted by Kate:
<strong>However, I wouldn't expect much from any company like Moto that does not even show a major product like the PowerPC processor in the featured products list on its own website.</strong><hr></blockquote>


That's hardly a fair accusation -- go to motorola.com, click semiconductors, click PowerPC ISA. Why aren't they on the main page, front and center? Perhaps because the main visitors to Motorola's main page are looking for consumer products. If you're looking for chips then you'd probably go straight to e-www.motorola.com, which does mention PowerPC right there.

Go to IBM's main page, they don't even mention their Microelectronics division. Motorola and IBM are like this because they are huge, diverse companies with lots of varied products.
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post #448 of 490
Motorola: For CPUs that don't suck (hard enough)
post #449 of 490
{Bump}

Dorsal man where the hell are you?
post #450 of 490
Here's some older but obscure links on the e500 core (core of the G5). Some interesting notes too,

This one says products expected to be available in the first half of 2002.

<a href="http://www.improvsys.com/Dynamic/techonline071301.html" target="_blank">http://www.improvsys.com/Dynamic/techonline071301.html</a>

This one is the only concrete mention of a 7 stage pipeline (like the one in the 7450) being used in the e500.

<a href="http://www.siliconstrategies.com/story/OEG20010612S0064" target="_blank">http://www.siliconstrategies.com/story/OEG20010612S0064</a>
post #451 of 490
double post

[ 01-19-2002: Message edited by: Outsider ]</p>
post #452 of 490
I'm just a novice when talking about procs, but I was wondering....could the G5 be sharing the same technologies that the PS3's (Playstation 3) chip is supposedly going to have? After all, from outsider's articles he posted, the location of the new G5 with the book e core seems to be in the same place as the PS3's chip, I think codenamed the "cell"
post #453 of 490
[quote]Originally posted by Outsider:
<strong>Here's some older but obscure links on the e500 core (core of the G5).</strong><hr></blockquote>

Everybody keeps talking about the e500 core like it is definitely going to be the core of the G5 that Apple will use. There is no proof of this, and it seems to arise soley from the fact that Motorola has chosen to announce this core as the centerpiece of their G5 embedded strategy. The e500 core is less superscalar than the G4's core, and clearly not intended to be a desktop processor. None of their documentation even hints at the core being intended for the desktop market (just networking, automotive and embedded consumer devices). Very low power is the emphasis.

The PowerPC design center at Somerset has done multiple cores at the same time before -- 3, in fact. The 603, 604, and 620 all were designed in the same time frame, and they are all the "G2" PowerPCs. The 603 carried on to become the 740/750 (G3), while the 604 was dropped because the 750 turned out so well the extra expense of the 604 wasn't enough of a payoff. The 7400 (G4) was a 750 with AltiVec added and several improvements to improve performance that were along the lines of things that had been in the 604. The 620 never got established in its target market (servers) and was dropped due to a total lack of demand.

None of this implies that the e500 core must be the core of the G5 that Apple will use. That Apple's G5 will likely be 64-bit implies that it is not the same core. Indeed, the long time between the 7400 and the 7450, and now the 7460 seems to imply one of three things: (a) the design center was massively downsized, (b) they're all just loafing about, or (c) they're working on something else at the same time.
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post #454 of 490
[quote]Originally posted by G-Dog:
<strong>I'm just a novice when talking about procs, but I was wondering....could the G5 be sharing the same technologies that the PS3's (Playstation 3) chip is supposedly going to have? After all, from outsider's articles he posted, the location of the new G5 with the book e core seems to be in the same place as the PS3's chip, I think codenamed the "cell"</strong><hr></blockquote>

I doubt very much that the two are at all related. Its possible that Sony could abandon the MIPS processor that it currently uses, but I doubt it (although I suppose there is always hope). I didn't see any PS3 references on either of the links Outsider posted -- is there one in particular that you are looking at?
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post #455 of 490
You're right, the e500 core could be a very scaled down version of the core that WILL be used in G5 desktop computers. Hopefully Apple has had a heavy hand in the design of the processors that will be going into their future computers and will just use Motorola as a manufacturer. Or better yet have a manufacturer with a better track record make an Apple designed processor with technology licensed from Motorola. The problem is that none of these companies are disclosing ANY information... it's like they're deliberately trying to close down the FH forums! Those bastards!
post #456 of 490
This post of Dorsal's suggests that he's a fake. If he had actually been testing G4 mobos with a frontside bus that supports DDR RAM at 266 MHz, then we would have seen these on the XServe. Instead we find out that the G4 doesn't even support a bus like the one Dorsal claims to have tested.

It's a hoax, people.
post #457 of 490
[quote]Originally posted by Junkyard Dawg:
<strong>This post of Dorsal's suggests that he's a fake. If he had actually been testing G4 mobos with a frontside bus that supports DDR RAM at 266 MHz, then we would have seen these on the XServe. Instead we find out that the G4 doesn't even support a bus like the one Dorsal claims to have tested.

It's a hoax, people.</strong><hr></blockquote>

The 7460/ 7470 already supports 266MHz/ 333MHz DDR-RAM.
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post #458 of 490
[quote]Originally posted by Junkyard Dawg:
<strong>This post of Dorsal's suggests that he's a fake. If he had actually been testing G4 mobos with a frontside bus that supports DDR RAM at 266 MHz, then we would have seen these on the XServe. Instead we find out that the G4 doesn't even support a bus like the one Dorsal claims to have tested.

It's a hoax, people.</strong><hr></blockquote>

! Not A Hoax !
-at least some info too accurate. And now that I think about it, this makes me more hopefull of a FSB that supports DDR in July. A DDR disparity between the Xserve and Powermac would be very Apple. But I think Apple is in part trying to make up for a slow FSB by offloading some tasks traditionally performed by PC CPU's, thereby utilizing their modular design to speed things up.

P.S. Does anyone have more info on what tasks bypass the G4?

And what about rates of silicon errata being not as harsh in G4? or does that belong in new thread?

[ 05-27-2002: Message edited by: pey/coy-ote ]</p>
post #459 of 490
[quote]
The 7460/ 7470 already supports 266MHz/ 333MHz DDR-RAM.
<hr></blockquote>

According to rumor, maybe even a rumor that started with Dorsal's post.

Dorsal posted this last year. If such Macs were being field tested so long ago, then why doesn't the XServe have a bus that supports 266 MHz DDR-RAM?

The only explanation is that Dorsal was not actually testing such hardware. Otherwise the XServe would have used it.

This doesn't mean that the G5 doesn't exist, or that it won't be out soon....all it means is that Dorsal is a hoax.
post #460 of 490
[quote]Originally posted by Junkyard Dawg:
<strong>

According to rumor, maybe even a rumor that started with Dorsal's post.

Dorsal posted this last year. If such Macs were being field tested so long ago, then why doesn't the XServe have a bus that supports 266 MHz DDR-RAM?

The only explanation is that Dorsal was not actually testing such hardware. Otherwise the XServe would have used it.

This doesn't mean that the G5 doesn't exist, or that it won't be out soon....all it means is that Dorsal is a hoax.</strong><hr></blockquote>

The 7470 isn´t available now. The 7455 don´t have full DDR-RAM support.

Moto are manufacture now chips in 0.13µm. A prototype of the 7470 exists more than a year ago, i think.

Another thought: Moto are now fab chips in 0.13µm. This means that the G5 (MPC8500) could be fab, too. The e500 core already exists, the MPC8540 is ready for shipping.

Have you read this?

<a href="http://www.geek.com/news/geeknews/2002may/bch20020524011893.htm" target="_blank">http://www.geek.com/news/geeknews/2002may/bch20020524011893.htm</a>

If IBM fab the next generation PowerPC chip for Apple we can wait til MWNY 2003, i think.
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post #461 of 490
That geeknews report is nonsense. Also, why would the G5 be cancelled, and yet they have highly detailed specs on the G5! That doesn't make any sense.

What I'm saying is that if a G4 supported a DDR frontside bus, and that G4 was about to ship, then why would Apple use a DDR hack on the XServe? It would make more sense to add true DDR support to the XServe using the CPU.

True, it could be that Apple wanted the XServe out in time for edu buying, and they can ship the Powermacs much later, even September.

Still, Dorsal said these G4s with DDR support were running at 1 GHz...same as current G4s.
post #462 of 490
[quote]Originally posted by Junkyard Dawg:
<strong>Still, Dorsal said these G4s with DDR support were running at 1 GHz...same as current G4s.</strong><hr></blockquote>

nonono, s/he said like in china girl from bowie
oh well whatever...
Dorsal said: "They (7460) offer linear performance over the 7450 at better speeds. The range so far has been 900-1400MHz but it is hard to give exact numbers due to the variety of motherboards they exist on." again...
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post #463 of 490
[quote]Originally posted by Junkyard Dawg:
<strong>why would Apple use a DDR hack on the XServe? It would make more sense to add true DDR support to the XServe using the CPU.</strong><hr></blockquote>

Maybe because they don't have the DDR G4 and the mobo could at least be more efficient with the I/O (ethernet, ATA).
So if we put a DDR G4 in this mobo. We have what we wanted for a long time. and maybe this mobo support DDR PC-2700 @ 333 Mhz... who knows?
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post #464 of 490
[quote] Maybe because they don't have the DDR G4 <hr></blockquote>

That's my point. There is no G4 that supports a DDR RAM frontside bus. If there were, then Apple could have used it in the XServe and forgot about spending the resources to develop a DDR hack solution.

This leads me to believe that there will be no true DDR support until the G5 and RapidIO arrive.
post #465 of 490
It's possible ( even likely) that Dorsal was testing prototype chips not made on a full scale fab. If those chips were designed to be fabbed on a 0.13 micron process (which he indeed suggests) then they won't be available 'till moto's 0.13 fabs are up and running (even if the chip itself is already finished), wich is just now happening, or is soon about to happen, depending on who you believe.

..so no JYD I don' buy your argument at all. That doesn't necessarily mean Dorsal is/was a real source though.
If he isn't, he's damn good though
post #466 of 490
[quote]Originally posted by Junkyard Dawg:
<strong>

That's my point. There is no G4 that supports a DDR RAM frontside bus. If there were, then Apple could have used it in the XServe and forgot about spending the resources to develop a DDR hack solution.

This leads me to believe that there will be no true DDR support until the G5 and RapidIO arrive.</strong><hr></blockquote>


the technical aspects are above me but I don't think what Apple has done is a hack. All they did was make the memory bus DDR. They didn't really hack anything. They could have probably done that a while ago but instead were waiting on Motorola to do something with the FSB but couldn't wait any longer
post #467 of 490
[quote]Originally posted by Junkyard Dawg:
<strong>That's my point. There is no G4 that supports a DDR RAM frontside bus. If there were, then Apple could have used it in the XServe and forgot about spending the resources to develop a DDR hack solution.

This leads me to believe that there will be no true DDR support until the G5 and RapidIO arrive.</strong><hr></blockquote>

The fact that Apple didn't use the supposed DDR-ready G4 in the Xserve simply means it wasn't ready or appropriate for the Xserve. It does mean that Apple has started buying lots of DDR RAM, however.

Given the statements by the Motorola rep about the positioning of MPX in the semiconductor market, however, I'm not optimistic about seeing a DDR MPX bus. Processor support for DDR will have to wait until the memory controller moves onto the chip. We currently have no hard information on when that will be. It could be MWNY, or it could be next year. It could be a modified G4, or a new fangled G5. That the Xserve didn't go there just means it was either not yet ready or not appropriate (i.e. the server market might prefer a tried and true processor, rather than a new unproven one).
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post #468 of 490
First, I agree that it looks like DDR MPX will never happen. I also agree that that's not a bad thing.

[quote]Originally posted by Programmer:
<strong>That the Xserve didn't go there just means it was either not yet ready or not appropriate (i.e. the server market might prefer a tried and true processor, rather than a new unproven one).</strong><hr></blockquote>

Hell, for all I know the XServe customers are happy that no matter how much the CPUs get hammered, a certain amount of memory bandwidth for DMA is guaranteed.
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post #469 of 490
I don't fully understand the function of the MPX Bus. Would anyone care to enlighten me, please? currently, I think it connects PCI-RAM-Disk I/O to the Processor, but I also think I'm incorrect. An ACSII diagram would be helpful.
post #470 of 490
[quote]Originally posted by Junkyard Dawg:
<strong>That geeknews report is nonsense. Also, why would the G5 be cancelled, and yet they have highly detailed specs on the G5! That doesn't make any sense.

What I'm saying is that if a G4 supported a DDR frontside bus, and that G4 was about to ship, then why would Apple use a DDR hack on the XServe? It would make more sense to add true DDR support to the XServe using the CPU.

True, it could be that Apple wanted the XServe out in time for edu buying, and they can ship the Powermacs much later, even September.

Still, Dorsal said these G4s with DDR support were running at 1 GHz...same as current G4s.</strong><hr></blockquote>

Ok, however. I am more interesting about G5.
I am very confused about G5 informations.

Looking at Geek, Architosh, The Register.

Architosh writes about G5 test boxes:

<a href="http://www.architosh.com/news/2002-02/2002b-0201-futurg5.phtml" target="_blank">http://www.architosh.com/news/2002-02/2002b-0201-futurg5.phtml</a>

The Register writes that the G5 are ready for volume production early next year with rates at 2.4GHz.

If this is true, than the G5 could ready in September with rates at 1GHz!?

Alsoft, i think writes in January about the G5, also Epson.

Steve Jobs knows, that everybody is waiting for the G5 and people are holding off orders.

If there is no G5 in the near future, why dosen´t he saying there is no G5?
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post #471 of 490
[quote]Originally posted by Programmer:
<strong>
Given the statements by the Motorola rep about the positioning of MPX in the semiconductor market, however, I'm not optimistic about seeing a DDR MPX bus. Processor support for DDR will have to wait until the memory controller moves onto the chip.</strong><hr></blockquote>
It DOES make sense for moto to develop a DDR capable version of the next G4, if apple pays for the extra R&D.
Now, does it make sense for apple to pay? It might, if you consider that the chip is going to live on in the consumer macs (and portables, in the case of the 7460 version) for a long time after it's successor (what ever it may be) has taken over the PMs. In this light it doesn't appear to be such a stopgap solution.
Im not saying it's going to happen, just that I'm not so dead certain as some, about it not happening.
post #472 of 490
Architosh writes about G5 test boxes:

<a href="http://www.architosh.com/news/2002-02/2002b-0201-futurg5.phtml" target="_blank">http://www.architosh.com/news/2002-02/2002b-0201-futurg5.phtml</a>

Because of the way they use the word [Boxes], I fear someone saw new the new case and/or Xserve type mobo, and assumed it would ship with the G5 CPU. I fear what is ready for July uses the G4 (if so hopefully in a quad configuration, -(sadly no entirely credible rumors of DDR FSB for G4's exist?))

If Steve said no G5 untill XXdate the whooshing sound you heard would be the price of AAPL stock going down the toilet.
post #473 of 490
If I bought '1.4' DDR dual machine with SDR or DDR in July (should such machine be available...) I'd consider myself hard done by if Apple release a 2.4 gig G5 in January.

That seems one helluva leap.

If they have 2.4 G5s by January...then why not ship some down clocked G5s now? If they are as powerful as rumours suggest then a 1 gig - 1.6 gig G5 on Rapid Io would suffice.

If all these rumours are true, Apple are playing one hell of a game of 'catch up'.

I think next Jan' is shaping up to be the time to buy...

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post #474 of 490
MWSF will only be the time to buy if there is another "silent" Powermac update this summer. Otherwise, Apple is going to blow their load at MWNY and MWSF won't have much to offer.

We can safely say that Powermacs will get new muthaboards this summer. So the question is what sort of CPU? Either:

1. G5 w/ RapidIO, 130 nm process. PC 2100 or PC 2700.
2. G4 w/ RapidIO, 130 nm process. PC 2100 or PC 2700
3. G4 w/ 133 MHz MPX frontside bus, same as current G4 but clocked higher. XServe DDR hack solution.

One of these implementations is going to be introduced and Apple will milk it for a while. Unfortunately, #3 is most likely, with a 20-40% bump in clockspeed. #2 would be very nice, and probably would bring up to a 50% bump in clockspeed. #1 is a wet dream and could bring up to a 100% bump in clockspeed.

I fear #3 is what's going to happen. We're going to be stuck with a hacked DDR solution for years, and it may signal Apple's demise in professional markets that require high performance workstations.

[ 05-27-2002: Message edited by: Junkyard Dawg ]</p>
post #475 of 490
[quote]Originally posted by LowB-ing:
<strong>
It DOES make sense for moto to develop a DDR capable version of the next G4, if apple pays for the extra R&D.
Now, does it make sense for apple to pay? It might, if you consider that the chip is going to live on in the consumer macs (and portables, in the case of the 7460 version) for a long time after it's successor (what ever it may be) has taken over the PMs. In this light it doesn't appear to be such a stopgap solution.
Im not saying it's going to happen, just that I'm not so dead certain as some, about it not happening.</strong><hr></blockquote>

I disagree -- the better solution for consumer, desktop, and portable machines is to move to a RapidIO / on-chip memory controller solution. Better integration, easier to build motherboard, better performance. Apple's money would be better spent accelerating development of the forward looking solution, rather than developing a bus that only they will use and that makes it harder to build motherboards.
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post #476 of 490
[quote]Originally posted by Junkyard Dawg:
<strong>
We can safely say that Powermacs will get new muthaboards this summer. So the question is what sort of CPU? Either:

1. G5 w/ RapidIO, 130 nm process. PC 2100 or PC 2700.
2. G4 w/ RapidIO, 130 nm process. PC 2100 or PC 2700
3. G4 w/ 133 MHz MPX frontside bus, same as current G4 but clocked higher. XServe DDR hack solution.

I fear #3 is what's going to happen. We're going to be stuck with a hacked DDR solution for years, and it may signal Apple's demise in professional markets that require high performance workstations.

[ 05-27-2002: Message edited by: Junkyard Dawg ]</strong><hr></blockquote>

i agree, #3 looks inevitable. otherwise, apple would have easily just released an Xserve without the DDR memory.

why go to the trouble with the DDR hack, if Rapid i/o is prime-time? They would have just stayed with PC133, unless they plan to push the fake DDR into the consumer level Imacs and the Powerbooks and give the Powermacs Rapid i/o + "G5" at mwny.
post #477 of 490
Wow, look at all the giant gerbils. We're being overrun by small furry mammals!
post #478 of 490
[quote] They would have just stayed with PC133, unless they plan to push the fake DDR into the consumer level Imacs and the Powerbooks and give the Powermacs Rapid i/o + "G5" at mwny.
<hr></blockquote>

Now there's an idea!

Since the G4 has a long life ahead of it in Apple's portables and low end desktops, then perhaps the DDR hack is going to live on in such computers. Meanwhile the Powermacs get G5s and RapidIO.

This could be interesting. Although I'm under the impression that a RapidIO unit could be "bolted" onto the G4 as easily as the MPX bus. If so then why not make all desktop PPC chips (G4 and G5) with RapidIO, and let Apple choose which kind of RAM they want to use? Apple could use PC2100 in the low end Macs, and PC2700 in the Powermacs.
post #479 of 490
post #480 of 490
It sounds as if we're intimating another Yikes! But, instead of a G4 on a (essentially) G3 board -- a G4 on top of a G5 board.

I would hope that Apple has had enough time to leap that particular move.

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