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New Intel process to deliver ultra-low power mobile chips

post #1 of 15
Thread Starter 
Intel, the world's largest chip maker and soon to be Apple supplier, is developing an ultra-low power version of its high-performance 65 nanometer (nm) logic manufacturing process that will allow it to produce very low-power chip for laptops and small-form factor devices.

This new ultra-low power 65 nm process will be the company's second process based on 65 nm process technology. It will provide Intel chip designers additional options in delivering the circuit density, performance and power consumption required by battery-operated devices, the company said this week.

To achieve these advancements, Intel made several modifications to the design of the transistor. Lost electricity leaking from these microscopic transistors, even when they are in their "off" state, is a problem that is a challenge for the entire industry.

According to the company, the modifications will result in significant reductions in the three major sources of transistor leakage: sub-threshold leakage, junction leakage and gate oxide leakage, which translates into lower power requirements and increased battery life.

"With the number of transistors on some chips exceeding one billion, it is clear that improvements made for individual transistors can multiply into huge benefits for the entire device," said Mark Bohr, director of Intel Process Architecture and Integration. "Test chips made on the ultra-low power 65nm process technology have shown transistor leakage reduction roughly 1000 times from our standard process."

Intel's 65 nm processes will feature transistors measuring only 35 nm in gate length, which it says will be the smallest and highest performing CMOS transistors in high-volume production. By comparison, the most advanced transistors in production today, found in Intel's Pentium 4 processors, measure 50nm. Small, fast transistors are the building blocks for very fast processors.

Building chips using the 65 nm processes will also allow Intel to double the number of transistors it can build on a single chip today.

The lack of high-performance, yet low power, PowerPC G5 chips from IBM has been cited as one of the major reasons for Apple's switch to Intel processors. The Mac maker, which has so far been unable to upgrade its professional PowerBook G4 laptops beyond 1.67GHz, hopes to ship Intel-based laptops by the middle of next year.

Intel said it would design future mobility platforms to take full advantage of both of its 65 nm manufacturing processes.
post #2 of 15
cool
...if it helps make my future powerbook sexier and nicer
post #3 of 15
Quote:
Originally posted by nathan22t
cool
...if it helps make my future powerbook sexier and nicer

I want a nice looking laptop, but what this does is improve battery life, system speed while still allowing the slim form factor.

I thought the Google ads were funny:
Trench Gate Mosfets
On Transistors
System On a Chip

Interesting, but not really that relevant.
post #4 of 15
It doesn't seem as though these chips will be used in a laptop, but rather in a small handheld device such as a PDA or PDA like phone.

This design has already been critisized as going one step fowards, and one step backwards. By thickening parts of the transistors the speeds will be cut in half.

We'll have to see how this pans out, but don't hope for a Merom based on this anytime soon.
post #5 of 15
Can a mod merge this thread with the "Ultra low-power chips from Intel" thread I created yesterday?

Intel seems to target those transistors for XScales, but if they used it for building x86 CPUs, I'd sure like to see two of them in an extremely light-weight and thin Book Mini with a 11" screen and flash only mass storage by 2007-2008.
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post #6 of 15
Quote:
Originally posted by The One to Rescue
Can a mod merge this thread with the "Ultra low-power chips from Intel" thread I created yesterday?

Intel seems to target those transistors for XScales, but if they used it for building x86 CPUs, I'd sure like to see two of them in an extremely light-weight and thin Book Mini with a 11" screen and flash only mass storage by 2007-2008.

Yes, but again, if it cuts the speed of the chip in half, what good is it? It may not matter for handhelds.
post #7 of 15
Hmm, I doubt this will make it to the first Mactel notebooks. That is, if the first notebooks are to be the products released in June 06?...

The fact that there's another PowerBook upgrade to come suggests maybe not, I guess. Any speculation?
post #8 of 15
Quote:
Originally posted by jdbartlett
Hmm, I doubt this will make it to the first Mactel notebooks. That is, if the first notebooks are to be the products released in June 06?...

The fact that there's another PowerBook upgrade to come suggests maybe not, I guess. Any speculation?

Well, the analysis in the industry has been that Apple will do the iBook first, with some version of Yonah, probably the single core version in the first half of the year, near or at June, possibly the Mini at the same time with the same chip.

The PB will come in the second half, with Merom. One or two cores??? It will be 64 bit, as that's the first 64 bit mobile chip Intel will have.

The iMac is supposed to be next, and last the Powermac somewhere in late 2007.

The eMac???

These aren't my words (so to speak), but what is the conventional wisdom. So don't get mad at me.

Who knows what going to happen before the x86 chips? With Freescale being such a good supplier and all.
post #9 of 15
Quote:
Originally posted by The One to Rescue
Intel seems to target those transistors for XScales, but if they used it for building x86 CPUs.

Keep in mind Intel is planning on moving x86 down into the embedded and "handtop" space. They're looking to have one architecture cover everything and this allows them to get into those very low power areas without significantly modifying their standard designs. I don't think they'll use this for XScales in the long term, I think they'll use it to replace XScale.
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post #10 of 15
We may see a reduction in transitor speed but remember that would be relative to Intels other 65nm proceses. This still could lead to an extremely fast notebook processor. relative to todays processes anyways.

Further; 65 nm allows so many enhancements that one will have to reconsider how comparisons are made. Specifically 65nm offers these possibilities in the future:
1.
Multicores most likely more than 2 probably more than 4.
2.
Much higher integration, the possibilities here include moving the north bridge on chip or its fucntional replacement. More cache memory or even possibly system memory.
3.
Enhancements to the processors 64 bit environment. This could include new execution units, intstructions or other optimizations.

Of course we may not see any of the above but that is not likely to happen. First newer generations of OS'es and user applications will be needing the SMP hardware. No matter how well Intel is able to retool its processes for higher clock rates the reality is that a single processor just won't be able to handle the load in the future. Second Intel has to continue to respond to threats from AMD which in my mind is really the only thing driving Intel these days. It can be argued that AMD is already ahead with respect to integration and is only lacking in process technology.

Dave


Quote:
Originally posted by melgross Yes, but again, if it cuts the speed of the chip in half, what good is it? It may not matter for handhelds.
post #11 of 15
Quote:
Originally posted by wizard69
We may see a reduction in transitor speed but remember that would be relative to Intels other 65nm proceses. This still could lead to an extremely fast notebook processor. relative to todays processes anyways.

Further; 65 nm allows so many enhancements that one will have to reconsider how comparisons are made. Specifically 65nm offers these possibilities in the future:
1.
Multicores most likely more than 2 probably more than 4.
2.
Much higher integration, the possibilities here include moving the north bridge on chip or its fucntional replacement. More cache memory or even possibly system memory.
3.
Enhancements to the processors 64 bit environment. This could include new execution units, intstructions or other optimizations.

Of course we may not see any of the above but that is not likely to happen. First newer generations of OS'es and user applications will be needing the SMP hardware. No matter how well Intel is able to retool its processes for higher clock rates the reality is that a single processor just won't be able to handle the load in the future. Second Intel has to continue to respond to threats from AMD which in my mind is really the only thing driving Intel these days. It can be argued that AMD is already ahead with respect to integration and is only lacking in process technology.

Dave

None of that make much of a difference.

65nm isn't going to result in much clock speed improvment. It also isn't going to result in much internal improvment in the cpu either. If you follow what Intel has been saying the past few months you would see that.

Going to 65nm is going to allow them to do what they would have wanted to do in 90nm except for the speed. The new designs are if anything going back to the P3 and simpler chip design. This is what they (and AMD, and IBM) will be doing. I'm not saying that the chips won't be better, of course they will. But this new process that Intel is touting isn't new at all. It's simply going back to thicker gates etc. The increase in speed has been very much dependent on thinner gates etc for the increases in speed we've been seeing.

There isn't anything that this would do for a laptop. If Merom comes out at 2.5GHz without this, then it would run at 1.25GHz with it. That would make the chip much less potent than even the current Dothan at 2.35GHz.

No one in Intel has mentioned this idea as being looked into for any chips other than handheld mobile ones. More powerful chips must use other tecnologies. Have you read something to the contrary other than just an article by someone who is not an expert in the field?
post #12 of 15
They're only now developing the process. Any chips from this are at least a year out. But I, too, would like to see "an extremely light-weight and thin Book Mini with a 11" screen and flash only mass storage by 2007-2008." If
OLEDs are ready too, the machine could run for a month on a couple of AAs, have no moving parts and be extremely rugged. I wouldn't mind if it ran at only 1GHz or so. 8)
post #13 of 15
Quote:
Originally posted by cubist
They're only now developing the process. Any chips from this are at least a year out. But I, too, would like to see "an extremely light-weight and thin Book Mini with a 11" screen and flash only mass storage by 2007-2008." If
OLEDs are ready too, the machine could run for a month on a couple of AAs, have no moving parts and be extremely rugged. I wouldn't mind if it ran at only 1GHz or so. 8)

Good luck my friend.
post #14 of 15
Quote:
Originally posted by melgross
None of that make much of a difference.

65nm isn't going to result in much clock speed improvment. It also isn't going to result in much internal improvment in the cpu either. If you follow what Intel has been saying the past few months you would see that.

Going to 65nm is going to allow them to do what they would have wanted to do in 90nm except for the speed. The new designs are if anything going back to the P3 and simpler chip design. This is what they (and AMD, and IBM) will be doing. I'm not saying that the chips won't be better, of course they will. But this new process that Intel is touting isn't new at all. It's simply going back to thicker gates etc. The increase in speed has been very much dependent on thinner gates etc for the increases in speed we've been seeing.

There isn't anything that this would do for a laptop. If Merom comes out at 2.5GHz without this, then it would run at 1.25GHz with it. That would make the chip much less potent than even the current Dothan at 2.35GHz.

No one in Intel has mentioned this idea as being looked into for any chips other than handheld mobile ones. More powerful chips must use other tecnologies. Have you read something to the contrary other than just an article by someone who is not an expert in the field?

Correct me if I am wrong, but I remember that the limiting factor for the speed increase from going to 90nm from 130nm was due to heat density issues. The main problem with heat density was due to leakage current which was not a factor at 130nm possible due to the fact of the separation and sizing/thickness of the parts. To me it appears that there would be little benefit of this technique at 130nm due to the nature of the part, the 130nm part would only see the down side of this technique. A 90nm part may see some of the benefits, in that by limiting the leakage current it would allow the part to clock higher with less heat density from current leakage issues, clock up to the response time of the gate that is. So now we go to 65nm and the gate thickness is thicker but is it the same physical size of a larger part or just thicker? Thicker by how much? Does this mean that a part on the 65nm process could see the clocking of a theoretically correct 90nm part?
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post #15 of 15
Quote:
Originally posted by Brendon
Correct me if I am wrong, but I remember that the limiting factor for the speed increase from going to 90nm from 130nm was due to heat density issues. The main problem with heat density was due to leakage current which was not a factor at 130nm possible due to the fact of the separation and sizing/thickness of the parts. To me it appears that there would be little benefit of this technique at 130nm due to the nature of the part, the 130nm part would only see the down side of this technique. A 90nm part may see some of the benefits, in that by limiting the leakage current it would allow the part to clock higher with less heat density from current leakage issues, clock up to the response time of the gate that is. So now we go to 65nm and the gate thickness is thicker but is it the same physical size of a larger part or just thicker? Thicker by how much? Does this mean that a part on the 65nm process could see the clocking of a theoretically correct 90nm part?

Actually leakage was an issue at 130nm but not nearly as much as in the 90nm parts.

The part can't clock higher as the gates are made thicker. The part can clock higher because the gates are made thinner. That's why these new parts will run at half the speed.

What is interesting is that this "fix" isn't being applied to 90nm parts. That's because they will run even slower that they are now. It would be fine to have these chiops run cooler, with less power, but not at the expense of speed.

Look at Intel's roadmap fot the 65nm generation. They don't run any faster than the 90nm chips do. It's a new design.

This technology is fine for small mobile devices. Anyway, this is what Intel is stating. I haven't read anything different from those who understand the process technology.
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