The Intel Developer Forum will kick-off on Tuesday the 7th at the Moscone West in San Francisco, Calif. and run through the 10th. Justin Rattner, the company's chief technology officer, will host the opening keynote at 8:15 a.m. Three other company execs will follow with keynotes focused on digital enterprise, mobility, and the digital home, respectively.
Among its announcements, the Santa Clara, Calif.-based company may debut a new 65-nanometer (nm) dual-core Xeon server processor code-named Dempsey, which is reportedly on track to begin shipping by the end of the first calendar quarter of the year. The chip will bridge the gap between now and the Fall, when Intel will ship Woodcrest -- its first server chip to truly address performance per Watt concerns and ideally give rival AMD's Opteron line a run for its money.
Dempsey -- which packs HyperThreading support, a 1066MHz front-side bus, and Demand Based Switching and Vanderpool Technology -- is expected to run at speeds between 2.5GHz and 3.46 GHz. The former is a rack-optomized variant at 95W dubbed Dempsey MV, while the latter is the performance version of the chip at 130W.
Intel may also unveil Sossaman, a 2.0GHz ultra-dense, low-power 32-bit server processor with 2MB of L2 cache. The chip, which consumes substantially less power at 31W, will likely replace the company's current Low Voltage and Ultra Low Voltage Xeon processors.
By early 2007, Intel will begin shipping its first processors with four cores, which will arrive first in the form another Xeon server chip dubbed "Clovertown." Therefore, it's also likely the company will use its developer forum to discuss its strategy for moving from dual-core chips to quad-core chips.
Intel may also offer additional details on its Viiv home entertainment platform and provide a glimpse at some future processors which have yet to surface on leaked company roadmaps.