SMART Modular Technologies introduces the future of memory
Source: http://www.smartm.com/media/press_releases/article392.asp
Module-In-A-Package™ (MIP™)
At one-fifth the size, MIP provides an improved performance and space savings alternative to SO-DIMMs.
NEWARK, CA, December 10, 2013 — SMART Modular Technologies, Inc., a leading independent designer, manufacturer and supplier of value added subsystems including memory modules, flash memory cards and other solid state storage products, today announced MIP, the industry's first module-in-a-package memory form factor. SMART's innovative tiny form factor design is targeted for broadcast video, mobile router, high-end video/graphics cards and embedded computing applications where power consumption, performance and space limitations are of principle concern.
While SMART's MIP occupies just one-fifth the area of an SO-DIMM, it offers higher performance and consumes less power. Key improvements with MIP include 42% power savings, 42% jitter reduction, and 39% PK/PK savings. Being a "soldered down" module, unlike an SO-DIMM, the need for a mating connector is eliminated with MIP. SMART's MIP supports both, applications requiring ECC and the ones that do not. These are key benefits for applications where memory capacity in a small space is critical. And unlike other DRAM down-board usage scenarios, the MIP contains on-package address and CNTRL termination.
SMART's MIP is an ideal memory solution for the emergence of new cube computing applications in networking, telecom and computing segments, as it leverages SMART's long-term, off-the-shelf stacking expertise. Offered in 2GB and 4GB densities, the MIP runs at speeds up to DDR3-2133.
"SMART has been stacking off-the-shelf DRAMs for many years providing key space-saving benefits to OEMs," stated Mike Rubino, SMART's Vice President of Engineering. "The MIP is a natural extension of this expertise furthering SMART's commitment to deliver high quality, high reliability unique memory solutions."
SMART will be showcasing its new MIP at the Embedded World 2014 Exhibition & Conference in Nuremburg, Germany at stand 4-360 starting on February 25, 2014.
About SMART Modular Technologies
SMART Modular is a technology leader in the design, development and deployment of current and next-generation memory and storage products. Combining leading-edge design and manufacturing with proven world-class support, SMART Modular leverages its deep expertise in DRAM, SRAM and Flash architectures, with world-class board-layout design. SMART Modular delivers high-quality, high-reliability solutions to a broad customer base, including tier one computing and telecom OEMs as well as industrial, medical and automotive customers. In support of these designs, SMART Modular provides award-winning innovations in memory and embedded storage technologies. SMART Modular is part of the SMART family of global companies. See www.smartm.com for more information.
About SMART Worldwide Holdings
The SMART family of companies are leading designers, manufacturers and suppliers of electronic subsystems for the most demanding OEMs around the world. The SMART companies have led the way over the past 25 years providing standard and custom products to today's leading global OEMs crossing all major electronic industries. These industries include PC, enterprise and industrial servers, networking, telecom, defense, aerospace, gaming and embedded application markets. Taking innovations from the design stage through manufacturing and delivery, SMART Modular Technologies has developed a comprehensive product line that includes DRAM, SRAM, and Flash memory in various form factors. SMART High Reliability Solutions offers high-performance, high-capacity solid state drives ("SSDs") for defense, aerospace and industrial automation markets. SMART's presence in the U.S., Europe, Asia and Latin America enables it to provide its customers with proven expertise in international logistics, asset management and supply-chain management worldwide. See www.smartm.com for more information.
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Contact:
Arthur Sainio
SMART Modular Technologies
(510) 624-8126
[email protected]
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Hybrid Memory Cube 160GB/sec RAM starts shipping: Is this the technology that finally kills DDR RAM?
By Joel Hruska on September 25, 2013 at 1:53 pm30 Comments
Hybrid Memory Cube
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Micron announced today that it’s now shipping early samples of its Hybrid Memory Cube to customers and early adopters. Currently the company is offering a 2GB HMC device composed of four-high stacks of 4Gbit memory dies, with a total bandwidth of 160GB/s for the 31×31 mm package. There’s also a smaller chip, at 16×19.5 mm, that offers two links instead of four and tops out at 120GB/s. A 4GB device is scheduled for early 2014, which could hit up to 320GB/s depending on the final implementation.
This leap forward has been in the works for several years; Intel first demonstrated HMC on stage with Micron at IDF nearly two years ago. Since then, Micron has been at work refining the technology and increasing the overall performance. At its heart, the HMC is built on DDR technology, but it leverages a 3D array of chips connected by TSVs (through-silicon via) with a logic controller embedded into the wafer. The Cube is then attached directly to the CPU in what Micron calls a “Short Reach” configuration.
Hybrid memory cube TSVs
It’s not a RAM replacement… yet
In the short-term, HMC is expected to have no impact on DDR4. That technology is already ramping up, motherboard chipsets are queued for development, and work has already been done to create low-power versions and high-density server variants. Where Micron thinks HMC will be vital, for the next few generations, is in large-scale routers or other devices that move huge amounts of data across networks and can benefit from having high-bandwidth data storage for a few critical cycles while working out the optimal routing path.
The long-term implications for PCs, however, are extremely positive. Hybrid Memory Cube uses massive parallelism to reduce access latency and its on-die logic controllers can theoretically power-gate the structure extremely efficiently to save on power. Total bandwidth of up to 320GB/s would put the HMC’s sustained bandwidth on par with a modern L3 cache from Intel — but an L3 cache with 100x the storage space. But there are a few problems to solve before that can happen. First, there’s the simple issue of die size and location. An HMC has to be integrated into something, either on the motherboard or the CPU. The 31x31mm package that Micron mentions is 961 mm sq. That’s enormous for a microprocessor — it’s far larger than the GTX Titan, for example. Integrating the design into an Intel or AMD processor would require a great deal of engineering and the motherboard socket size would be astronomical.
HMC as RAM
A hypothetical HMC implementation used for memory and linking two processors
The other question is the memory controller itself. The HMC implementation uses its own logic controller on-chip, but Intel and AMD already have DDR4 controllers baked into their own processors. Do you build a chip that interfaces with a second memory controller (thereby losing some of the benefits AMD and Intel have both enjoyed from having the IMC on-die), or do you wait until HMC has scaled to the point that it can completely replace DDR memory, and jump at that point?
Micron claims that HMC eliminates the so-called “memory wall” — the problem of the disparity between CPU clock speed/bandwidth and the memory systems that serve them. This isn’t entirely true, since that gap is inherent to the construction of any sort of memory. There’s just no way to build a huge data array that can be sorted in the same amount of time it takes to sort a tiny one. But what HMC could do is knock the memory wall back a few paces, and give chips a much faster, wider pool of data than they’ve previously had access to.
HMC is another technology I should’ve actually wrapped into my recent enthusiast article on the future of the PC, though its time frame for introduction is uncertain. Three to five years seems a reasonable bet, and when it does appear, it could have an impact on performance similar to the impact of integrated memory controllers in previous years. DDR RAM has had an excellent run — it’ll be more than twenty years old by the time HMC is ready for mass deployment — but it may be time to explore other options with far better long-term prospects.
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DDR3-2133 maxes out at around 17GB/s so this tech is in fact pretty slow relative to what the memory cube guys have in mind.
It sort of sounds like a reoackaging of regular DDR3-2133 chips in a multi chip module. Not a bad idea really, especially if the power savings are as good as indicated. Such a module would allow Apple to update iPads to 2GB with minimal battery life lose. The problem is they would have to compete with a single die solution.
I think the important thing highlighted here is that this is a soldered on solution. I know many fret over this idea but it is the way the industry is going with RAM technology as it becomes next to impossible to increase speeds with plugged in RAM modules.
This is also why I was expressing the opinion some time ago that the Mac Pro would get smaller. There simply isn't a way to increase speeds the way many would like with large motherboards with parts spread all over the country side. RAM will become very compact and very close to the CPU in emerging machines. All the emerging technology's are going in this direction in one form or another, be it this approach, the Memory Cube approach or something else.
As for Apple I wouldn't be surprised to see them define their own memory module. For their mobile devices anyways it would allow them to precise tailor performance to the device at hand. For the Mac hardware line I'd just as soon see them move to Memory Cube as chips come out supporting it.
True, but I don't see the cube getting into a desktop anytime soon. This thing has potential.
Hybrid memory cubes goes back to the mid-90s research at IBM. Eventually, we'll be dealing with optical interfaces and data storage on synthetic crystals.
Somewhere before that we'll have blocks of memory layers stacked to make up a cube, but long before that we'll have this SMART technology today.
Yes it looks like it uses a conventional memory interface. Possibly anyways, good info requires logging in.