Forget G5 -- Check out IBM's new chip!
Presenting the IBM PowerPC 440GP:
Book E architecture, 64-bit, DDR-compatible, can be combined with other cores, "DSP functions" ... Only 500 MHz in the short-term, but I'm going to keep an eye on this one.
More info <a href="http://www-3.ibm.com/chips/products/powerpc/newsletter/may2002/lead.html" target="_blank">here</a>.
Perhaps we don't need to wait on Motorola after all?
Book E architecture, 64-bit, DDR-compatible, can be combined with other cores, "DSP functions" ... Only 500 MHz in the short-term, but I'm going to keep an eye on this one.
More info <a href="http://www-3.ibm.com/chips/products/powerpc/newsletter/may2002/lead.html" target="_blank">here</a>.
Perhaps we don't need to wait on Motorola after all?
Comments
PS...PCI-X compliant, but I don't think it will be in Apple's Rack Mounts
From <a href="http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/9C268609D3538C4687256A33004E124B/$file/440GP_pb.pdf" target="_blank">the product brief</a>:
[quote]
? On-chip Double Data Rate (DDR)
SDRAM Controller
- 32-bit or 64-bit interface with optional ECC
? PCI-X Interface
- 32-bit or 64-bit PCI-X V1.0, at
frequencies of up to 133MHz
- 32-bit or 64-bit PCI V2.0, at
frequencies of up to 66MHz
<hr></blockquote>
From <a href="http://www-3.ibm.com/chips/techlib/techlib.nsf/techdocs/60CD06319B572FD387256AF700706CFC/$file/440gp_ds.pdf" target="_blank">the data sheet</a>:
[quote]
PowerPC Book E architecture
? 24 DSP instructions
? Single cycle multiply and multiply-accumulate
? 32 x 32 integer multiply
<hr></blockquote>
The 8540 might even support SMP. 1GHz, SMP, DDR RAM, PCI-X, built-in GigE, no AltiVec, no AGP... are you thinking what I'm thinking?
If Apple had planned on migrating to a non-altivec, IBM G5 CPU, then they would have been preparing for the change for at least 2-3 years, and during that time they would not have written a single line of Altivec code. In reality, OS X is highly optimized for Altivec code, and OS X developers still write for Altivec.
Apple and its largest developers all know of major hardware plans several years in advance. A company like Adobe would know of Apple's plans to migrate to a G5 at least a year in advance. Furthermore, when Apple originally convinced developers to write for Altivec, they must have "promised" that Altivec would be supported for the foreseeable future.
Finally, if Apple planned on using a non-altivec CPU for G5 powermacs, then they sure as hell wouldn't migrate all of the consumer lines to G4s. Imagine the reaction if Apple's new Powermac G5 were slower than an eMac at running photoshop!
<strong>Presenting the IBM PowerPC 440GP:
[IMG]
Book E architecture, 64-bit, DDR-compatible, can be combined with other cores, "DSP functions" ... Only 500 MHz in the short-term, but I'm going to keep an eye on this one.
Perhaps we don't need to wait on Motorola after all?</strong><hr></blockquote>
Ah what a joke, 500 mhz in the short term. Mot has been conspuated to be stuck at 500 mhz during 18 month , and you want to put this chip in a mac ?
This is definitively an embedded chip. But the fact that embedded chip will be book e compliant have DDR memory controller and will be 64 bit wide is informative : it's mean that the new desktop (or high end embedded chips) will have the same specifications but with a much better speed.
Concerning IBM i will add that the situation of IBM is bad also, they are going to fire thousands of their salaries soon. IBM is not in a better shape than Mot.
Nice for sure, but unless they can implement it as a northbridge, it's not of interest.
G-News