TSMC 5nm design infrastructure enables Apple to design future die-shrunk A-series chips

Posted:
in Future Apple Hardware edited April 8
TSMC has completed its design infrastructure for creating chips using a 5-nanometer process, a major step that could enable future Apple designs of its A-series processors to shift to a smaller die than the current 7-nanometer production process, and faster than it has made the shift before.

TSMC factory


The chip production industry continues to push for die shrinks to improve the performance of processors, and TSMC is among those working to perfect the next generation of manufacturing. As part of the process, TSMC has delivered the complete version of its 5-nanometer design infrastructure within the Open Innovation Platform (OIP).

The release, reported by DigiTimes, enables firms working on the designs of processors and other chips that can use the manufacturing process to start working on the components. Worked on with a variety of other vendors to both develop and validate the design infrastructure, the release provides a wide variety of resources required for design work, including technology files, process design kits, tools, flows, and IP.

TSMC is already working to perfect the 5-nanometer manufacturing process, which is said to be in "risk production," though it is unknown how long it will be until it becomes viable for clients, including Apple, to use for their own needs. It also isn't presently clear how much Apple will benefit from the manufacturer-friendly changes to the development process, as the companies already have a close relationship.

Chips using the 5-nanometer process stand to offer a 1.8-times logic density improvement and 15-percent speed gain on ARM Cortex-A72 cores over the 7-nanometer process. TSMC also claims there is a better SRAM and analog area reduction by the architecture change, as well as benefiting from process simplification via the use of EUV lithography.

TSMC's customers have commenced "intensive design engagements" with the release, which is one of many steps towards the creation of 5-nanometer chips, which is typically followed by various pilots and early sampling tests ahead of mass production.

As Apple is a close client of TSMC, relying on the firm for its A-series chip production, it is unknown how much involvement it had in the creation process. Considering the iPhone is known as one of the first major products to use a TSMC-produced 7-nanometer processor, Apple has a vested interest in how TSMC's production pans out, with regards to future chips.

According to TSMC VP of research and development Cliff Hou, "5-nanometer technology requires deeper design-technology co-optimization. Therefore we collaborate seamlessly with our ecosystem partners to ensure we deliver silicon-validated IP blocks and EDA tools ready for customer use. As always, we are committed to helping customers achieve first-time silicon success and faster time-to-market."

Current speculation has Apple using the reduced die size in the "A14" system-on-chip for the 2020 iPhones.

Comments

  • Reply 1 of 7
    frantisekfrantisek Posts: 434member
    I think It can be important for Apple Glasses and Watch- Of course all product will benefit and probably AI functionality will be boosted with new chip designs.
    cornchipwatto_cobra
  • Reply 2 of 7
    wood1208wood1208 Posts: 1,927member
    Intel, can you learn from TSMC about chip fabrication ? Don't need over 3 years to get to 10nm.
    cornchip
  • Reply 3 of 7
    blastdoorblastdoor Posts: 1,908member
    frantisek said:
    I think It can be important for Apple Glasses and Watch- Of course all product will benefit and probably AI functionality will be boosted with new chip designs.
    Totally this, especially glasses.

    I can imagine that the SOC in the glasses will mostly be a “big” GPU/NPU running at a low clock speed, with most (but not all) CPU tasks running on the iPhone. For cpu, maybe glasses get two of apple’s smaller “efficiency” cores
    watto_cobra
  • Reply 4 of 7
    davendaven Posts: 514member
    I'm holding out for the zero nm chips. /s
    revenant
  • Reply 5 of 7
    FYI
    The term "5 nm" is simply a commercial name for a generation of a certain size and its technology, and does not represent any geometry of the transistor.”

    In other words, Intel appears behind TSMC, but it’s unclear by how much...

    What really matters in performance.  Intel’s lead is narrowing vs. AMD vs. ARM but Intel’s sales are doing fine.  The biggest threat to Intel is customers ability to tweak ARM “stock” processors to suit their needs.  The costs involved aren’t as prohibitive as they used to be.  If/when Intel loses Amazons, Googles, Microsoft’s cloud business is when they feel the pain.

    It will be interesting when Apple’s A series chips grow up into the laptop/desktop market, but Intel is probably more concerned about what’s powering Apples iCloud.
    chasm1stwatto_cobra
  • Reply 6 of 7
    SpamSandwichSpamSandwich Posts: 30,985member
    This is an astounding technical development. I remember when 9 nm was considered a nearly insurmountable number.
    watto_cobra
  • Reply 7 of 7
    jdwjdw Posts: 733member
    You can go smaller than 0.2nm in silicon, so what will they do in 10 years when they reach that limit?
    watto_cobra
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