AMD/IBM joint venture in East Fishkill

Posted:
in Future Apple Hardware edited January 2014
My apologies if this has been discussed before..



There's a job posting on BrassRing that clearly indicates a partnership between AMD and IBM. While this is most likely hypertransport related, I wasn't really sure what is meant by "gate etch process," so I thought maybe some of the pros out there could clear things up.



http://candidate.brassring.com/EN/AS...&dummyClient=0



From the site:



DESCRIPTION OF POSITION: This is an AMD-IBM Joint Venture Position. The individual selected for this position will be a regular/full time AMD employee who will work together with AMD and IBM engineers in IBMFs Semiconductor Research and Development Center (SRDC) in East Fishkill, N.Y. AMD employee will participate in the joint development of advanced gate etch processes that will most likely incorporate gate trim methodology with the lithography and film stacks that will be utilized in these technologies. Will also influence development of other FEOL etch processes. Expected to design, execute, and analyze experiments. Interested internal candidates should apply for this position by completing the Expression Of Interest (EOI) Form located at http://hr/eoiform/ EOI's from Austin Employees will be worked by Dee Lane x55448 and EOI's from Sunnyvale Employees will be worked by Chris Klatka. SPECIFIC JOB FUNCTIONS: Expected to design, execute, and analyze experiments. Responsibilities include technical reporting, documentation and process transfer. Expertise with AMD's gate trim etch process and methodology preferred. Support transfer to AMD production fabs. PREFERRED EDUCATION AND EXPERIENCE: Requires a minimum of five years of semiconductor engineering experience, preferably related to technology development. An advanced industry related engineering or science degree is preferred and may reduce the level of experience required. One-year experience with AMD is preferred.

Comments

  • Reply 1 of 1
    kurtkurt Posts: 225member
    This is more around chip making technology and not a particular bus or protocol. They are talking about advanced ways to etch transistors on the chip.
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