PPC970 and Hypertransport

Posted:
in Future Apple Hardware edited January 2014
i don't know if anyone noticed this piece of information which i received with an email from IBM today (a newsletter on PPC info):



Quote:

IBM has joined the HyperTransport Consortium and will build HyperTransport links into its PowerPC 970 chip, which will ship with Apple's G5 desktop computers. HyperTransport is a standard for linking chips such as the CPU (central processing unit) and the memory in a system.



i think in the current G5 versions the G5 itself doesn't use Hypertransport-links yet (but apples system controller chip is using them) - or am i wrong on this? it seems that Apple and IBM will work close together in their further development of that 9xx-series...

Comments

  • Reply 1 of 2
    wizard69wizard69 Posts: 13,377member
    Hmmm, another newsletter to think about signing up for.



    As to your question, you are correct the current CPU odes not support HT directly. The port is generated in Apples suppport chip.



    Ideally such a 970 would also have a memmory controller built in. As such this would make a fantastic chip for embedded systems and possibly low cost MAC computers. Laptops would be another possibility. It would be interesting to knwo how far they are from introducing chips with these features as I bleieve that and improved and possibly modified 970 is need for portable implementation.



    Thanks

    Dave





    Quote:

    Originally posted by Krassy

    i don't know if anyone noticed this piece of information which i received with an email from IBM today (a newsletter on PPC info):







    i think in the current G5 versions the G5 itself doesn't use Hypertransport-links yet (but apples system controller chip is using them) - or am i wrong on this? it seems that Apple and IBM will work close together in their further development of that 9xx-series...




  • Reply 2 of 2
    outsideroutsider Posts: 6,008member
    Yeah I can see a 970CX type chip that is single processor but has HT and a memory controller. There would be no need for the hyper fast bus it has now, ideal for the low end, even the portable market after a die shrink.
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