Difference of the G change

Jump to First Reply
feraliferali
Posted:
in General Discussion edited January 2014
nice title, heh.

anyways I am curious. what is the difference between G3 and G4? I think I know the difference between G4 and G5.. is it just the 32 bit to 64 bit processing?

Comments

  • Reply 1 of 5
    splinemodelsplinemodel Posts: 7,311member
    G3: IBM designed, not multiprocessor capable, double precision floating point operations take two cycles, slower memory throughput.



    G4: Motorola designed, multiprocessor capable, double precision floating point operations take one cycle, Altivec, MaxBus for faster memory throughput.



    G5: IBM designed, multiprocessor capable, 64bit mode enabled, VMX replaces Altivec (but is slower), most special register move instructions take two cycles (but are seldom used), Much faster memory throughput.
     0Likes 0Dislikes 0Informatives
  • Reply 2 of 5
    stoostoo Posts: 1,490member
    Additions from G3 to G4:
    • Altivec (Single Instruction Mulitple Data units).

    • Faster FPU

    • Faster frontside bus (60x -> MPX). MPX is now looking a bit long in the tooth, as multiplier approach 10x for the top end G4s.

    • Multiprocessor capabilities.

    The key addition is probably Altivec.



    Edit: the G5 also has *monster* memory latencies (130ns, IIRC, which is nearly the time it takes for a Mac Plus cycle. ).
     0Likes 0Dislikes 0Informatives
  • Reply 3 of 5
    messiahmessiah Posts: 1,689member
    Quote:

    Originally posted by Stoo

    Edit: the G5 also has *monster* memory latencies (130ns, IIRC, which is nearly the time it takes for a Mac Plus cycle. ).



    What does that mean?
     0Likes 0Dislikes 0Informatives
  • Reply 4 of 5
    stoostoo Posts: 1,490member
    If the next instruction or data to be fetched isn't found in the caches it's 130 nanoseconds ("nano" means billionths) before the memory controller, fetches it. During the period when instructions/data are being fetched, modern processors execute other instructions out of order to avoid wasting the few hundred cycles it takes to get data from RAM. Quite a lot of CPU cores' transistor counts are now spent on logic to manage out of order execution.



    (130 nanoseconds is roughly the MacPlus' RAM latency. Of course, the G5's memory system has much more bandwith than that of the MacPlus ).
     0Likes 0Dislikes 0Informatives
  • Reply 5 of 5
    slugheadslughead Posts: 1,169member
    130ns? I don't have any idea what that pertains to but I'm taking my G5 to the shooting range for target practice and booting up my Quadra.
     0Likes 0Dislikes 0Informatives
Sign In or Register to comment.