133MHz Bus--the max on G4?

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cosmic triggercosmic trigger
Posted:
in Future Apple Hardware edited January 2014
Here is my evidence:



<a href="http://e-www.motorola.com/collateral/SNDFH1112.pdf"; target="_blank">http://e-www.motorola.com/collateral/SNDFH1112.pdf</a>;



Anyone have other info?

Comments

  • Reply 1 of 9
    x704x704 Posts: 276member
    Few Observations



    1. This is dated May 2001. Things change.



    2. Things have changed. Apollo is the 7460 chip. This PDF only covers up to the 7450 therefore this info may not apply.



    3. This PDF was for the "Smart Network Developers Forum". I assume this means the embedded market. There may be differences between this and what Apple can do.



    4. I want a faster bus, therefore Apple must deliver



    Edit:Spelling



    [ 01-08-2002: Message edited by: X704 ]</p>
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  • Reply 2 of 9
    spiffyguycspiffyguyc Posts: 285member
    I hope your job doesn't have anything to do with problem solving.



    Just because the specs for one generation have certain limits doesn't mean those limits are absolute and can't be worked around. If that were true, we'd all still be running 500MHz G4's.
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  • Reply 3 of 9
    brussellbrussell Posts: 9,812member
    As X704 said, the Apollo may be different. I personally doubt it, but it's possible it will use a faster bus.



    By the way, IBM's new G3 can handle up to a 200Mhz bus.
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  • Reply 4 of 9
    discstickersdiscstickers Posts: 314member
    I think it depends more on the chipset more than the processor, as long as the processor runs at a fairly small multiplier of the bus.
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  • Reply 5 of 9
    x704x704 Posts: 276member
    whoops, hit reply instead of edit ... :o



    [ 01-08-2002: Message edited by: X704 ]</p>
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  • Reply 6 of 9
    x704x704 Posts: 276member
    :o



    [ 01-08-2002: Message edited by: X704 ]</p>
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  • Reply 7 of 9
    programmerprogrammer Posts: 3,503member
    Yes, all currently available PowerPC chips are limited to a 64-bit 133 MHz bus. The MPX bus protocol used by the G4 has both 64-bit and 128-bit version defined, so (in theory) they could build a version of the G4 that uses a 128-bit data bus. Since fast & wide busses are hard to build, I would think a better option would be to build a G4 that uses HyperTransport or RapidIO instead -- but so far there is nothing announced along those lines.
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  • Reply 8 of 9
    g::mastag::masta Posts: 121member
    as someone who obviously is not as informed as others, i was under the impression that IBM had taken over production of our favourite chip... why is it so damn impossible to create this chip that every tom, dick and harry (ie Intel & AMD) are making? I thought we worked with pros here? <img src="graemlins/hmmm.gif" border="0" alt="[Hmmm]" /> just up the damn bus speed to 200Mhz and get it over with!



    [ 01-09-2002: Message edited by: g::masta ]</p>
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  • Reply 9 of 9
    programmerprogrammer Posts: 3,503member
    The PowerPC chips are quite different from the WIntel chips, adding a new feature like a faster front side bus is not a trivial undertaking.



    There is a lot of talk about IBM fabbing G4s, but wasn't this just rumoured? Is there any definitive information about this available? But aside from this, there is a big difference between doing design work on a chip and running it through a fab. If IBM is just fabbing chips it can't do anything about the design's shortcomings.
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