This is probably nit-picking at definitions, but what about accessing a flash memory device does not make it a "random access memory"? At the device level, you give it an address and it returns the data in roughly constant time, like a DRAM or SRAM, and unlike a disk or tape. At the software level it can be accessed with read()s and write()s like file IO, but you can also just mmap() it in and use it that way. I think one of the memory vendors actually came out with a flash-backed DRAM DIMM (ecoram or something like that) a while ago.
You can mmap() NAND Flash in much the same way that you would mmap() a swapfile on a magnetic disk. The resulting storage space is often colloquially referred to as "virtual RAM".
You can, indeed treat NOR flash as truly random-access for reading purposes. Just like you could treate traditional ROM as random-access for reading purposes. But nobody ever referred to traditional ROM as "RAROM" (Random Access Read Only Memory".
However, you cannot write to either NAND or NOR flash in a truly random access fashion. Rather, you must erase an entire block of typically 64 KB or more, every time any single bit within the block needs to change, and write bytes in purely sequential (not random) order, with no more than 1 page (typically on the order of 256 to 512 bytes) being written at a time.
The fact that these restrictions can be abstracted away in software to create a memory array with the appearance of RAM is a credit to the state of software engineering and CPU memory management units. But that doesn't make the Flash storage itself any more "RAM"-like than any other mass storage medium.
There is no such thing as Flash RAM, Appleinsider needs to strive for at least a bit of technical accuracy!
RAM = Random Access Memory
The flash memory used in Apples devices is NOT random access. That is a significant error that is seen far to often on the net. Beyond that Flash is used as secondary storage in these machines. Real RAM is primary storage, directly addressable by the processor and is seldom used for secondary storage. Access to flash has more in common with accessing a disk drive than it does RAM.
Flash is so random access. The Flash memory discusses is NAND Flash RAM. Every cell in the array is accessible at essentially constant time, therefore properly called Random Access Memory. The fact the RAM is used in secondary storage does not change the fact that architecturally it operates as constant access, especially when compared to rotating storage technologies.
So it is you who is confusing the label of a specific technology attribute -- RAM, with the system engineering requirement -- primary memory or secondary storage. RAM is just the lazy persons shortcut to saying primary memory and it could't be more incorrect as there are all kinds of RAM used in many different places other than primary memory.
And 480 isn't close enough? Actually, I think they are the same. OWC quotes capacity after over-provisioning. I'm not sure Apple does. So OWCs module really is a 512GB module.
This isn't the first time an article by Dan has blatantly pushed this particular technical inaccuracy. Just filter the article in your mind, replacing every instance of the phrase "Flash RAM" with "Flash storage", and your anger level will probably come down a few degrees. I know mine usually does.
AAARRRGGGHHH!!!!!!!!!
Out of the mouths of __________. Get one riled up and the rest join in. The sad part is this is just mob mentality reinforcing an incorrect answer.
NAND Flash (a specific technical flavor of NVRAM: non-volatile RAM) IS RAM people! As far as any memory technology is, because exactly none of the existing memory technologies are truly constant access time for any cell, but to the current and foreseeable bus clock frequencies the first byte latency is constant access in all of the solid state flavors of memories.
RAM -- Random Access Memory, an attribute that describes the variability in accessing different parts of the memory.
RAM is not the computer's main memory, that is just the place that uses a particular flavor of it (currently DRAM) most visibly. When you stop using that bad RAM shortcut and use the proper terms properly you won't make such a public spectacle of yourselves!
This is probably nit-picking at definitions, but what about accessing a flash memory device does not make it a "random access memory"? At the device level, you give it an address and it returns the data in roughly constant time, like a DRAM or SRAM, and unlike a disk or tape. At the software level it can be accessed with read()s and write()s like file IO, but you can also just mmap() it in and use it that way. I think one of the memory vendors actually came out with a flash-backed DRAM DIMM (ecoram or something like that) a while ago.
I agree that we tend to use it more like we use disks, right now, but there is no inherent reason that has to be the case, especially if you, say, buy a group of NAND designers and have them reduce the block size and trade off some density for better latency. :-)
You are correct, and you weren't nit picking. It was just another anti-Daniel mob that lost it's own technical way despite previously decent reputations. And I'm not saying that to generally defend Dan, he can fight his own opinion battles without me. But the slam on his use of the term RAM was completely incorrect.
However, you cannot write to either NAND or NOR flash in a truly random access fashion. Rather, you must erase an entire block of typically 64 KB or more, every time any single bit within the block needs to change, and write bytes in purely sequential (not random) order, with no more than 1 page (typically on the order of 256 to 512 bytes) being written at a time.
The fact that these restrictions can be abstracted away in software to create a memory array with the appearance of RAM is a credit to the state of software engineering and CPU memory management units. But that doesn't make the Flash storage itself any more "RAM"-like than any other mass storage medium.
True but, you could say the same for DRAM at the lowest levels. Whenever you write a single bit to a DDR DRAM you are erasing a block of memory when you discharge the DRAM cells into the sense amps, then writing bytes back in a sequential order as you burst data in. The only difference is the size of block you are moving.
And the limitations are not a fundamental feature of flash, they are just an implementation choice. Just like you could make a DRAM with a 64KB row buffer, you could make a flash with a very small buffer. Its just a tradeoff in latencies and density.
In any case, it is essentially a definitional argument. If one defines the key feature of "Random Access" as being able to access a given piece of memory in roughly constant time, independent of the location of that memory, then I would say flash is definitely random access. If the key feature is the size of the memory block, then it might not be.
Yet I remember using RAM to create .... RAM disks. Virtual disks that acted like hard drives but were in fact in RAM. So isn't this all a bit esoteric?
Yeah... Old skool brah... RamDisks. Those were the days. A 4MB super fast Drive. Aww yeah...
Yeah don't forget Video RAM. VRAM. Now in Gigabytes and GDDR5 or more. When 128MB was MASSIVE just a five years ago and Intels still use only 256MB of "shared" (read: lousy regular slower normal) RAM.
Darn it it's so sad how Nvidia and AMD/ATI dropped the GPU ball. We could have 32nm 2GB DEDICATED GPUs doing all sorts of amazing graphics AND OpenCL stuff. Ah well, time for PowerVR to step up. Until the iPad I didn't even know they were still around, let alone solvent.
Quote:
Originally Posted by Hiro
Flash is so random access. The Flash memory discusses is NAND Flash RAM. Every cell in the array is accessible at essentially constant time, therefore properly called Random Access Memory. The fact the RAM is used in secondary storage does not change the fact that architecturally it operates as constant access, especially when compared to rotating storage technologies.
So it is you who is confusing the label of a specific technology attribute -- RAM, with the system engineering requirement -- primary memory or secondary storage. RAM is just the lazy persons shortcut to saying primary memory and it could't be more incorrect as there are all kinds of RAM used in many different places other than primary memory.
This article mentions AirBook and iOS devices, but what about iMac? Does Apple's BTO iMac with solid state drive use NAND or DRAM? Or is a solid state drive totally different? Requires more power? Offers more storage? Please help me understand the difference. Thanks!
AFAIK it's the same... NAND, flash memory, flash RAM, solid state drives, whatever you want to call it.
The main difference at this stage is the form factor. The iMac would have the "flash storage" (the official Apple term, I think) packaged like a regular disk drive. The MacBook Air, as seen above, has them "separated out" so that it takes up less space.
Now, as to more technical differences, you'll have to read up Anandtech or something similar that delves into it.
Long story short, if Apple starts making their own flash storage controllers and memory cells, etc ... it can only be a good thing. Though, you would see iPad and MacBook Air be the models that will benefit first, ie. they would have this newer technology before the iMac.
Out of the mouths of __________. Get one riled up and the rest join in. The sad part is this is just mob mentality reinforcing an incorrect answer.
NAND Flash (a specific technical flavor of NVRAM: non-volatile RAM) IS RAM people! As far as any memory technology is, because exactly none of the existing memory technologies are truly constant access time for any cell, but to the current and foreseeable bus clock frequencies the first byte latency is constant access in all of the solid state flavors of memories.
RAM -- Random Access Memory, an attribute that describes the variability in accessing different parts of the memory.
RAM is not the computer's main memory, that is just the place that uses a particular flavor of it (currently DRAM) most visibly. When you stop using that bad RAM shortcut and use the proper terms properly you won't make such a public spectacle of yourselves!
Whatever. I write embedded firmware on a daily basis that interfaces with SRAM, SDRAM, Flash storage, EEPROM, and CPU registers at the so-called "bare metal" level (ie. without a high-level OS and memory management unit abstracting things away on my behalf) on 5 different CPU architectures. My degree and 8 years in the industry inform me that I can ignore what you have to say on the matter.
You can mmap() NAND Flash in much the same way that you would mmap() a swapfile on a magnetic disk. The resulting storage space is often colloquially referred to as "virtual RAM".
You can, indeed treat NOR flash as truly random-access for reading purposes. Just like you could treate traditional ROM as random-access for reading purposes. But nobody ever referred to traditional ROM as "RAROM" (Random Access Read Only Memory".
However, you cannot write to either NAND or NOR flash in a truly random access fashion. Rather, you must erase an entire block of typically 64 KB or more, every time any single bit within the block needs to change, and write bytes in purely sequential (not random) order, with no more than 1 page (typically on the order of 256 to 512 bytes) being written at a time.
The fact that these restrictions can be abstracted away in software to create a memory array with the appearance of RAM is a credit to the state of software engineering and CPU memory management units. But that doesn't make the Flash storage itself any more "RAM"-like than any other mass storage medium.
You incorrectly restrict the term random access. Each of those blocks is write accessed in essentially constant time. Doesn't matter that you are write accessing a bunch of blocks or just one, the constant time part remains as true as it does for burt read/written DRAM arrays. You are quibbling about an implementation issue in grouping, not the access timing.
None of that requires abstracting away in hardware to remain constant tome access.
Whatever. I write embedded firmware on a daily basis that interfaces with SRAM, SDRAM, Flash storage, EEPROM, and CPU registers at the so-called "bare metal" level (ie. without a high-level OS and memory management unit abstracting things away on my behalf) on 5 different CPU architectures. My degree and 8 years in the industry inform me that I can ignore what you have to say on the matter.
Just because you are successful at programming doesn't make your commentary any better. Wrong is wrong. You just happen to be lucky that this particular terminology snafu on your part doesn't/can't affect what you program. Pat yourself on the back and get back to coding, what you claim you are good at.
In any case, it is essentially a definitional argument. If one defines the key feature of "Random Access" as being able to access a given piece of memory in roughly constant time, independent of the location of that memory, then I would say flash is definitely random access. If the key feature is the size of the memory block, then it might not be.
You're correct. Random Access does have a specific meaning though when used in terms of memories, so alternate definitions that try to add extra layers of restrictions on top of the accepted "essentially constant access time to any cell in the array" only serve to confuse the issue. Best we all stay away from definition du jour or nobody will ever know exactly what anyone else is referring to, and then engineers would need lawyers to read requirements specs. Ungh....
Flash is so random access. The Flash memory discusses is NAND Flash RAM. Every cell in the array is accessible at essentially constant time, therefore properly called Random Access Memory. The fact the RAM is used in secondary storage does not change the fact that architecturally it operates as constant access, especially when compared to rotating storage technologies.
So it is you who is confusing the label of a specific technology attribute -- RAM, with the system engineering requirement -- primary memory or secondary storage. RAM is just the lazy persons shortcut to saying primary memory and it could't be more incorrect as there are all kinds of RAM used in many different places other than primary memory.
It really isn't random access and has more in common with writing to a disk drive. The data is "saved" into the chip in blocks or sectors if you will. The approach is very similar to what is done with a disk drive. You can't randomly write a byte to NAND flash. Beyond that you have erase cycles that need to be taken care of.
Quote:
Originally Posted by afrodri
This is probably nit-picking at definitions, but what about accessing a flash memory device does not make it a "random access memory"? At the device level, you give it an address and it returns the data in roughly constant time, like a DRAM or SRAM, and unlike a disk or tape. At the software level it can be accessed with read()s and write()s like file IO, but you can also just mmap() it in and use it that way. I think one of the memory vendors actually came out with a flash-backed DRAM DIMM (ecoram or something like that) a while ago.
I agree that we tend to use it more like we use disks, right now, but there is no inherent reason that has to be the case, especially if you, say, buy a group of NAND designers and have them reduce the block size and trade off some density for better latency. :-)
OK it is obvious you understand some of what is going on and why I find this frustrating, you don't have bocks in random access memory. Depending on the RAM you request a byte you get a byte, you write a byte a byte gets written. Now some RAM, with the corresponding controller will have features to fill a cache line with X number of bytes but access is still random.
As to the NAND designers you will get closer to random access with NOR based devices.
You might want to read the Flash 101 here: http://www.eetimes.com/design/memory...-to-NAND-flash. If you do I can't see how one could possibly call NAND Flash Random Access Memory. You can't even do a random access cycle randomly.
Quote:
Originally Posted by Hiro
AAARRRGGGHHH!!!!!!!!!
Out of the mouths of __________. Get one riled up and the rest join in. The sad part is this is just mob mentality reinforcing an incorrect answer.
The answer is correct, NAND flash is far from what most engineers would call random access.
Quote:
NAND Flash (a specific technical flavor of NVRAM: non-volatile RAM) IS RAM people!
This isn't NOR memory we are talking about here. I'd even go so far as to say NAND flash was specifically designed to replace other secondary storage methods.
Quote:
As far as any memory technology is, because exactly none of the existing memory technologies are truly constant access time for any cell, but to the current and foreseeable bus clock frequencies the first byte latency is constant access in all of the solid state flavors of memories.
So what you are saying is that it is impossible for a processor to have single cycle access to its RAM array? If so that is very likely to surprise a bunch of embedded hardware engineers. Not all RAM arrays are DRAM.
Quote:
RAM -- Random Access Memory, an attribute that describes the variability in accessing different parts of the memory.
From my perspective it is pretty much what it says it is - Random Access Memory. That means the processor can randomly generate and address and get or write data to that address.
Quote:
RAM is not the computer's main memory,
Seriously? What college did you attend because I'd like to know what they called main memory. This actually bothers me more than your claim that NAND Flash is random access memory. If RAM isn't main memory than what is?
Quote:
that is just the place that uses a particular flavor of it (currently DRAM) most visibly.
BS! Main memory is the computers primary memory that CPU or memory manager directly addresses when executing programs or accessing data. It can be DRAM or SRAM if you want timely read write access. It can also be NOR flash if writing to that storage isn't required. Beyond that there are other new technologies that allow for non volatile read write access. NAND flash isn't one of these, the normal way to use NAND is to load RAM with data from the NAND flash much like a disk access.
Quote:
When you stop using that bad RAM shortcut and use the proper terms properly you won't make such a public spectacle of yourselves!
Yeah that would be helpful. It would be especially helpful if people understood what main memory is.
You might want to read the Flash 101 here: http://www.eetimes.com/design/memory...-to-NAND-flash. If you do I can't see how one could possibly call NAND Flash Random Access Memory. You can't even do a random access cycle randomly.
Geez.. The article repeatedly references the random accesses and doesn't contradict essentially constant access time for any byte in the array. Arguments that try to use burst reads byte sequences are improperly using read optimizations, because it is random fist byte access that determines the constant access time, not sequential accesses. All forms of RAM implement some type of burst read and/or write for the sequentially accessed bytes.
So , no nothing new in that article and it does not support you position that NAND Flash is not random access. I'll agree with the article that NAND Flash is not suited for "direct random access", but what the author is talking about is getting at a single byte off the page, especially if you need to change it. You can always get there in roughly constant time, and it will always take roughly constant time to replace the byte, but you have to so a shitpot of extra overhead work that doesn't help the actual task you are trying to accomplish. But it's still essentially constant access time to the first byte, so still RAM, even if it isn't smart to use it naively that way.
Quote:
Originally Posted by wizard69
The answer is correct, NAND flash is far from what most engineers would call random access.
Still incorrect, even by your reference and it reads well.
Quote:
Originally Posted by wizard69
This isn't NOR memory we are talking about here. I'd even go so far as to say NAND flash was specifically designed to replace other secondary storage methods.
NOR is a red herring, its RAM too. But yes NAND was specifically designed as a secondary storage technology.
Quote:
Originally Posted by wizard69
So what you are saying is that it is impossible for a processor to have single cycle access to its RAM array? If so that is very likely to surprise a bunch of embedded hardware engineers. Not all RAM arrays are DRAM.
Not at all. I am simply saying RAM is nearly constant access time to any random byte in the storage array. If you are referring to my main buss comments, sickle cycle can depend on the specific bus you put it on, but single cycle is a red herring because the RAM just means essentially constant access time to the first byte. The sub-nanoscecond propagation through the storage array transistors and differing trace lengths from different physical positions on the array make for those differences that fall in the "essentially constant" term. There is no perfectly constant access in the physical world at an arbitrary resolution. But at the package level, and the discrete time intervals the bits are clocked off, it will be constant. I just went a little deeper into the description to cut off the ridiculous arguments about the inconstancies and where they actually come from. Not that you would have gone there, but there are some on the boards that do and a preemptive word just keeps the thread shorter.
Quote:
Originally Posted by wizard69
From my perspective it is pretty much what it says it is - Random Access Memory. That means the processor can randomly generate and address and get or write data to that address.
That's a personal convenience, not a technical definition. Technically we can access any byte anywhere in the machine's storage, that's the whole idea of having an address space. And the address space cares not what it is implemented on.
Quote:
Originally Posted by wizard69
Seriously? What college did you attend because I'd like to know what they called main memory. This actually bothers me more than your claim that NAND Flash is random access memory. If RAM isn't main memory than what is?
Main memory is main memory, or also called primary memory/storage. The specific technology that you implement a main/primary is inconsequential to it's position in the architecture. What will we call a memristor primary memory, especially if it is not constant access to every byte in the array? But still more than a million times faster than todays flavors of multi-transistor RAM? THAT'S why it is important to not confuse a technology attribute name with it's architectural use. When the implementation tech fundamentally changes your incorrect terminology forces you to compare them as old and new architectures, which aren't really old and new at all, but the same architecture, just with new components. It's drastically simpler to discuss the effect on correctness and performance when it is just comparing different black boxes in the same system.
And OBTW University of Minnesota, it was a top 10 in CS then, but a lot of retirements happened in the intervening years. Still not a slouch of a school.
Quote:
Originally Posted by wizard69
BS! Main memory is the computers primary memory that CPU or memory manager directly addresses when executing programs or accessing data. It can be DRAM or SRAM if you want timely read write access. It can also be NOR flash if writing to that storage isn't required. Beyond that there are other new technologies that allow for non volatile read write access. NAND flash isn't one of these, the normal way to use NAND is to load RAM with data from the NAND flash much like a disk access.
I don't know what you are arguing here other than NAND flash isn't efficient to use as a primary memory. I'll agree with that as I already did in the second paragraph. As for the rest you are simply agreeing with my above paragraph that the implementation is NOT the architecture. You really need to pay attention to your own thoughts because now you are making my points for me, which is actually a good thing all around.
Quote:
Originally Posted by wizard69
Yeah that would be helpful. It would be especially helpful if people understood what main memory is.
Yes. Now if you can read your own previous paragraph and see that you have been blind to the fact you actually agree with me but initially used the sloppy terminology we can all get on with doing good work.
Comments
This is probably nit-picking at definitions, but what about accessing a flash memory device does not make it a "random access memory"? At the device level, you give it an address and it returns the data in roughly constant time, like a DRAM or SRAM, and unlike a disk or tape. At the software level it can be accessed with read()s and write()s like file IO, but you can also just mmap() it in and use it that way. I think one of the memory vendors actually came out with a flash-backed DRAM DIMM (ecoram or something like that) a while ago.
You can mmap() NAND Flash in much the same way that you would mmap() a swapfile on a magnetic disk. The resulting storage space is often colloquially referred to as "virtual RAM".
You can, indeed treat NOR flash as truly random-access for reading purposes. Just like you could treate traditional ROM as random-access for reading purposes. But nobody ever referred to traditional ROM as "RAROM" (Random Access Read Only Memory".
However, you cannot write to either NAND or NOR flash in a truly random access fashion. Rather, you must erase an entire block of typically 64 KB or more, every time any single bit within the block needs to change, and write bytes in purely sequential (not random) order, with no more than 1 page (typically on the order of 256 to 512 bytes) being written at a time.
The fact that these restrictions can be abstracted away in software to create a memory array with the appearance of RAM is a credit to the state of software engineering and CPU memory management units. But that doesn't make the Flash storage itself any more "RAM"-like than any other mass storage medium.
This is a good thing. As soon as they offer 512 Gig in a MB Air, I'm sold...
Why wait? Just buy a third-party module.
Why wait? Just buy a third-party module.
Because they don't come in 512?
There is no such thing as Flash RAM, Appleinsider needs to strive for at least a bit of technical accuracy!
RAM = Random Access Memory
The flash memory used in Apples devices is NOT random access. That is a significant error that is seen far to often on the net. Beyond that Flash is used as secondary storage in these machines. Real RAM is primary storage, directly addressable by the processor and is seldom used for secondary storage. Access to flash has more in common with accessing a disk drive than it does RAM.
Flash is so random access. The Flash memory discusses is NAND Flash RAM. Every cell in the array is accessible at essentially constant time, therefore properly called Random Access Memory. The fact the RAM is used in secondary storage does not change the fact that architecturally it operates as constant access, especially when compared to rotating storage technologies.
So it is you who is confusing the label of a specific technology attribute -- RAM, with the system engineering requirement -- primary memory or secondary storage. RAM is just the lazy persons shortcut to saying primary memory and it could't be more incorrect as there are all kinds of RAM used in many different places other than primary memory.
I've designed with Flash and completely overlooked the language that Dan used.
Good, because he was wrong. Got his own terminology turned inside out.
Because they don't come in 512…
And 480 isn't close enough? Actually, I think they are the same. OWC quotes capacity after over-provisioning. I'm not sure Apple does. So OWCs module really is a 512GB module.
This isn't the first time an article by Dan has blatantly pushed this particular technical inaccuracy. Just filter the article in your mind, replacing every instance of the phrase "Flash RAM" with "Flash storage", and your anger level will probably come down a few degrees. I know mine usually does.
AAARRRGGGHHH!!!!!!!!!
Out of the mouths of __________. Get one riled up and the rest join in. The sad part is this is just mob mentality reinforcing an incorrect answer.
NAND Flash (a specific technical flavor of NVRAM: non-volatile RAM) IS RAM people! As far as any memory technology is, because exactly none of the existing memory technologies are truly constant access time for any cell, but to the current and foreseeable bus clock frequencies the first byte latency is constant access in all of the solid state flavors of memories.
RAM -- Random Access Memory, an attribute that describes the variability in accessing different parts of the memory.
RAM is not the computer's main memory, that is just the place that uses a particular flavor of it (currently DRAM) most visibly. When you stop using that bad RAM shortcut and use the proper terms properly you won't make such a public spectacle of yourselves!
This is probably nit-picking at definitions, but what about accessing a flash memory device does not make it a "random access memory"? At the device level, you give it an address and it returns the data in roughly constant time, like a DRAM or SRAM, and unlike a disk or tape. At the software level it can be accessed with read()s and write()s like file IO, but you can also just mmap() it in and use it that way. I think one of the memory vendors actually came out with a flash-backed DRAM DIMM (ecoram or something like that) a while ago.
I agree that we tend to use it more like we use disks, right now, but there is no inherent reason that has to be the case, especially if you, say, buy a group of NAND designers and have them reduce the block size and trade off some density for better latency. :-)
You are correct, and you weren't nit picking. It was just another anti-Daniel mob that lost it's own technical way despite previously decent reputations. And I'm not saying that to generally defend Dan, he can fight his own opinion battles without me. But the slam on his use of the term RAM was completely incorrect.
However, you cannot write to either NAND or NOR flash in a truly random access fashion. Rather, you must erase an entire block of typically 64 KB or more, every time any single bit within the block needs to change, and write bytes in purely sequential (not random) order, with no more than 1 page (typically on the order of 256 to 512 bytes) being written at a time.
The fact that these restrictions can be abstracted away in software to create a memory array with the appearance of RAM is a credit to the state of software engineering and CPU memory management units. But that doesn't make the Flash storage itself any more "RAM"-like than any other mass storage medium.
True but, you could say the same for DRAM at the lowest levels. Whenever you write a single bit to a DDR DRAM you are erasing a block of memory when you discharge the DRAM cells into the sense amps, then writing bytes back in a sequential order as you burst data in. The only difference is the size of block you are moving.
And the limitations are not a fundamental feature of flash, they are just an implementation choice. Just like you could make a DRAM with a 64KB row buffer, you could make a flash with a very small buffer. Its just a tradeoff in latencies and density.
In any case, it is essentially a definitional argument. If one defines the key feature of "Random Access" as being able to access a given piece of memory in roughly constant time, independent of the location of that memory, then I would say flash is definitely random access. If the key feature is the size of the memory block, then it might not be.
Yet I remember using RAM to create .... RAM disks. Virtual disks that acted like hard drives but were in fact in RAM. So isn't this all a bit esoteric?
Yeah... Old skool brah... RamDisks. Those were the days. A 4MB super fast
Darn it it's so sad how Nvidia and AMD/ATI dropped the GPU ball. We could have 32nm 2GB DEDICATED GPUs doing all sorts of amazing graphics AND OpenCL stuff. Ah well, time for PowerVR to step up. Until the iPad I didn't even know they were still around, let alone solvent.
Flash is so random access. The Flash memory discusses is NAND Flash RAM. Every cell in the array is accessible at essentially constant time, therefore properly called Random Access Memory. The fact the RAM is used in secondary storage does not change the fact that architecturally it operates as constant access, especially when compared to rotating storage technologies.
So it is you who is confusing the label of a specific technology attribute -- RAM, with the system engineering requirement -- primary memory or secondary storage. RAM is just the lazy persons shortcut to saying primary memory and it could't be more incorrect as there are all kinds of RAM used in many different places other than primary memory.
This article mentions AirBook and iOS devices, but what about iMac? Does Apple's BTO iMac with solid state drive use NAND or DRAM? Or is a solid state drive totally different? Requires more power? Offers more storage? Please help me understand the difference. Thanks!
AFAIK it's the same... NAND, flash memory, flash RAM, solid state drives, whatever you want to call it.
The main difference at this stage is the form factor. The iMac would have the "flash storage" (the official Apple term, I think) packaged like a regular disk drive. The MacBook Air, as seen above, has them "separated out" so that it takes up less space.
Now, as to more technical differences, you'll have to read up Anandtech or something similar that delves into it.
Long story short, if Apple starts making their own flash storage controllers and memory cells, etc ... it can only be a good thing. Though, you would see iPad and MacBook Air be the models that will benefit first, ie. they would have this newer technology before the iMac.
Anyone else, feel free to chime in.
AAARRRGGGHHH!!!!!!!!!
Out of the mouths of __________. Get one riled up and the rest join in. The sad part is this is just mob mentality reinforcing an incorrect answer.
NAND Flash (a specific technical flavor of NVRAM: non-volatile RAM) IS RAM people! As far as any memory technology is, because exactly none of the existing memory technologies are truly constant access time for any cell, but to the current and foreseeable bus clock frequencies the first byte latency is constant access in all of the solid state flavors of memories.
RAM -- Random Access Memory, an attribute that describes the variability in accessing different parts of the memory.
RAM is not the computer's main memory, that is just the place that uses a particular flavor of it (currently DRAM) most visibly. When you stop using that bad RAM shortcut and use the proper terms properly you won't make such a public spectacle of yourselves!
Whatever. I write embedded firmware on a daily basis that interfaces with SRAM, SDRAM, Flash storage, EEPROM, and CPU registers at the so-called "bare metal" level (ie. without a high-level OS and memory management unit abstracting things away on my behalf) on 5 different CPU architectures. My degree and 8 years in the industry inform me that I can ignore what you have to say on the matter.
You can mmap() NAND Flash in much the same way that you would mmap() a swapfile on a magnetic disk. The resulting storage space is often colloquially referred to as "virtual RAM".
You can, indeed treat NOR flash as truly random-access for reading purposes. Just like you could treate traditional ROM as random-access for reading purposes. But nobody ever referred to traditional ROM as "RAROM" (Random Access Read Only Memory".
However, you cannot write to either NAND or NOR flash in a truly random access fashion. Rather, you must erase an entire block of typically 64 KB or more, every time any single bit within the block needs to change, and write bytes in purely sequential (not random) order, with no more than 1 page (typically on the order of 256 to 512 bytes) being written at a time.
The fact that these restrictions can be abstracted away in software to create a memory array with the appearance of RAM is a credit to the state of software engineering and CPU memory management units. But that doesn't make the Flash storage itself any more "RAM"-like than any other mass storage medium.
You incorrectly restrict the term random access. Each of those blocks is write accessed in essentially constant time. Doesn't matter that you are write accessing a bunch of blocks or just one, the constant time part remains as true as it does for burt read/written DRAM arrays. You are quibbling about an implementation issue in grouping, not the access timing.
None of that requires abstracting away in hardware to remain constant tome access.
Whatever. I write embedded firmware on a daily basis that interfaces with SRAM, SDRAM, Flash storage, EEPROM, and CPU registers at the so-called "bare metal" level (ie. without a high-level OS and memory management unit abstracting things away on my behalf) on 5 different CPU architectures. My degree and 8 years in the industry inform me that I can ignore what you have to say on the matter.
Just because you are successful at programming doesn't make your commentary any better. Wrong is wrong. You just happen to be lucky that this particular terminology snafu on your part doesn't/can't affect what you program. Pat yourself on the back and get back to coding, what you claim you are good at.
In any case, it is essentially a definitional argument. If one defines the key feature of "Random Access" as being able to access a given piece of memory in roughly constant time, independent of the location of that memory, then I would say flash is definitely random access. If the key feature is the size of the memory block, then it might not be.
You're correct. Random Access does have a specific meaning though when used in terms of memories, so alternate definitions that try to add extra layers of restrictions on top of the accepted "essentially constant access time to any cell in the array" only serve to confuse the issue. Best we all stay away from definition du jour or nobody will ever know exactly what anyone else is referring to, and then engineers would need lawyers to read requirements specs. Ungh....
Flash is so random access. The Flash memory discusses is NAND Flash RAM. Every cell in the array is accessible at essentially constant time, therefore properly called Random Access Memory. The fact the RAM is used in secondary storage does not change the fact that architecturally it operates as constant access, especially when compared to rotating storage technologies.
So it is you who is confusing the label of a specific technology attribute -- RAM, with the system engineering requirement -- primary memory or secondary storage. RAM is just the lazy persons shortcut to saying primary memory and it could't be more incorrect as there are all kinds of RAM used in many different places other than primary memory.
This !
This is probably nit-picking at definitions, but what about accessing a flash memory device does not make it a "random access memory"? At the device level, you give it an address and it returns the data in roughly constant time, like a DRAM or SRAM, and unlike a disk or tape. At the software level it can be accessed with read()s and write()s like file IO, but you can also just mmap() it in and use it that way. I think one of the memory vendors actually came out with a flash-backed DRAM DIMM (ecoram or something like that) a while ago.
I agree that we tend to use it more like we use disks, right now, but there is no inherent reason that has to be the case, especially if you, say, buy a group of NAND designers and have them reduce the block size and trade off some density for better latency. :-)
OK it is obvious you understand some of what is going on and why I find this frustrating, you don't have bocks in random access memory. Depending on the RAM you request a byte you get a byte, you write a byte a byte gets written. Now some RAM, with the corresponding controller will have features to fill a cache line with X number of bytes but access is still random.
As to the NAND designers you will get closer to random access with NOR based devices.
AAARRRGGGHHH!!!!!!!!!
Out of the mouths of __________. Get one riled up and the rest join in. The sad part is this is just mob mentality reinforcing an incorrect answer.
The answer is correct, NAND flash is far from what most engineers would call random access.
NAND Flash (a specific technical flavor of NVRAM: non-volatile RAM) IS RAM people!
This isn't NOR memory we are talking about here. I'd even go so far as to say NAND flash was specifically designed to replace other secondary storage methods.
As far as any memory technology is, because exactly none of the existing memory technologies are truly constant access time for any cell, but to the current and foreseeable bus clock frequencies the first byte latency is constant access in all of the solid state flavors of memories.
So what you are saying is that it is impossible for a processor to have single cycle access to its RAM array? If so that is very likely to surprise a bunch of embedded hardware engineers. Not all RAM arrays are DRAM.
RAM -- Random Access Memory, an attribute that describes the variability in accessing different parts of the memory.
From my perspective it is pretty much what it says it is - Random Access Memory. That means the processor can randomly generate and address and get or write data to that address.
RAM is not the computer's main memory,
Seriously? What college did you attend because I'd like to know what they called main memory. This actually bothers me more than your claim that NAND Flash is random access memory. If RAM isn't main memory than what is?
that is just the place that uses a particular flavor of it (currently DRAM) most visibly.
BS! Main memory is the computers primary memory that CPU or memory manager directly addresses when executing programs or accessing data. It can be DRAM or SRAM if you want timely read write access. It can also be NOR flash if writing to that storage isn't required. Beyond that there are other new technologies that allow for non volatile read write access. NAND flash isn't one of these, the normal way to use NAND is to load RAM with data from the NAND flash much like a disk access.
When you stop using that bad RAM shortcut and use the proper terms properly you won't make such a public spectacle of yourselves!
Yeah that would be helpful. It would be especially helpful if people understood what main memory is.
You might want to read the Flash 101 here: http://www.eetimes.com/design/memory...-to-NAND-flash. If you do I can't see how one could possibly call NAND Flash Random Access Memory. You can't even do a random access cycle randomly.
Geez.. The article repeatedly references the random accesses and doesn't contradict essentially constant access time for any byte in the array. Arguments that try to use burst reads byte sequences are improperly using read optimizations, because it is random fist byte access that determines the constant access time, not sequential accesses. All forms of RAM implement some type of burst read and/or write for the sequentially accessed bytes.
So , no nothing new in that article and it does not support you position that NAND Flash is not random access. I'll agree with the article that NAND Flash is not suited for "direct random access", but what the author is talking about is getting at a single byte off the page, especially if you need to change it. You can always get there in roughly constant time, and it will always take roughly constant time to replace the byte, but you have to so a shitpot of extra overhead work that doesn't help the actual task you are trying to accomplish. But it's still essentially constant access time to the first byte, so still RAM, even if it isn't smart to use it naively that way.
The answer is correct, NAND flash is far from what most engineers would call random access.
Still incorrect, even by your reference and it reads well.
This isn't NOR memory we are talking about here. I'd even go so far as to say NAND flash was specifically designed to replace other secondary storage methods.
NOR is a red herring, its RAM too. But yes NAND was specifically designed as a secondary storage technology.
So what you are saying is that it is impossible for a processor to have single cycle access to its RAM array? If so that is very likely to surprise a bunch of embedded hardware engineers. Not all RAM arrays are DRAM.
Not at all. I am simply saying RAM is nearly constant access time to any random byte in the storage array. If you are referring to my main buss comments, sickle cycle can depend on the specific bus you put it on, but single cycle is a red herring because the RAM just means essentially constant access time to the first byte. The sub-nanoscecond propagation through the storage array transistors and differing trace lengths from different physical positions on the array make for those differences that fall in the "essentially constant" term. There is no perfectly constant access in the physical world at an arbitrary resolution. But at the package level, and the discrete time intervals the bits are clocked off, it will be constant. I just went a little deeper into the description to cut off the ridiculous arguments about the inconstancies and where they actually come from. Not that you would have gone there, but there are some on the boards that do and a preemptive word just keeps the thread shorter.
From my perspective it is pretty much what it says it is - Random Access Memory. That means the processor can randomly generate and address and get or write data to that address.
That's a personal convenience, not a technical definition. Technically we can access any byte anywhere in the machine's storage, that's the whole idea of having an address space. And the address space cares not what it is implemented on.
Seriously? What college did you attend because I'd like to know what they called main memory. This actually bothers me more than your claim that NAND Flash is random access memory. If RAM isn't main memory than what is?
Main memory is main memory, or also called primary memory/storage. The specific technology that you implement a main/primary is inconsequential to it's position in the architecture. What will we call a memristor primary memory, especially if it is not constant access to every byte in the array? But still more than a million times faster than todays flavors of multi-transistor RAM? THAT'S why it is important to not confuse a technology attribute name with it's architectural use. When the implementation tech fundamentally changes your incorrect terminology forces you to compare them as old and new architectures, which aren't really old and new at all, but the same architecture, just with new components. It's drastically simpler to discuss the effect on correctness and performance when it is just comparing different black boxes in the same system.
And OBTW University of Minnesota, it was a top 10 in CS then, but a lot of retirements happened in the intervening years. Still not a slouch of a school.
BS! Main memory is the computers primary memory that CPU or memory manager directly addresses when executing programs or accessing data. It can be DRAM or SRAM if you want timely read write access. It can also be NOR flash if writing to that storage isn't required. Beyond that there are other new technologies that allow for non volatile read write access. NAND flash isn't one of these, the normal way to use NAND is to load RAM with data from the NAND flash much like a disk access.
I don't know what you are arguing here other than NAND flash isn't efficient to use as a primary memory. I'll agree with that as I already did in the second paragraph. As for the rest you are simply agreeing with my above paragraph that the implementation is NOT the architecture. You really need to pay attention to your own thoughts because now you are making my points for me, which is actually a good thing all around.
Yeah that would be helpful. It would be especially helpful if people understood what main memory is.
Yes. Now if you can read your own previous paragraph and see that you have been blind to the fact you actually agree with me but initially used the sloppy terminology we can all get on with doing good work.