Apple iPhone supplier TSMC on track to ship 10nm chips in this quarter, 'expand rapidly'
Apple's main mobile processor manufacturer, TSMC, is reportedly set to begin commercial shipments of 10-nanometer chips in the next month -- likely supporting claims that the "A11" processors in upcoming iPhones will use the technology.
Shipments of 10-nanometer chips should grow rapidly in the second half of the year, co-CEO Mark Liu confirmed at a company forum according to DigiTimes. Apple is typically expected to ship three new iPhones in the fall, including an "iPhone 8" as well as an "iPhone 7s" and "7s Plus."
Previous rumors suggested that TSMC had won orders to make a 10-nanometer "A11," and indeed other manufacturers such as Samsung are due to use the technology this year.
The processor in the iPhone 7 and 7 Plus, the A10 Fusion, is built using TSMC's 16-nanometer FinFET process. Shrinking die size can be money-saving for manufacturers, and beneficial to end users as well, since it often results in more efficient chips with less power consumption than would've otherwise been possible.
TSMC is meanwhile said to be planning "risk production" of 7-nanometer chips in the March quarter, switching into mass production in 2018 -- possibly in time for that year's iPhones. 5-nanometer risk production is already slated for the first half of 2019.
While the "iPhone 7s" and "7s Plus" will likely be evolutionary upgrades, the "iPhone 8" is expected to feature a 5.8-inch, edge-to-edge OLED display, of which 0.7 inches will be dedicated to virtual buttons, replacing the physical home button Apple has had since 2007. The phone may also have 3D facial recognition and/or iris scanning.
Shipments of 10-nanometer chips should grow rapidly in the second half of the year, co-CEO Mark Liu confirmed at a company forum according to DigiTimes. Apple is typically expected to ship three new iPhones in the fall, including an "iPhone 8" as well as an "iPhone 7s" and "7s Plus."
Previous rumors suggested that TSMC had won orders to make a 10-nanometer "A11," and indeed other manufacturers such as Samsung are due to use the technology this year.
The processor in the iPhone 7 and 7 Plus, the A10 Fusion, is built using TSMC's 16-nanometer FinFET process. Shrinking die size can be money-saving for manufacturers, and beneficial to end users as well, since it often results in more efficient chips with less power consumption than would've otherwise been possible.
TSMC is meanwhile said to be planning "risk production" of 7-nanometer chips in the March quarter, switching into mass production in 2018 -- possibly in time for that year's iPhones. 5-nanometer risk production is already slated for the first half of 2019.
While the "iPhone 7s" and "7s Plus" will likely be evolutionary upgrades, the "iPhone 8" is expected to feature a 5.8-inch, edge-to-edge OLED display, of which 0.7 inches will be dedicated to virtual buttons, replacing the physical home button Apple has had since 2007. The phone may also have 3D facial recognition and/or iris scanning.
Comments
http://www.digitimes.com/news/a20170223PD212.html
Might they discover a new round of shrinking possible at those wavelengths?
The shift will likely come with above to Graphene based processors. At some point feature size shrinks will end and we will needs something to replace silicon. When this happens we will see a rush back to performance and clock rate increases as that will be the only way forward to improve conventional processors.
quantum effects have been noticed since 120nm. At 90nm they became much larger than anticipated, and so ended the march to higher speeds. Intel, IBM and AMD were predicting that CPUs would reach 15, and even 20 GHz before now. As we know, that never happened. Instead, they went to multiple cores.
quantum effects will take over at about 5nm. Some companies are saying 5nm will be coming in a few years, but a number of chip,experts are doubting it. At that width, a line is only about 12 atoms wide.
Nah. 5nm seems to be something that might be possible, but might not. I read an article that said that 3nm was possible, but I highly doubt it. It has less to do,with the masking technology than to physics saying that many electrons will tunnel out of the feature as fast as it's put in. Don't worry about what Digitimes has to say about this.
If you want more info, this is a good site https://en.wikichip.org/wiki/14_nm_lithography_process.
Edited to add wikichip.org site.
I'd be more interested in informed commentary about IC production technology that's designed to find the actual quantum tunneling limits empirically, which is what TSMC may be doing, in defiance of what theory predicts. Or not.
TSMC has plans to shrink their nodes further, but a healthy dose of skepticism comes into play.
One thing is for certain, Intel's process lead has essentially vanished. And they are now being pushed with respect to CPU design by Apple's A series SOCs, never mind the upcoming AMD Ryzen.
The most interesting aspect to me is whether the next generation iPad (pro) will be released in March and whether the A10X chip is built on 10 nm.
They could possibly make it at 5nm, with all sort of caveats about the actual reality of this (wrapping them to reduce leakage at junction, stacking, multipass UV, whatever), but if it costs 10 times the cost to develop it with really shit yields, is it actual worth while to do so.
At that point, previously non economically viable techs will in fact emerge as progress stalls with current tech.
They'll start expensive and niche and eventually spread to more mainstream use.