Intel at 4 GHz??? Come on Motorola...

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  • Reply 41 of 170
    There's also the PIII-S, available at 1.4GHz; with a 1.53GHz version coming later this year, allegedly.
  • Reply 42 of 170
    Ahem.



    I notice that you don't bother to mention what _surrounds_ the G4. have you ever considered the fact of that PC133 DRAM isn't a very fair comparison to DDR-2100 DRAM or Rambus-800 RDRAM? Perhaps the question of: "Is there a SPECvec to go along with SPECint and SPECfpu?" never occured to any of you either.



    What this reminds me of is when Cray released the first vector supercomputers. they scored far below expectations when they were tested against earlier integer/floating point only computers. but. whenever programmers that had an iota of experience with these new beasts modified a program. the new Crays would blow the doors off other machines. this was because they added VPU aware code to the routines. thus allowing the spiffy new type of co-processor to shine.



    The Altivec(Or "Velocity Engine" if you believe Apple:-) VPU is probably one of the most ignored and misunderstood pieces of technology to come out of Apple. if only they'd write a benchmark thats fair to the G4's VPU. the 1Ghz G4 would easily crush in the heads of any 80886 or K7 that dared to challange it in such a benchmark. as is. the PowerPC. being a RISC chip. still enjoys about a 1:2.5 Mhz to speed ratio over any 80x86 chipset.



    Basically. the slowness in your G4 isn't Motorola's fault. it's Apple's. as they've been skimping on motherboard components.



    PS:

    As for the fastest chip on earth right now. that would be the DEC Alpha EV6. DEC has held the world's record for "Fastest CPU on earth" near continually from the inception of Project Alpha.



    After being weakened by a _very_ suspicious legal beating by Intel a few years ago. in which Intel also pilfered DEC's share in the StrongARM(Of which Apple was the other msjor co-developer). DEC was bought by Compaq.



    Compaq sold DEC to Intel last year. where they will make two more Alphas. the EV7 and the EV8(Also projected to be the fastest. and most advanced CPUs on earth) until 2004. when the Alpha will be retired. and then they'll be sent to work on Intel's pathetic IA64(Maybe Apple should hire DEC's Alpha engineers and rescue them!).



    Eric,
  • Reply 43 of 170
    brussellbrussell Posts: 9,812member
    [quote]Originally posted by Eric D.V.H:

    <strong>Basically. the slowness in your G4 isn't Motorola's fault. it's Apple's. as they've been skimping on motherboard components.</strong><hr></blockquote>As long as you keep posting this conclusion of yours in different threads, I'll keep correcting you. Motorola's current chips don't support anything above a 133Mhz bus. Apple is not somehow artificially limiting the bus speed of its Macs.
  • Reply 44 of 170
    timortistimortis Posts: 149member
    [quote]Originally posted by Eric D.V.H:

    <strong>Ahem.

    the PowerPC. being a RISC chip. still enjoys about a 1:2.5 Mhz to speed ratio over any 80x86 chipset.



    Eric,</strong><hr></blockquote>



    This is one of the stupidest things I've heard in a while.
  • Reply 45 of 170
    tigerwoods99tigerwoods99 Posts: 2,633member
    Ahh.......1.6 GHz Pentium 4 laptops are on sale now at your local Best Buy! Things are beginning to look ridiculous. I seriously think Apple would do good in making a rating system like AMD has. If someone sees "iMac G4 1500" instead of "iMac 800 MHz G4" they are gonna think it's faster! Make the PowerMac a "PowerMac 2500 G4" or something. Lie for all I care. Just do anything to show that Apple doesn't have computer that are A LOT slower than PCs. Half the people I know don't even have a clue what DDR RAM is or anything they just look at the processor speed. Bigger will always be better.
  • Reply 46 of 170
    eric d.v.heric d.v.h Posts: 134member
    [quote]As long as you keep posting this conclusion of yours in different threads, I'll keep correcting you. Motorola's current chips don't support anything above a 133Mhz bus. Apple is not somehow artificially limiting the bus speed of its Macs.<hr></blockquote>



    Sorry. I posted that prior to reading your other post.



    [quote]This is one of the stupidest things I've heard in a while.<hr></blockquote>



    Well. it's true. everyone knows that a contest between roughly equivalent CRISC and RISC chips will always result in the RISC having a speed edge to compensate for the lower clock frequency.



    [quote]I seriously think Apple would do good in making a rating system like AMD has. If someone sees "iMac G4 1500" instead of "iMac 800 MHz G4" they are gonna think it's faster! Make the PowerMac a "PowerMac 2500 G4" or something.<hr></blockquote>



    I agree. Apple should beat Intel at it's own game and replace Mhz with GFlops in all their ad materials.





    Eric,
  • Reply 47 of 170
    [quote]Well. it's true. everyone knows that a contest between roughly equivalent CRISC and RISC chips will always result in the RISC having a speed edge to compensate for the lower clock frequency.<hr></blockquote>



    Praytell, what part of a rhino's nether regions did you pull that little tidbit out of?



    [quote]

    I agree. Apple should beat Intel at it's own game and replace Mhz with GFlops in all their ad materials.<hr></blockquote>



    Strawman argument.

    <img src="graemlins/oyvey.gif" border="0" alt="[No]" />
  • Reply 48 of 170
    blablablabla Posts: 185member
    [quote]<strong>



    Well. it's true. everyone knows that a contest between roughly equivalent CRISC and RISC chips will always result in the RISC having a speed edge to compensate for the lower clock frequency.



    </strong><hr></blockquote>



    Huh? Is this a mathematical fact? What about StrongArm VS. AMDK7? Be very carefull about using words like "Well. it's true. everyone knows that"..



    [quote]<strong>

    I agree. Apple should beat Intel at it's own game and replace Mhz with GFlops in all their ad materials.



    </strong><hr></blockquote>



    That would be stupid. If you really think that Dual 1 Ghz (15 Gflops) is twice as fast as a single 1Ghz G4 ( 8 Glops).. well...



    Too many of you would buy the RDF and even an empty worhtless box with the Apple logo.
  • Reply 49 of 170
    msleemslee Posts: 143member
    [quote]As long as you keep posting this conclusion of yours in different threads, I'll keep correcting you. Motorola's current chips don't support anything above a 133Mhz bus. Apple is not somehow artificially limiting the bus speed of its Macs. <hr></blockquote>



    Wrong. Motorola's docs never say that the MPX bus is limited to 133 MHz. At any rate, it is Apple's fault...they need to design a mobo with a faster FSB and integrate a Tundra DDR controller.
  • Reply 50 of 170
    g-newsg-news Posts: 1,107member
    this thread has become fairly pointless
  • Reply 51 of 170
    brussellbrussell Posts: 9,812member
    [quote]Originally posted by mslee:

    <strong>Wrong. Motorola's docs never say that the MPX bus is limited to 133 MHz.</strong><hr></blockquote>They clearly state the MPX bus is 133. Show me where the G4's bus specs are higher than what Apple uses.
  • Reply 52 of 170
    timortistimortis Posts: 149member
    [quote]Originally posted by Eric D.V.H:

    <strong>



    Well. it's true. everyone knows that a contest between roughly equivalent CRISC and RISC chips will always result in the RISC having a speed edge to compensate for the lower clock frequency.

    </strong><hr></blockquote>



    Congratulations! You have completely misunderstood the entire concept of RISC.



    The original idea behind RISC was NOT to make low-mHz chips with high IPC. It WAS to reduce the complexity and number of instructions in the architecture and make them more uniform, so that the circuit logic to perform these operations would be simpler, as a result the chip would be able to reach, read this, higher clockspeeds ! If you remember some of Apple's documents from the early days of the introduction of PPC, they had some graphical charts showing how CISC chips would hit a speedwall sometime soon and how RISC chips would keep scaling in clockspeed.



    Things didn't pan out exactly as the RISC guys had planned it though. Intel and AMD were able to squeeze more clockspeed and more performance out of the severely limiting X86 ISA than anyone else thought possible. They did this by decoding the complex X86 instructions to simpler RISC like instructions within the first couple of pipeline stages, making ingenious designs and using the most advanced process technologies and not giving a rat's 4ss about power consumption.



    Intel also developed auto-vectorising compilers for their chips so people wouldn't have to hand-code SSE instructions like they do with Altivec.
  • Reply 53 of 170
    junkyard dawgjunkyard dawg Posts: 2,801member
    LOL, Apple are going to be stuck with Motorola chips at barely half the GHz of Wintels for years, and Jobs will only produce more smoke and mirrors to cover up the ugly truth: Macs are too slow to compete with Wintels in key markets, including but not limited to 3d modeling and such.



    But AppleZombies will continue to yapper and yammer about how a 1 GHz G4 is actually 1.5 times as fast as a 3 GHz Pentium 4, so in fact a DUAL 1 GHz G4 is 2.25 times as fast as the fastest Wintel machine available ( for the dualies you just multiply the times factor together for the speed advantage, because OS X threads everything dualie so that two brains are better than one, and the dualies are 1.5 x 1.5 times as fast as any Wintel out there.



    If people would just sit down and use these OS X Powermacs they would be able to tell right off how much faster the G4 is compared to a Pentium 4. Hell even a 500 MHz G4 could beat a 1.6 GHz Pentium 4, so a 1 GHz G4 can beat a 3.2 GHz Pentium 4 easy, and therefore it follows that a DUAL 1 GHz G4 would be faster than a 6.4 GHz Pentium 4!!! But they don't even make Pentiums that fast!



    After you factor in Altivec, forget it, the dual 1 GHz Powermacs are faster than 10 GHz Pentium 4 Wintels. It's not even a fair comparison.



    MHz don't matter dude, cuz they are just penis size and Apple already has a big dick.
  • Reply 54 of 170
    agou9agou9 Posts: 13member
    uhhhh, JYD that was sarcasm...right <img src="graemlins/bugeye.gif" border="0" alt="[Skeptical]" />
  • Reply 55 of 170
    eric d.v.heric d.v.h Posts: 134member
    [quote]Originally posted by johnsonfromwisconsin:

    <strong>Praytell, what part of a rhino's nether regions did you pull that little tidbit out of?</strong><hr></blockquote>



    It's called the truth. SGI's MIPS chips, DEC's Alpha, Hitachi's SH and IBM's POWER have all had much lower clock speeds than the vast bulk of CISC and CRISC chips. despite this. all of the above have totally whupped Intel and AMD's designs throughout their lifespan. like. despite having a +300Mhz deficit on average. the Alphas usually tend to be 2x-3x faster than even Intel an AMD's fastest CISC and CRISC CPUs.



    [quote]Originally posted by johnsonfromwisconsin:

    <strong>Strawman argument.

    <img src="graemlins/oyvey.gif" border="0" alt="[No]" /> </strong><hr></blockquote>



    I'm quite honest about it. this is one of the oldest pieces of Megahertz Myth crushing advice on earth: If the game is unfairly slanted. don't play it. of course I don't go along with his "Lie for all I care" comment. which is why I omitted it.



    [quote]Originally posted by blabla:

    <strong>Huh? Is this a mathematical fact? What about StrongArm VS. AMDK7? Be very carefull about using words like "Well. it's true. everyone knows that"..</strong><hr></blockquote>



    Pretty much. <a href="ftp://download.intel.com/design/strong/datashts/27824105.pdf"; target="_blank">current StrongARM</a>s top out at 206Mhz. with a 100Mhz RAM bus. although I haven't looked over all the SPEC charts. I'll bet that a 1Ghz StrongARM. loaded with DDR 2100 DRAM would kick the snot out of any CISC , CRISC or VLIW that dared to cross it's path.



    [quote]Originally posted by blabla:

    <strong>That would be stupid. If you really think that Dual 1 Ghz (15 Gflops) is twice as fast as a single 1Ghz G4 ( 8 Glops).. well...



    Too many of you would buy the RDF and even an empty worhtless box with the Apple logo.</strong><hr></blockquote>



    Neither Apple or I ever said that multiprocessing was a 100% overhead-free solution. as a second CPU effectively subtracts as little as about 20% from a double CPU computer. though adding more than two will decrease the overhead. as an octuple CPU machine subtracts as little as about 5% in overhead.



    Also. 8GFlops is the "Theoretical Maximum" of an indipendant G4. as the numerous variables surrounding the CPU in a typical computer _obviously_ alter that number. in summery. the combination of both system variables AND multiprocessing overhead would take their toll on the GFlops rating that Apple could attach to their kit. but I think it's safe to say that Apple would _crush_ Intel and AMD(Who might want to switch to Gflops too. just out of sheer spite for Intel ) in the marketing world if they adopted this system.



    [quote]Originally posted by mslee:

    <strong>Wrong. Motorola's docs never say that the MPX bus is limited to 133 MHz. At any rate, it is Apple's fault...they need to design a mobo with a faster FSB and integrate a Tundra DDR controller.</strong><hr></blockquote>



    Really? I'd _love_ it if you could dig up some PDF files/articles/press releases/links etc. please try and dig up something material to nail these guys with.



    [quote]Originally posted by ?:

    <strong>They clearly state the MPX bus is 133. Show me where the G4's bus specs are higher than what Apple uses.</strong><hr></blockquote>



    I'll have to agree for now. although I wonder if Apple could have gotten Motorola to add DDR to a G4 by request. especially after it's been out for over four years.



    [quote]Originally posted by timortis:

    <strong>Congratulations! You have completely misunderstood the entire concept of RISC.



    The original idea behind RISC was NOT to make low-mHz chips with high IPC. It WAS to reduce the complexity and number of instructions in the architecture and make them more uniform, so that the circuit logic to perform these operations would be simpler, as a result the chip would be able to reach, read this, higher clockspeeds ! If you remember some of Apple's documents from the early days of the introduction of PPC, they had some graphical charts showing how CISC chips would hit a speedwall sometime soon and how RISC chips would keep scaling in clockspeed.</strong><hr></blockquote>



    The best-laid plans of mice and engineers?



    Seriously though. despite their best efforts. the RISC CPU turned out to be a fantastic "Low Frequency" chip. I wasn't talking about the original dreams of the first RISC engineers. I was talking about current reality. but the best things sometimes come from the least expected places.



    And RISC <a href="http://www.mackido.com/Hardware/WhatIsRISC.html"; target="_blank">isn't what it used to be</a> anyways?



    [quote]Originally posted by timortis:

    <strong>Things didn't pan out exactly as the RISC guys had planned it though. Intel and AMD were able to squeeze more clockspeed and more performance out of the severely limiting X86 ISA than anyone else thought possible. They did this by decoding the complex X86 instructions to simpler RISC like instructions within the first couple of pipeline stages, making ingenious designs and using the most advanced process technologies and not giving a rat's 4ss about power consumption.</strong><hr></blockquote>



    Right. the reason Intel was able to do this was because they were(And still are) pouring MASSIVE amounts of resources into development. by comparison. most RISC CPUs(Especially the PPC ) are designed on a shoestring. the 80x86 architecture is still costing Intel massive amounts of money to prop up. which is why they're attempting to transition to the IA64. which is(Reletive to the 80x86 <img src="graemlins/lol.gif" border="0" alt="[Laughing]" /> ) substantially cheaper to support.



    [quote]Originally posted by timortis:

    <strong>Intel also developed auto-vectorising compilers for their chips so people wouldn't have to hand-code SSE instructions like they do with Altivec.</strong><hr></blockquote>



    Really? is that why P3/P4 users are still whining at developers to optimize their code for SSE and SSE 2 better? this sounds suspiciously like that "One click" Altivec optimizer in CodeWarrior. while it does produce results. it obviously can't compare to hand coding that stuff in.



    [quote]Originally posted by ?:

    <strong>LOL, Apple are going to be stuck with Motorola chips at barely half the GHz of Wintels for years, and Jobs will only produce more smoke and mirrors to cover up the ugly truth: Macs are too slow to compete with Wintels in key markets, including but not limited to 3d modeling and such.



    But AppleZombies will continue to yapper and yammer about how a 1 GHz G4 is actually 1.5 times as fast as a 3 GHz Pentium 4, so in fact a DUAL 1 GHz G4 is 2.25 times as fast as the fastest Wintel machine available ( for the dualies you just multiply the times factor together for the speed advantage, because OS X threads everything dualie so that two brains are better than one, and the dualies are 1.5 x 1.5 times as fast as any Wintel out there.



    If people would just sit down and use these OS X Powermacs they would be able to tell right off how much faster the G4 is compared to a Pentium 4. Hell even a 500 MHz G4 could beat a 1.6 GHz Pentium 4, so a 1 GHz G4 can beat a 3.2 GHz Pentium 4 easy, and therefore it follows that a DUAL 1 GHz G4 would be faster than a 6.4 GHz Pentium 4!!! But they don't even make Pentiums that fast!



    After you factor in Altivec, forget it, the dual 1 GHz Powermacs are faster than 10 GHz Pentium 4 Wintels. It's not even a fair comparison.



    MHz don't matter dude, cuz they are just penis size and Apple already has a big dick.</strong><hr></blockquote>



    :confused:



    Uuuuh. I don't get it. the first paragraph and the first part of the second paragraph don't match up with the rest of it. are you trying to be sarcastic or what?



    Maybe you should just sort out my opinion from answers to the others?



    Eric,



    [ 03-04-2002: Message edited by: Eric D.V.H ]</p>
  • Reply 56 of 170
    razzfazzrazzfazz Posts: 728member
    [quote]Originally posted by G-News:

    <strong>The P3-M doesn't quite compare though, it's quite a bit modified, and the process change of course allows for more than 1133.

    </strong><hr></blockquote>



    Of course it's the new process that allows for those greater speeds, but still it's basically the same old P3 core, so the argument about that core hitting its absolute speed limit at 1.13GHz is just not vlaid.



    Bye,

    RazzFazz
  • Reply 57 of 170
    razzfazzrazzfazz Posts: 728member
    [quote]Originally posted by Eric D.V.H:

    <strong>

    It's called the truth. SGI's MIPS chips, DEC's Alpha, Hitachi's SH and IBM's POWER have all had much lower clock speeds than the vast bulk of CISC and CRISC chips.

    </strong><hr></blockquote>



    That's plain wrong. When the Alpha was introduced, its clock speed was way ahead of the x86 chips of that time.



    x86 CPUs only started to surpass them MHz-wise when the only CISCy thing left was the x86-to-uOP decoder in the first few pipe stages.





    [quote]<strong>Which CISC chips are you comparing them to? Just wondering, s despite this. all of the above have totally whupped Intel and AMD's designs throughout their lifespan. like. despite having a +300Mhz deficit on average. the Alphas usually tend to be 2x-3x faster than even Intel an AMD's fastest CISC and CRISC CPUs.

    </strong><hr></blockquote>



    When was the last time you saw a true CISC CPU from Intel or AMD?



    It's true that an Alpha neatly outperforms an Athlon or Pentium running at much higher clock speeds, but that's not some sort of an inherent benefit of being RISC, but rather a tribute to the Alphas vastly superior, clean architecture. The same is true for most other classical examples of RISC chips - unlike the x86 processors, they had the luxury of starting from scratch with a clean, sane architecture, and they were initially targeted at the very high-end market, and could thus afford to put features into that architecture that were at that point unavailable to the x86 CPU makers for economical reasons.





    [quote]<strong>

    Pretty much. current StrongARMs top out at 206Mhz. with a 100Mhz RAM bus. although I haven't looked over all the SPEC charts. I'll bet that a 1Ghz StrongARM. loaded with DDR 2100 DRAM would kick the snot out of any CISC , CRISC or VLIW that dared to cross it's path.

    </strong><hr></blockquote>



    How about comparing a StrongARM to a true CISC chip like Moto's 68k (still widely used in the embedded space)?



    And again, keep in mind that there are more differences between the chips than just RISC vs. CISC architecture.



    Oh, and besides, why would RISC have an advantage over VLIW?





    [quote]<strong>

    Seriously though. despite their best efforts. the RISC CPU turned out to be a fantastic "Low Frequency" chip.</strong><hr></blockquote>



    Right, that's probably why both the Athlon and the P4 use a RISC back-end.





    [quote]<strong>I wasn't talking about the original dreams of the first RISC engineers. I was talking about current reality.

    </strong><hr></blockquote>



    High frequency RISC is reality (albeit with a CISC-to-uOP decoder slapped on) - that's why all current CPUs (VLIW aside) use a RISC architecture (at least internally). There's no way a true CISC architecture could scale anywhere close to today's clock speeds.



    Bye,

    RazzFazz
  • Reply 58 of 170
    [quote]It's called the truth. <hr></blockquote>



    No, it's called "I'm in my own little world and havent' done any actual research from places like <a href="http://www.spec.org"; target="_blank">www.spec.org</a> or <a href="http://www.highend3d.com/tests/maya/testcenter/database.3d?page=0&sortby="; target="_blank">Maya Test Center</a>"



    [quote]

    SGI's MIPS chips, DEC's Alpha, Hitachi's SH and IBM's POWER have all had much lower clock speeds than the vast bulk of CISC and CRISC chips. despite this. all of the above have totally whupped Intel and AMD's designs throughout their lifespan.<hr></blockquote>



    Compare these chips in spec and you'll find the x86 has been more than competitive in SPECINT, while it does loose by a significant margin in SPECFP to the Alpha and Power4, It doesn't loose this to all the RISC processors.



    Compare Maya, an FP intensive Modeler on it's native SGI MIPS/IRIX with Athlons that absolutely blow it away in rendering tests on single or dual processor configurations.



    [ 03-05-2002: Message edited by: johnsonfromwisconsin ]</p>
  • Reply 59 of 170
    eric d.v.heric d.v.h Posts: 134member
    [quote]Originally posted by johnsonfromwisconsin:

    <strong>Compare these chips in spec and you'll find the x86 has been more than competitive in SPECINT, while it does loose by a significant margin in SPECFP to the Alpha and Power4, It doesn't loose this to all the RISC processors.</strong><hr></blockquote>



    I already tried out SPEC's site. they don't list any PPC's beyond the 604e. but the lower Mhz EV6, POWER 4 and PA-RISC chips _do_ appear to hold up well to Athlon XP's.



    [quote]Originally posted by johnsonfromwisconsin:

    <strong>Compare Maya, an FP intensive Modeler on it's native SGI MIPS/IRIX with Athlons that absolutely blow it away in rendering tests on single or dual processor configurations.</strong><hr></blockquote>



    As for MIPS. the research money for high end MIPS has dried up since that slime Belluzzo(Whom promptly moved to COO at MicrosoftÉ) decided that SGI would start migrating to Intel's sucky IA64. and when Compaq subsequently killed it's himalaya line for the same reason. if they(MIPS) still had those two income sources. the MIPS would still crush all CISC and CRISC comers.



    Eric,



    [ 03-06-2002: Message edited by: Eric D.V.H ]</p>
  • Reply 60 of 170
    g-newsg-news Posts: 1,107member
    I'm sorry, but I'll just ignore your comments in the future, Eric, until you get your facts straight. By saying something like (freely) RISC was designed to have high IPC, while being slower on MHz and thus still beating the CISC competition, you made such a HUGE arse of yourself, it almost hurts.

    Maybe you should spend the next month reading Arstechnica (ars as in latin for art, not arse), and not here posting facts from Eric's Wonderland.



    G-News
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