Apple chip supplier TSMC preps first-ever 3-nanometer factory as founder announces retirem...

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Signalling likely improvements in the performance and size of Apple products, Apple processor manufacturer TSMC on Monday announced plans to establish the world's first 3-nanometer production facility.




The factory will come to Taiwan's Tainan Science Park at an unspecified date, according to the EE Times. TSMC has previously said, however, that it plans to build a 3- or 5-nanometer facility as soon as 2022, a date that factors in potential delays.

The A11 Bionic processor in Apple's iPhone 8 and iPhone X uses a 10-nanometer architecture, scaled back from the 16 nanometers of the A10. Shrinking enables better performance without a bigger chip, while simultaneously offering more power efficiency.

Apple is typically eager quick to adopt chip advancements from TSMC, and may switch to 7 nanometers for the "A12" processors in next year's iPhones.

Separately, Reuters reported on Monday that TSMC's chairman and founder, Morris Chang, will retire from all leadership positions as of June 2018. Chang will be replaced by Mark Liu and C.C. Wei, taking on chairman and CEO roles respectively.

Chang is 86 years old, and said that he's retiring for personal and family reasons.
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Comments

  • Reply 1 of 32
    sully54sully54 Posts: 108member
    What happens when we hit 1 nanometer? Does chip development end there?
  • Reply 2 of 32
    foggyhillfoggyhill Posts: 4,767member
    sully54 said:
    What happens when we hit 1 nanometer? Does chip development end there?
    It should already have ended with this tech... costs are going through the roof for those plants
    Lucioguidodoozydozen
  • Reply 3 of 32
    Three or five nanometers in 2022.  Because it's going to take a year to make up their mind which one?  Cheers!
  • Reply 4 of 32
    foggyhill said:
    sully54 said:
    What happens when we hit 1 nanometer? Does chip development end there?
    It should already have ended with this tech... costs are going through the roof for those plants
    Costs were through the roof even with 100nm and then with 50 and then with 20. Every step is costly.
    mizhou
  • Reply 5 of 32
    LucioguidoLucioguido Posts: 9unconfirmed, member
    Man, this was supposed to be physically impossible. A silicon atom itself is about ¼ of a nanometer. Would love to see some information about how they’re avoiding having quantum tunneling shatter any useful results. 

    Really dont understand how this would be practical pr cost effective. Really expected to change from silicon to graphene for so many reasons, none the least of which is how much easier it is to make single atom chains of graphene. Maybe that’s part of the plan and just wasn’t described today. 
    anomenetroxd_2
  • Reply 6 of 32
    sflocalsflocal Posts: 6,130member
    Damn, it's just insane the levels of miniaturization being achieved.  I remember reading numerous articles a few years ago about the challenges and obstacles in silicon going down to this level.  I wonder what they're doing to resolve the problem of physics and keeping those electrons going where they're supposed to go.

    Somewhere out there is the next chapter of fabrication processes.  Silicon is fast-becoming an obsolete material to use.  What's next?
    doozydozen
  • Reply 7 of 32
    Man, this was supposed to be physically impossible. A silicon atom itself is about ¼ of a nanometer. Would love to see some information about how they’re avoiding having quantum tunneling shatter any useful results. 

    Really dont understand how this would be practical pr cost effective. Really expected to change from silicon to graphene for so many reasons, none the least of which is how much easier it is to make single atom chains of graphene. Maybe that’s part of the plan and just wasn’t described today. 
    Si atoms are not what conducts electricity, though. It is just used as a base material of a wafer..
  • Reply 8 of 32
    ph382ph382 Posts: 43member
    sully54 said:
    What happens when we hit 1 nanometer? Does chip development end there?
    Some of us are old to remember concerns about the ability to build anything smaller than 100 nm.

    With all that processing power, FaceID will be able to tell if you had too many drinks the previous night, and didn't get enough sleep by the bags under your eyes.

    radarthekatStrangeDaysmizhouwatto_cobra
  • Reply 9 of 32
    LucioguidoLucioguido Posts: 9unconfirmed, member
    Man, this was supposed to be physically impossible. A silicon atom itself is about ¼ of a nanometer. Would love to see some information about how they’re avoiding having quantum tunneling shatter any useful results. 

    Really dont understand how this would be practical pr cost effective. Really expected to change from silicon to graphene for so many reasons, none the least of which is how much easier it is to make single atom chains of graphene. Maybe that’s part of the plan and just wasn’t described today. 
    Si atoms are not what conducts electricity, though. It is just used as a base material of a wafer..
    Well, I’m not sure what you mean by this. Yeah, silicon is exactly what the transistors and gates are etched into. Yes, electrons don’t just stream through them near the speed of light, because that’s not how conductive metals work. Still doesn’t change anything about the silicon walls being vastly thinner than the variance in location which an electron is expected to “jump” about. 
    radarthekat
  • Reply 10 of 32
    fastasleepfastasleep Posts: 6,452member
    sully54 said:
    What happens when we hit 1 nanometer? Does chip development end there?
    Why, because nothing exists between 0 and 1?
    doozydozenmizhoubageljoey
  • Reply 11 of 32
    tallest skiltallest skil Posts: 43,388member
    Why, because nothing exists between 0 and 1?
    An atom exists between zero and one. There was supposed to be inescapable transistor jumping at 5 nanometers, last I read. I realize that it's thanks to the use of new materials that we've even gotten down this far, but there comes a point when your transistors are smaller than the width of an atom and you start running into quantum effects that we can't begin to calculate, much less engineer around.
    doozydozen
  • Reply 12 of 32
    fastasleepfastasleep Posts: 6,452member
    Why, because nothing exists between 0 and 1?
    An atom exists between zero and one. There was supposed to be inescapable transistor jumping at 5 nanometers, last I read. I realize that it's thanks to the use of new materials that we've even gotten down this far, but there comes a point when your transistors are smaller than the width of an atom and you start running into quantum effects that we can't begin to calculate, much less engineer around.
    I get all that. I was making a tongue in cheek comment on the arbitrary limit of the integer 1. 
    doozydozen
  • Reply 13 of 32
    ZarkinZarkin Posts: 16member
    I'm surprised Apple didn't have TSMC relabel this "30 Angstrom" processors and polish it up with the appearance that they invented "Angstrom processing!" and then claim everyone else is following them when they switch to Angstrom processing too.
  • Reply 14 of 32
    hexclockhexclock Posts: 1,307member
    sully54 said:
    What happens when we hit 1 nanometer? Does chip development end there?
    No, because chips will switch from electrons flowing through wire to photons traveling through glass. The pipes won’t shrink but the messengers will travel 1000x faster.  
    doozydozen
  • Reply 15 of 32
    tallest skiltallest skil Posts: 43,388member
    hexclock said:
    …the messengers will travel 1000x faster.  
    Then why don't we DO THAT NOW?!
    doozydozen
  • Reply 16 of 32
    hexclockhexclock Posts: 1,307member
    hexclock said:
    …the messengers will travel 1000x faster.  
    Then why don't we DO THAT NOW?!
    They are still working out the physics. Here is an example:

    https://phys.org/news/2017-09-holy-grail-creation-brain-like-photonic.html
    tallest skil
  • Reply 17 of 32
    iqatedoiqatedo Posts: 1,836member
    Zarkin said:
    I'm surprised Apple didn't have TSMC relabel this "30 Angstrom" processors and polish it up with the appearance that they invented "Angstrom processing!" and then claim everyone else is following them when they switch to Angstrom processing too.
    The Angstrom (Å) is an historic unit in optics and a beautiful word! I once worked with 10 Å optical filters.
  • Reply 18 of 32
    StrangeDaysStrangeDays Posts: 13,086member
    hexclock said:
    …the messengers will travel 1000x faster.  
    Then why don't we DO THAT NOW?!
    Ideas are the easy part, implementation is the hard part. 
    mizhoutallest skilwatto_cobra
  • Reply 19 of 32
    foggyhillfoggyhill Posts: 4,767member
    foggyhill said:
    sully54 said:
    What happens when we hit 1 nanometer? Does chip development end there?
    It should already have ended with this tech... costs are going through the roof for those plants
    Costs were through the roof even with 100nm and then with 50 and then with 20. Every step is costly.
    The mounting costs are not linear, that's why there is less and less competitors in the fab space.
    How many companies were able to decide to not only set up a 100nm, but continue the R&D to pursue the next two ones (A LOT).
    How many can now do the 10nm + R&D to get to 7nm, 5nm 3nm, almost none.

    The fact you have to invest 15-20 years in advance in R&D to get to those 3nm (yes, the techs that will be used have been around that long and worked on by TSMC that long) means only companies with huge cashflows can even play. Who can invest 5-10 billion over 20 years with the possibility of making back this money a long long time down the road?

    Past a certain point financial realities hit.

    Seems only big players will be able to pay with those kind of nodes and will use this advantage to corner the market even more than now: Apple will be one of them.
    edited October 2017 watto_cobra
  • Reply 20 of 32
    foggyhillfoggyhill Posts: 4,767member
    sflocal said:
    Damn, it's just insane the levels of miniaturization being achieved.  I remember reading numerous articles a few years ago about the challenges and obstacles in silicon going down to this level.  I wonder what they're doing to resolve the problem of physics and keeping those electrons going where they're supposed to go.

    Somewhere out there is the next chapter of fabrication processes.  Silicon is fast-becoming an obsolete material to use.  What's next?
    Well, just knowing where they are at that level is a challenge, cause the electrons position is a wave function and part of that electron is beyond the gate... Oh my.
    Reducing the voltage and frequency I suppose reduces how much bleeds through but then you got some slow ass chip.
    Accepting the bleed and finding a way to detect a less than ideal threshold can work. Also trying to better spread out the contact surface would help.
    Didn't they try to wrap the gate (not just in a plane but in 3D) to alleviate this or am I thinking of something else entirely.


    edited October 2017
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