ATI and nVidia's techniques are cheap tricks compared to tile based rendering. once Imagine Tech gets in gear and raises the speed of the Kyro's core to higher levels. there'll be no stopping them. and although nVidia owns something like that called Gigapixel that it got in it's purchase of (God bless their souls)3DFX. it's been about a year since nVidia acquired them. and nVidia hasn't said word one about using it. that. combined with ATI and nVidia's legendary lazyness when it comes to radically altering the fundamental design of their chips. prompts me to think that they would probably choose shifting to HyperTransport over increasing the intelligence of their chips.</strong><hr></blockquote>
While I have always been a big fan of the tile-based rendering approach (since PowerVR days), its not the complete design win that you seem to imply. It saves hugely on the output side of the equation, but involves significant costs on the input and computational side -- and this is a real disadvantage as the complexity of the geometry increases, and going forward it is going to become even more complex.
The tile-based renderer has to re-render the scene in each tile, although they can cull very aggressively due to the small tile size. Nonetheless there are frequently vertices which exist in multiple tiles, which means their vertex processor is going to have to be significantly faster than nVidia/ATI's. Also, the considerable amount of organization required to handle the tile culling & draw lists on input is expensive and typically had some nasty limits on scene complexity.
Since scene complexity is increasing faster than output resolution, the tile-based approach may not be the best solution. I'm hopefully that they can find the funding to continue developing Kyro-III, but nVidia and ATI have quite a lead and I'm not going to stake anything on Kyro catching up.
<strong>even if HT is taped out and all, there's no product a mortal person can buy today. As we know from things like FireWire, sometimes it takes a long road from taping out to rolling out.
</strong><hr></blockquote>
I dunno about that -- a quick search for "XBox" and "HyperTransport" in Google seems to indicate that each and every XBox ships with an HT bus in it. Lots of mortals have been buying them since November.
<strong>name variant "unequal" (stupid UBB doesn't eat the sign) variant. name variant = variant of a name for the same thing, thus it's perfectly legal to say it like that.</strong><hr></blockquote>
By precise definition. it's correct. but I thought it was just a _little_ too vague. and might confuse the others.
[quote]Originally posted by G-News:
<strong>As for HT vs AGP 8x: Both have been in development for a long time and both are not ready for the market aparently. even if HT is taped out and all, there's no product a mortal person can buy today. As we know from things like FireWire, sometimes it takes a long road from taping out to rolling out.</strong><hr></blockquote>
As was said later. HyperTransport is right here. right now. and has been for a very long time. whereas AGP 8x is _just_ about to take it's first baby steps. as for FireWire. you know my opinion on Apple's raw treatment of it historically. that was unnecessary. and I still think I deserved a soldered on FireWire port in my 6500/250.
[quote]Originally posted by G-News:
<strong>And last but not least: If you give me the choice between a slotted AGP 8x port around 2GB/sec and a soldered HT graphics chip with 12.8GB/sec, I'll take the AGP ANY day. non-upgradeabÉSNIPPEDÉhics, CPU's and other quickly ageing devices, then it will absolutely have to be slotted, or it's going to fail. But I'm sure the consortium knows that better than Apple.</strong><hr></blockquote>
_Exactly_! this is why all of you need to spread the word about HyperTransport's secret slot. go forth and vanquish the foul intra-board only myth. persuade Apple into forcing the issue!!!!(Perhaps I got a little too carried away )
[quote]Originally posted by G-News:
<strong>HT is going to get us fast motherboards without bottlenecks. With a little luc it's also going to give us extra slots for ultra fast expansion, but it's not going to kill PCI, PCI-X or AGP anytime soon.</strong><hr></blockquote>
If Apple moves quickly enough. it could easily kill all of them before they leave the starting gate.
<strong>While I have always been a big fan of the tile-based rendering approach (since PowerVR days), its not the complete design win that you seem to imply. It saves hugely on the output side of the equation, but involves significant costs on the input and computational side -- and this is a real disadvantage as the complexity of the geometry increases, and going forward it is going to become even more complex.</strong><hr></blockquote>
Yes. it isn't perfect. but if Imagine can manage to get the GPU core up to about the level of a Radeon or a GeForce 2 Ultra. they'll be shipping a substantially cheaper card with near equivelant performance to some of ATI and nVidia's best
[quote]Originally posted by Programmer:
<strong>The tile-based renderer has to re-render the scene in each tile, although they can cull very aggressively due to the small tile size. Nonetheless there are frequently vertices which exist in multiple tiles, which means their vertex processor is going to have to be significantly faster than nVidia/ATI's. Also, the considerable amount of organization required to handle the tile culling & draw lists on input is expensive and typically had some nasty limits on scene complexity.
Since scene complexity is increasing faster than output resolution, the tile-based approach may not be the best solution. I'm hopefully that they can find the funding to continue developing Kyro-III, but nVidia and ATI have quite a lead and I'm not going to stake anything on Kyro catching up.</strong><hr></blockquote>
Me too. but I think that if the Kyro III makes it out the door. it will be enough to make ATI and nVidia nervous.
<strong>I dunno about that -- a quick search for "XBox" and "HyperTransport" in Google seems to indicate that each and every XBox ships with an HT bus in it. Lots of mortals have been buying them since November.</strong><hr></blockquote>
The specs of their controller ports for the Xbox are USB, with higher voltage and a custom port shape...why? the PS2 has regular USB ports, thus you can connect whatever you want (theoretically).
Of course MS goes for a proprietary solution once again. Not that I care, since I'm never going to buy an Xbox, but still, it's very typical.
G-News
As for the nForce:
HT is aparently only used for North to Southbridge connection (which again is the "on board device connection only" approach) and only has 800MB/sec, which really isn't spectacular (that is just the peak rate of PC-100 SDRAM, not really a big deal).
AMD/nVidia is not going to win anyone's heart if they continue to exploit it only to such a minute degree.
But I'll admit that I didn't know nForce already had HT, and thus there is a product that a mortal could buy. Plus the nForce is a fine board at that. (the one with an AGP slot, instead of the crappy onboard graphics). As you can see, at the moment even nVidia doesn't introduce a slot, they keep the legacy slots like PCI and AGP - for now.
first, iirc all nforce boards have onboard video as well as an agp4x slot, my msi board does at the least.
second is it possible to have a hypertransport slot? would any devices be able to use the increased speed, is the pci bus close to being saturated now?
The specs of their controller ports for the Xbox are USB, with higher voltage and a custom port shape...why? the PS2 has regular USB ports, thus you can connect whatever you want (theoretically).
Of course MS goes for a proprietary solution once again. Not that I care, since I'm never going to buy an Xbox, but still, it's very typical.
</strong><hr></blockquote>
Actually, their reasoning here was sound. They wanted to go with USB as opposed to creating a new (and equally proprietary) controller interface. However, a standard USB connector doesn't offer the proper retention characteristics for a console controller. A standard USB plug can become detached too easily if a player yanks on the cord during gaming. Look at Sony's controller plug. It's almost impossible to yank out accidentally.
I couldn't say either way. Apple's docs just say "a 300-pin connector".
</strong><hr></blockquote>
As I said, "ZIF socket" is what the socket 7 (actually all the current CPU sockets in x86 land) looks like (i.e. the white rectangle with pin holes and a lever on one side).
[quote]<strong>
Hmm? while the KeyLargo I/O controller looks suspiciously generic. Apple's docs don't mention any companies. so Apple _could_ have had it designed just for themselves.
</strong><hr></blockquote>
Yes, AFAIK Uni-N and KeyLargo are used exclusively by Apple (which kinda sucks for embedded manufacturers, since Uni-N is pretty much the best north bridge currently available for the PPC - actually, IIRC, it's the only one to even support MPX bus [Moto's own MPC10x chips don't!]).
It can't have been _that_ expensive. but even if it was. Apple should have used a faster variety of DRAM. in a separate block. directly connected to the CPU. so as to increase access speed to this oft consulted data.
</strong><hr></blockquote>
Um, where exactly on the G4 would you connect it to? There is no such facility, apart maybe from the L3 interface on the 745x chips (which can optionally be used as a private address space). Also, this would be one hell of an ugly hack, since if you really don't memory-map the ROM routines, they would be in a separate address space then, which would result in all sorts of problems (if you do memory-map them, you could just as well place them there in the first place).
It can't have been _that_ expensive. but even if it was. Apple should have used a faster variety of DRAM. in a separate block. directly connected to the CPU. so as to increase access speed to this oft consulted data.
Um, where exactly on the G4 would you connect it to? There is no such facility, apart maybe from the L3 interface on the 745x chips (which can optionally be used as a private address space). Also, this would be one hell of an ugly hack, since if you really don't memory-map the ROM routines, they would be in a separate address space then, which would result in all sorts of problems (if you do memory-map them, you could just as well place them there in the first place).</strong><hr></blockquote>
The idea of doing anything special with the ROM is just not sensible. No external memory can be anything close to the performance of the L1/L2 onchip caches, and if there are frequently used pieces of code then that's where they'll end up. Even better the caches will make almost any memory much faster, not just the "ROM" code. Most (if not all) of the old "ROM" code is now unused under MacOSX anyhow.
Rather than wasting expensive memory on dedicated memory space for some now obsolete code, it would be much better to attach fast memory to a dedicated L3 cache interface... oh wait, they did that.
The MacOS ROM was useful and sensible when RAM was small, expensive, and not terribly fast (1985 - 1990), but since then has been making less and less sense. The iMac's radical departure of storing the former ROM code in a disk file was a huge step forward for the Macintosh.
The specs of their controller ports for the Xbox are USB, with higher voltage and a custom port shape...why? the PS2 has regular USB ports, thus you can connect whatever you want (theoretically).
Of course MS goes for a proprietary solution once again. Not that I care, since I'm never going to buy an Xbox, but still, it's very typical.
G-News
</strong><hr></blockquote>
sony is also begining to offer their own linux distro for the ps2
<strong>As I said, "ZIF socket" is what the socket 7 (actually all the current CPU sockets in x86 land) looks like (i.e. the white rectangle with pin holes and a lever on one side).</strong><hr></blockquote>
What I meant by "ZIF socket" is "Mechanically compatible with that socket used for the PPC 750's daughterboard in the Blue and White G3"
[quote]Originally posted by RazzFazz:
<strong>Yes, AFAIK Uni-N and KeyLargo are used exclusively by Apple (which kinda sucks for embedded manufacturers, since Uni-N is pretty much the best north bridge currently available for the PPC - actually, IIRC, it's the only one to even support MPX bus [Moto's own MPC10x chips don't!]).</strong><hr></blockquote>
<strong>It can't have been _that_ expensive. but even if it was. Apple should have used a faster variety of DRAM. in a separate block. directly connected to the CPU. so as to increase access speed to this oft consulted data.</strong><hr></blockquote>
Sorry. I meant "DROM".
[quote]Originally posted by RazzFazz:
<strong>Um, where exactly on the G4 would you connect it to? There is no such facility, apart maybe from the L3 interface on the 745x chips (which can optionally be used as a private address space). Also, this would be one hell of an ugly hack, since if you really don't memory-map the ROM routines, they would be in a separate address space then, which would result in all sorts of problems (if you do memory-map them, you could just as well place them there in the first place).</strong><hr></blockquote>
[quote]Originally posted by RazzFazz:
<strong>The idea of doing anything special with the ROM is just not sensible. No external memory can be anything close to the performance of the L1/L2 onchip caches, and if there are frequently used pieces of code then that's where they'll end up. Even better the caches will make almost any memory much faster, not just the "ROM" code. Most (if not all) of the old "ROM" code is now unused under MacOSX anyhow.
[QUOTE]Originally posted by RazzFazz:
[QB]Rather than wasting expensive memory on dedicated memory space for some now obsolete code,</strong><hr></blockquote>
Read only chips are just plain old cheaper. that's why they sometimes still ship console cartridge games without in-cart saves. using up expensive main DRAM for it is a waste of money. and having a direct channel for it would speed up access dramatically.
As for OS X. they should have put some of it's core routines into ROM. this would have sped things up a fair bit.
[quote]Originally posted by RazzFazz:
<strong>it would be much better to attach fast memory to a dedicated L3 cache interface... oh wait, they did that.</strong><hr></blockquote>
Argh! I have a special hatred of that. when I first read the "2MB DDR as L3 cache" thing on Apple's site. while expecting it to read something more like: "332Mhz DDR 5300 DRAM system bus" or "64-bit G5 enables full 64-bit A/V". it made me want to SCREAM.
After the wintel jerks taunting us for _years_ now about the speed of our RAM. and Met@Box putting 2MB of (Far quicker)SRAM backside cache on their <a href="http://www.everymac.com/upgrade_cards/metabox/joecard_g4/joecard_g4_450.html"; target="_blank">G4 cards</a>. Apple dares to taunt _us_. their loyal user base. by using it as L3 cache? that goes beyond stupid to just plain mean.
[quote]Originally posted by RazzFazz:
[QBThe MacOS ROM was useful and sensible when RAM was small, expensive, and not terribly fast (1985 - 1990), but since then has been making less and less sense. The iMac's radical departure of storing the former ROM code in a disk file was a huge step forward for the Macintosh.[/QB]<hr></blockquote>
This was just a cheap hack to make OS X(Which. I think at least. is also a cheap hack) work.
[RANT]In my personal opinion. OS X and every other form of UN*X should have been retired decades ago(Alongside DOS, MVS, VMS and their other CLI ilk). Apple should have bought Be(Or just treated them right before. when they were all in the Copland project programming team ). and they either should have based the G3(And. by extension. the G4) off the 604. instead of the 603 like they did. or gone full race and moved up to the fabled PPC 630.[/RANT]
<strong>second is it possible to have a hypertransport slot? would any devices be able to use the increased speed, is the pci bus close to being saturated now?</strong><hr></blockquote>
The Beige G3 series still have the 4MB ROM chip, and no HD ROM image and work officially with OS X. Thus the removal of the ROM is not a hack to make OS X work, but to move to the UMA artchitecture idea with OpenFirmware and all that stuff.
The first Macs to use the Apple ZIF socket was teh Beige G3 as well, and not the B&W G3.
Do you think taking ROM instead of loading it into the RAM would be cheaper? You name it yourself: "with an extra channel, this would be faster"...and you sure think that channel would be free, wouldn't require extra mobo engineering, PCB, copper lines etc etc. Since 10 years everything is moving away from ROM's (hard wired data) to other designs that allow for dynamic access and read/write as much as possible. It's no secret hwy Nintendo chose the ROM thing up to the N64...proprietary, 100% copy protected environment. See the gamecube for more on this idea translated into the DVD world. (Custom DVD of course).
Last but not least, the move from hardwired ROM to an OpenFirmware and HD code ROM enabled for Firmware upgrades, which have procen to be important maintenance products for Apple machiens since the iMac. Before that you had only the choice of upgrading the ROM chip, which, officially was never possible.
Enabling Master/Slave IDE channels on a Beige G3 Rev A (and along with that, CPU upgrade compatibility for G4 and copper chips) is only possible by buying a Rev.B or Rev.C ROM chip that only OWC ever sold at halfway reasonable prices, and are now harder to find than the egg of columbus. And you're seriously telling me, moving away from the ROM was bad??????
Maybe I missed somethign now, but that shall be enough for now.
G-News
Ah yeah on the DDR-SDRAM L3 cache thing:
I think, and others agree, that this is a mistake Apple made on the speccing. It's most certainly DDR-SRAM and not SDRAM, at least the machines before the 2002 QS had that, and that's likely better suited for caching and also faster.
Someone should open his DP1000 and make pictures of the L3 memory chips.
Comments
<strong>
ATI and nVidia's techniques are cheap tricks compared to tile based rendering. once Imagine Tech gets in gear and raises the speed of the Kyro's core to higher levels. there'll be no stopping them. and although nVidia owns something like that called Gigapixel that it got in it's purchase of (God bless their souls)3DFX. it's been about a year since nVidia acquired them. and nVidia hasn't said word one about using it. that. combined with ATI and nVidia's legendary lazyness when it comes to radically altering the fundamental design of their chips. prompts me to think that they would probably choose shifting to HyperTransport over increasing the intelligence of their chips.</strong><hr></blockquote>
While I have always been a big fan of the tile-based rendering approach (since PowerVR days), its not the complete design win that you seem to imply. It saves hugely on the output side of the equation, but involves significant costs on the input and computational side -- and this is a real disadvantage as the complexity of the geometry increases, and going forward it is going to become even more complex.
The tile-based renderer has to re-render the scene in each tile, although they can cull very aggressively due to the small tile size. Nonetheless there are frequently vertices which exist in multiple tiles, which means their vertex processor is going to have to be significantly faster than nVidia/ATI's. Also, the considerable amount of organization required to handle the tile culling & draw lists on input is expensive and typically had some nasty limits on scene complexity.
Since scene complexity is increasing faster than output resolution, the tile-based approach may not be the best solution. I'm hopefully that they can find the funding to continue developing Kyro-III, but nVidia and ATI have quite a lead and I'm not going to stake anything on Kyro catching up.
[ 03-06-2002: Message edited by: Programmer ]</p>
<strong>even if HT is taped out and all, there's no product a mortal person can buy today. As we know from things like FireWire, sometimes it takes a long road from taping out to rolling out.
</strong><hr></blockquote>
I dunno about that -- a quick search for "XBox" and "HyperTransport" in Google seems to indicate that each and every XBox ships with an HT bus in it. Lots of mortals have been buying them since November.
The controllers maybe...
G-News
<strong>name variant "unequal" (stupid UBB doesn't eat the sign) variant. name variant = variant of a name for the same thing, thus it's perfectly legal to say it like that.</strong><hr></blockquote>
By precise definition. it's correct. but I thought it was just a _little_ too vague. and might confuse the others.
[quote]Originally posted by G-News:
<strong>As for HT vs AGP 8x: Both have been in development for a long time and both are not ready for the market aparently. even if HT is taped out and all, there's no product a mortal person can buy today. As we know from things like FireWire, sometimes it takes a long road from taping out to rolling out.</strong><hr></blockquote>
As was said later. HyperTransport is right here. right now. and has been for a very long time. whereas AGP 8x is _just_ about to take it's first baby steps. as for FireWire. you know my opinion on Apple's raw treatment of it historically. that was unnecessary. and I still think I deserved a soldered on FireWire port in my 6500/250.
[quote]Originally posted by G-News:
<strong>And last but not least: If you give me the choice between a slotted AGP 8x port around 2GB/sec and a soldered HT graphics chip with 12.8GB/sec, I'll take the AGP ANY day. non-upgradeabÉSNIPPEDÉhics, CPU's and other quickly ageing devices, then it will absolutely have to be slotted, or it's going to fail. But I'm sure the consortium knows that better than Apple.</strong><hr></blockquote>
_Exactly_! this is why all of you need to spread the word about HyperTransport's secret slot. go forth and vanquish the foul intra-board only myth. persuade Apple into forcing the issue!!!!(Perhaps I got a little too carried away
[quote]Originally posted by G-News:
<strong>HT is going to get us fast motherboards without bottlenecks. With a little luc it's also going to give us extra slots for ultra fast expansion, but it's not going to kill PCI, PCI-X or AGP anytime soon.</strong><hr></blockquote>
If Apple moves quickly enough. it could easily kill all of them before they leave the starting gate.
Eric,
<strong>While I have always been a big fan of the tile-based rendering approach (since PowerVR days), its not the complete design win that you seem to imply. It saves hugely on the output side of the equation, but involves significant costs on the input and computational side -- and this is a real disadvantage as the complexity of the geometry increases, and going forward it is going to become even more complex.</strong><hr></blockquote>
Yes. it isn't perfect. but if Imagine can manage to get the GPU core up to about the level of a Radeon or a GeForce 2 Ultra. they'll be shipping a substantially cheaper card with near equivelant performance to some of ATI and nVidia's best
[quote]Originally posted by Programmer:
<strong>The tile-based renderer has to re-render the scene in each tile, although they can cull very aggressively due to the small tile size. Nonetheless there are frequently vertices which exist in multiple tiles, which means their vertex processor is going to have to be significantly faster than nVidia/ATI's. Also, the considerable amount of organization required to handle the tile culling & draw lists on input is expensive and typically had some nasty limits on scene complexity.
Since scene complexity is increasing faster than output resolution, the tile-based approach may not be the best solution. I'm hopefully that they can find the funding to continue developing Kyro-III, but nVidia and ATI have quite a lead and I'm not going to stake anything on Kyro catching up.</strong><hr></blockquote>
Me too. but I think that if the Kyro III makes it out the door. it will be enough to make ATI and nVidia nervous.
Eric,
<strong>I dunno about that -- a quick search for "XBox" and "HyperTransport" in Google seems to indicate that each and every XBox ships with an HT bus in it. Lots of mortals have been buying them since November.</strong><hr></blockquote>
Right on. but lets not forget the famed <a href="http://www.nvidia.com/docs/IO/16/ATT/nForce_Platform_Processing_Architecture_Tech_Brief .pdf" target="_blank">nForce</a>.
[quote]Originally posted by G-News:
<strong>Fine, and what can you change about your xbox, apart from the HD?
The controllers maybe...</strong><hr></blockquote>
Not much. That's why Apple needs to get the ball rolling on Slotted HyperTransport.
Eric,
[ 03-06-2002: Message edited by: Eric D.V.H ]</p>
The specs of their controller ports for the Xbox are USB, with higher voltage and a custom port shape...why? the PS2 has regular USB ports, thus you can connect whatever you want (theoretically).
Of course MS goes for a proprietary solution once again. Not that I care, since I'm never going to buy an Xbox, but still, it's very typical.
G-News
As for the nForce:
HT is aparently only used for North to Southbridge connection (which again is the "on board device connection only" approach) and only has 800MB/sec, which really isn't spectacular (that is just the peak rate of PC-100 SDRAM, not really a big deal).
AMD/nVidia is not going to win anyone's heart if they continue to exploit it only to such a minute degree.
But I'll admit that I didn't know nForce already had HT, and thus there is a product that a mortal could buy. Plus the nForce is a fine board at that. (the one with an AGP slot, instead of the crappy onboard graphics). As you can see, at the moment even nVidia doesn't introduce a slot, they keep the legacy slots like PCI and AGP - for now.
G-News
[ 03-06-2002: Message edited by: G-News ]</p>
second is it possible to have a hypertransport slot? would any devices be able to use the increased speed, is the pci bus close to being saturated now?
[ 03-07-2002: Message edited by: dartblazer ]
[ 03-07-2002: Message edited by: dartblazer ]</p>
<strong>btw, MS are a bunch of assholes:
The specs of their controller ports for the Xbox are USB, with higher voltage and a custom port shape...why? the PS2 has regular USB ports, thus you can connect whatever you want (theoretically).
Of course MS goes for a proprietary solution once again. Not that I care, since I'm never going to buy an Xbox, but still, it's very typical.
</strong><hr></blockquote>
Actually, their reasoning here was sound. They wanted to go with USB as opposed to creating a new (and equally proprietary) controller interface. However, a standard USB connector doesn't offer the proper retention characteristics for a console controller. A standard USB plug can become detached too easily if a player yanks on the cord during gaming. Look at Sony's controller plug. It's almost impossible to yank out accidentally.
<strong>
I couldn't say either way. Apple's docs just say "a 300-pin connector".
</strong><hr></blockquote>
As I said, "ZIF socket" is what the socket 7 (actually all the current CPU sockets in x86 land) looks like (i.e. the white rectangle with pin holes and a lever on one side).
[quote]<strong>
Hmm? while the KeyLargo I/O controller looks suspiciously generic. Apple's docs don't mention any companies. so Apple _could_ have had it designed just for themselves.
</strong><hr></blockquote>
Yes, AFAIK Uni-N and KeyLargo are used exclusively by Apple (which kinda sucks for embedded manufacturers, since Uni-N is pretty much the best north bridge currently available for the PPC - actually, IIRC, it's the only one to even support MPX bus [Moto's own MPC10x chips don't!]).
Bye,
RazzFazz
<strong>
It can't have been _that_ expensive. but even if it was. Apple should have used a faster variety of DRAM. in a separate block. directly connected to the CPU. so as to increase access speed to this oft consulted data.
</strong><hr></blockquote>
Um, where exactly on the G4 would you connect it to? There is no such facility, apart maybe from the L3 interface on the 745x chips (which can optionally be used as a private address space). Also, this would be one hell of an ugly hack, since if you really don't memory-map the ROM routines, they would be in a separate address space then, which would result in all sorts of problems (if you do memory-map them, you could just as well place them there in the first place).
Bye,
RazzFazz
<strong>
quote:
------------------------------------------------------------------------
Originally posted by Eric D.V.H:
It can't have been _that_ expensive. but even if it was. Apple should have used a faster variety of DRAM. in a separate block. directly connected to the CPU. so as to increase access speed to this oft consulted data.
------------------------------------------------------------------------
Um, where exactly on the G4 would you connect it to? There is no such facility, apart maybe from the L3 interface on the 745x chips (which can optionally be used as a private address space). Also, this would be one hell of an ugly hack, since if you really don't memory-map the ROM routines, they would be in a separate address space then, which would result in all sorts of problems (if you do memory-map them, you could just as well place them there in the first place).</strong><hr></blockquote>
The idea of doing anything special with the ROM is just not sensible. No external memory can be anything close to the performance of the L1/L2 onchip caches, and if there are frequently used pieces of code then that's where they'll end up. Even better the caches will make almost any memory much faster, not just the "ROM" code. Most (if not all) of the old "ROM" code is now unused under MacOSX anyhow.
Rather than wasting expensive memory on dedicated memory space for some now obsolete code, it would be much better to attach fast memory to a dedicated L3 cache interface... oh wait, they did that.
The MacOS ROM was useful and sensible when RAM was small, expensive, and not terribly fast (1985 - 1990), but since then has been making less and less sense. The iMac's radical departure of storing the former ROM code in a disk file was a huge step forward for the Macintosh.
<strong>btw, MS are a bunch of assholes:
The specs of their controller ports for the Xbox are USB, with higher voltage and a custom port shape...why? the PS2 has regular USB ports, thus you can connect whatever you want (theoretically).
Of course MS goes for a proprietary solution once again. Not that I care, since I'm never going to buy an Xbox, but still, it's very typical.
G-News
</strong><hr></blockquote>
sony is also begining to offer their own linux distro for the ps2
<strong>The specs of their controller ports for the Xbox are USB, with higher voltage and a custom port shape...</strong><hr></blockquote>
It would be pathetically easy to make an adapter.
Eric,
G-News
<strong>As I said, "ZIF socket" is what the socket 7 (actually all the current CPU sockets in x86 land) looks like (i.e. the white rectangle with pin holes and a lever on one side).</strong><hr></blockquote>
What I meant by "ZIF socket" is "Mechanically compatible with that socket used for the PPC 750's daughterboard in the Blue and White G3"
[quote]Originally posted by RazzFazz:
<strong>Yes, AFAIK Uni-N and KeyLargo are used exclusively by Apple (which kinda sucks for embedded manufacturers, since Uni-N is pretty much the best north bridge currently available for the PPC - actually, IIRC, it's the only one to even support MPX bus [Moto's own MPC10x chips don't!]).</strong><hr></blockquote>
Oh. okay then.
Eric,
<strong>It can't have been _that_ expensive. but even if it was. Apple should have used a faster variety of DRAM. in a separate block. directly connected to the CPU. so as to increase access speed to this oft consulted data.</strong><hr></blockquote>
Sorry. I meant "DROM".
[quote]Originally posted by RazzFazz:
<strong>Um, where exactly on the G4 would you connect it to? There is no such facility, apart maybe from the L3 interface on the 745x chips (which can optionally be used as a private address space). Also, this would be one hell of an ugly hack, since if you really don't memory-map the ROM routines, they would be in a separate address space then, which would result in all sorts of problems (if you do memory-map them, you could just as well place them there in the first place).</strong><hr></blockquote>
[quote]Originally posted by RazzFazz:
<strong>The idea of doing anything special with the ROM is just not sensible. No external memory can be anything close to the performance of the L1/L2 onchip caches, and if there are frequently used pieces of code then that's where they'll end up. Even better the caches will make almost any memory much faster, not just the "ROM" code. Most (if not all) of the old "ROM" code is now unused under MacOSX anyhow.
[QUOTE]Originally posted by RazzFazz:
[QB]Rather than wasting expensive memory on dedicated memory space for some now obsolete code,</strong><hr></blockquote>
Read only chips are just plain old cheaper. that's why they sometimes still ship console cartridge games without in-cart saves. using up expensive main DRAM for it is a waste of money. and having a direct channel for it would speed up access dramatically.
As for OS X. they should have put some of it's core routines into ROM. this would have sped things up a fair bit.
[quote]Originally posted by RazzFazz:
<strong>it would be much better to attach fast memory to a dedicated L3 cache interface... oh wait, they did that.</strong><hr></blockquote>
Argh! I have a special hatred of that. when I first read the "2MB DDR as L3 cache" thing on Apple's site. while expecting it to read something more like: "332Mhz DDR 5300 DRAM system bus" or "64-bit G5 enables full 64-bit A/V". it made me want to SCREAM.
After the wintel jerks taunting us for _years_ now about the speed of our RAM. and Met@Box putting 2MB of (Far quicker)SRAM backside cache on their <a href="http://www.everymac.com/upgrade_cards/metabox/joecard_g4/joecard_g4_450.html"; target="_blank">G4 cards</a>. Apple dares to taunt _us_. their loyal user base. by using it as L3 cache? that goes beyond stupid to just plain mean.
[quote]Originally posted by RazzFazz:
[QBThe MacOS ROM was useful and sensible when RAM was small, expensive, and not terribly fast (1985 - 1990), but since then has been making less and less sense. The iMac's radical departure of storing the former ROM code in a disk file was a huge step forward for the Macintosh.[/QB]<hr></blockquote>
This was just a cheap hack to make OS X(Which. I think at least. is also a cheap hack) work.
[RANT]In my personal opinion. OS X and every other form of UN*X should have been retired decades ago(Alongside DOS, MVS, VMS and their other CLI ilk). Apple should have bought Be(Or just treated them right before. when they were all in the Copland project programming team
Eric,
<strong>first, iirc all nforce boards have onboard video as well as an agp4x slot, my msi board does at the least.</strong><hr></blockquote>
That is <a href="http://www.nvidia.com/docs/lo/962/SUPP/NV_LC_02.05.02B.pdf"; target="_blank">correct</a>.
[quote]Originally posted by dartblazer:
<strong>second is it possible to have a hypertransport slot? would any devices be able to use the increased speed, is the pci bus close to being saturated now?</strong><hr></blockquote>
Yes, yes and yes. go back to <a href="http://forums.appleinsider.com/cgi-bin/ultimatebb.cgi?ubb=get_topic&f=1&t=001359&p=1"; target="_blank">page 1</a> and read my posts. particularly the start of the second one and the end of the one with (Black & white)pictures.
Eric,
[ 03-08-2002: Message edited by: Eric D.V.H ]
[ 03-08-2002: Message edited by: Eric D.V.H ]</p>
The Beige G3 series still have the 4MB ROM chip, and no HD ROM image and work officially with OS X. Thus the removal of the ROM is not a hack to make OS X work, but to move to the UMA artchitecture idea with OpenFirmware and all that stuff.
The first Macs to use the Apple ZIF socket was teh Beige G3 as well, and not the B&W G3.
Do you think taking ROM instead of loading it into the RAM would be cheaper? You name it yourself: "with an extra channel, this would be faster"...and you sure think that channel would be free, wouldn't require extra mobo engineering, PCB, copper lines etc etc. Since 10 years everything is moving away from ROM's (hard wired data) to other designs that allow for dynamic access and read/write as much as possible. It's no secret hwy Nintendo chose the ROM thing up to the N64...proprietary, 100% copy protected environment. See the gamecube for more on this idea translated into the DVD world. (Custom DVD of course).
Last but not least, the move from hardwired ROM to an OpenFirmware and HD code ROM enabled for Firmware upgrades, which have procen to be important maintenance products for Apple machiens since the iMac. Before that you had only the choice of upgrading the ROM chip, which, officially was never possible.
Enabling Master/Slave IDE channels on a Beige G3 Rev A (and along with that, CPU upgrade compatibility for G4 and copper chips) is only possible by buying a Rev.B or Rev.C ROM chip that only OWC ever sold at halfway reasonable prices, and are now harder to find than the egg of columbus. And you're seriously telling me, moving away from the ROM was bad??????
Maybe I missed somethign now, but that shall be enough for now.
G-News
Ah yeah on the DDR-SDRAM L3 cache thing:
I think, and others agree, that this is a mistake Apple made on the speccing. It's most certainly DDR-SRAM and not SDRAM, at least the machines before the 2002 QS had that, and that's likely better suited for caching and also faster.
Someone should open his DP1000 and make pictures of the L3 memory chips.
[ 03-08-2002: Message edited by: G-News ]</p>