Thoughts on IBM's future PowerPC plans
(or The Unofficial IBM PowerPC RoadMap)
If certain rumors hold true IBM seems to be planning a major PowerPC invasion into the lowend-midrange server and highend workstation segment, not to mention consumer and videogame markets. I read an article about IBMs efforts to consolidate server and mainframe, and to a certain extent, workstation lines into a core platform mainly using the POWER/PowerPC. They have laid the foundation on the high end; POWER roadmap. And they have hinted at future PowerPC derivatives based off those big iron processor. Here is a list of them with a brief description.
PowerPC 970: the best known with the most information. It is a 64bit chip based on the POWER4 with 512KB cache made on a 130nm process. 60X bus is substituted with a fast 450MHz DDR bus expected to provide up to 6.4GBps of bandwidth. Memory controller is off chip. Expected: 2H 03
PowerPC 970+: Functionally the same as the 970 but made on a 90nm process. Some minor changes and tweaks may be made to the processor like increased L2 cache and bug fixes, but it should be largely unchanged.Expected: 2Q 04
PowerPC 980 & 980+: these 2 processors will be derivative of the POWER5 and we have few details on the POWER5. Some of the major changes include SMT and improved bus, both of which should be transfered over to the 980. Maybe larger cache and extra execution units too. The 980 is to be made on 90nm while the 980+ is slated for 65nm. It will also include Altivec; improvements on VMX is unknown. It is still expected to be single core but this may change especially if the POWER5 is migrated to 4 cores when moved to the 65nm process, and the dual core version has been known as the 9800. Expected: 1Q 05, 980+, 2005-06
PowerPC 990: Based on the POWER6, very little is known about the POWER6 now. But a 990 derived processor should have SMT superior to what the 980 would have, dual core at least, made on 65nm process at first and an even more advanced bus. Also to be expected would be the second generation of IBM's implimentation of VMX. A 4 core maybe called the 9900. Expected: 2006+
IBM will also continue to develop the 750 series or processors. The following is speculation based on their own roadmaps and rumors about their future consumer plans. I think with a decent VMX implimentation they will eventually include this in the processors and dump the 60X bus altogether. Such drastic changes call for a new model designation that I will refer to as the 8XX series.
PowerPC 850: Based on an extended G3 core (750/740) that will probably increase the pipeline to 10 stages or so, it will have 512KB L2 cache, 32bit core, made on 130nm process, at least 36bit memory addressing,and include Altivec. The bus will be a RapidIO (probably 2 16bit ports) and have a built-in memory controller for DDR-SDRAM. This will limit it's usage with SMP but considering the target market, this is not much of an issue. Power consumption will be a major design point. Expected: 4Q 03
PowerPC 850+: Based off the 850, it would be made on the new 90nm process. No changes expected in the core but cache size may go up to 768KB or 1MB. Expected: 2Q 04
PowerPC 850CX: Based off the 850+ again. No changes expected in the core but if the industry switches to DDR-II the memeory controller should likewise switch. Also this would be the first consumer PowerPC to have SMT support. Later this processor would migrate to 65nm maybe known as the 850CX+. Expected: 1H 05
PowerPC 860: New consumer core with 16+ pipeline stages. Starts on the 90nm process migrating to 65nm later in the year. SMT, VMX-II, serial RapidIO based bus, perhaps some limited 64bit support. Expected: ~2005+
In conclusion, I think Apple is moving further from Motorola and closed to IBM. If IBM can satisfy all their needs (pro, portable, and consumer)
If certain rumors hold true IBM seems to be planning a major PowerPC invasion into the lowend-midrange server and highend workstation segment, not to mention consumer and videogame markets. I read an article about IBMs efforts to consolidate server and mainframe, and to a certain extent, workstation lines into a core platform mainly using the POWER/PowerPC. They have laid the foundation on the high end; POWER roadmap. And they have hinted at future PowerPC derivatives based off those big iron processor. Here is a list of them with a brief description.
PowerPC 970: the best known with the most information. It is a 64bit chip based on the POWER4 with 512KB cache made on a 130nm process. 60X bus is substituted with a fast 450MHz DDR bus expected to provide up to 6.4GBps of bandwidth. Memory controller is off chip. Expected: 2H 03
PowerPC 970+: Functionally the same as the 970 but made on a 90nm process. Some minor changes and tweaks may be made to the processor like increased L2 cache and bug fixes, but it should be largely unchanged.Expected: 2Q 04
PowerPC 980 & 980+: these 2 processors will be derivative of the POWER5 and we have few details on the POWER5. Some of the major changes include SMT and improved bus, both of which should be transfered over to the 980. Maybe larger cache and extra execution units too. The 980 is to be made on 90nm while the 980+ is slated for 65nm. It will also include Altivec; improvements on VMX is unknown. It is still expected to be single core but this may change especially if the POWER5 is migrated to 4 cores when moved to the 65nm process, and the dual core version has been known as the 9800. Expected: 1Q 05, 980+, 2005-06
PowerPC 990: Based on the POWER6, very little is known about the POWER6 now. But a 990 derived processor should have SMT superior to what the 980 would have, dual core at least, made on 65nm process at first and an even more advanced bus. Also to be expected would be the second generation of IBM's implimentation of VMX. A 4 core maybe called the 9900. Expected: 2006+
IBM will also continue to develop the 750 series or processors. The following is speculation based on their own roadmaps and rumors about their future consumer plans. I think with a decent VMX implimentation they will eventually include this in the processors and dump the 60X bus altogether. Such drastic changes call for a new model designation that I will refer to as the 8XX series.
PowerPC 850: Based on an extended G3 core (750/740) that will probably increase the pipeline to 10 stages or so, it will have 512KB L2 cache, 32bit core, made on 130nm process, at least 36bit memory addressing,and include Altivec. The bus will be a RapidIO (probably 2 16bit ports) and have a built-in memory controller for DDR-SDRAM. This will limit it's usage with SMP but considering the target market, this is not much of an issue. Power consumption will be a major design point. Expected: 4Q 03
PowerPC 850+: Based off the 850, it would be made on the new 90nm process. No changes expected in the core but cache size may go up to 768KB or 1MB. Expected: 2Q 04
PowerPC 850CX: Based off the 850+ again. No changes expected in the core but if the industry switches to DDR-II the memeory controller should likewise switch. Also this would be the first consumer PowerPC to have SMT support. Later this processor would migrate to 65nm maybe known as the 850CX+. Expected: 1H 05
PowerPC 860: New consumer core with 16+ pipeline stages. Starts on the 90nm process migrating to 65nm later in the year. SMT, VMX-II, serial RapidIO based bus, perhaps some limited 64bit support. Expected: ~2005+
In conclusion, I think Apple is moving further from Motorola and closed to IBM. If IBM can satisfy all their needs (pro, portable, and consumer)
Comments
PowerPC 980 & 980+: these 2 processors will be derivative of the POWER5 and we have few details on the POWER5. Some of the major changes include SMT and improved bus, both of which should be transfered over to the 980. Maybe larger cache and extra execution units too. The 980 is to be made on 90nm while the 980+ is slated for 65nm. It will also include Altivec; improvements on VMX is unknown. It is still expected to be single core but this may change especially if the POWER5 is migrated to 4 cores when moved to the 65nm process, and the dual core version has been known as the 9800. Expected: 1Q 05, 980+, 2005-06
Really hoping the 980 hits as a Dual Core. But if we have to wait for 2006 then that's not so bad either.
IBM PPC 8XX would be interesting indeed. I'm assuming this would be fairly low power and suitale for STB, Portables etc.
Originally posted by hmurchison
Really hoping the 980 hits as a Dual Core. But if we have to wait for 2006 then that's not so bad either.
IBM PPC 8XX would be interesting indeed. I'm assuming this would be fairly low power and suitale for STB, Portables etc.
Exactly, IBM's roadmap clearly shows the 750 incorprating RIO and a memory controller. Basically a beefed up SOC similar to the 440GP and 440GX. but where the the 440 is ill suited for consumer and portable computer systems the "8XX series" will be well suited.
Originally posted by Bigc
Where does the IBM cell technology fit into this?
I think it'll be a new series of processors beyond PowerPC but introduced alongside normal PowerPC and POWER processors. i don't know much about it, but I expect them to be at first very specialized; I know Sony will be using one for the PS3 and maybe IBM will have some for the high end. But you bring up a good point Bigc. In 5 years i envision Apple would use a processor with a 4x4 matrix (16 cores total) of mini cores each made up of a single integer unit, an fp unit and an vector unit, all connected via a wide and fast bus running at core speed. By then, many things will be built into the CPU, like memory controller(s), fast external buses, PCI-Express controllers, etc.
In fact there will be less need for expansion slots in the computer as computing power increases. My vision of the future of workstations and consumer computing is, ironically, like that of present day Intel. You know how Intel developed USB and IDE and made them dependant on the main CPU instead of dedicated controllers? I think in the future that idea will be extended further into emulating hardware and expansion cards. You will need high speed FPGA chips and smaller ports on the motherboard for the external interface. Need the lastest audio card? you buy the 'firmware' and external interface card that can simply be slid in the back while the computer is on, and load the firmware into the FPGA via the OS. The interface card is simply a small PCB with the appropriate ports soldered on (in this case audio jacks) and would be easy and inexpensive to make. All the rest would be hardware emulated in the cell processor and FPGA. No limits of PCI-Express.
As RAM gets cheaper to make, it may come to a point that RAM is packeages on a BGA chip like processors now are, especially is we can get 1 transistor SRAM to a price point that can make this feasable. The RAM would run at 1GHZ DDR or QDR at 128 bits rather than the present 166MHz DDR at 64bits we have now. Installation would be as easy as popping in a ZIF socket processor now. Most likely it would come with its own attached heatsink if necessary.
Just some musings...
I would not doubt if Apples dumps Moto totally.
Originally posted by Outsider
As RAM gets cheaper to make, it may come to a point that RAM is packeages on a BGA chip like processors now are, especially is we can get 1 transistor SRAM to a price point that can make this feasable. The RAM would run at 1GHZ DDR or QDR at 128 bits rather than the present 166MHz DDR at 64bits we have now. Installation would be as easy as popping in a ZIF socket processor now. Most likely it would come with its own attached heatsink if necessary.
Just some musings...
That would take up a lot of space on the motherboard, unless you only wanted to be able to have one RAM chip installed at a time.
The future is looking to be a Muli proc and threaded one and the more you have your Developers supporting this feature now the more mature your apps will be once I have my Dual Dual Core running 2 threads per processor. Who wouldn't like the Virtual equivalent of an 8 Way computer?
Speaking of that memory idea. Why is it that memory modules must be aligned the way they are. With your idea I could forsee more densely packaged memory modules but obviously there's something limiting this capability.
Originally posted by hmurchison
Speaking of that memory idea. Why is it that memory modules must be aligned the way they are. With your idea I could forsee more densely packaged memory modules but obviously there's something limiting this capability.
yeah mostly cost issues. The GameCube used 1T-SRAM (1T=one transistor). SRAM (the stuff L2/3 cache is made of) usually takes up 5-6 transistors per bit, while DRAM that needs to be constantly charged only takes 1 per bit. 1T-SRAM solved this but is still pricey. But as we move to smaller and smaller processes this makes more sense to use this 1T-SRAM. You can pack more and more memory into a smaller space.
And to address another concern above, a 300 pin ZIF socket would not take up much space on a motherboard. You would be able to have 2 or even 4, not taking up much room. Or some other kind of slot, it doesn't have to be a LIF or ZIF socket.
Originally posted by Programmer
Another interesting development will be embedded RAM -- i.e. the RAM and the processor on the same chip.
That would be great for reducing latency, but I've never quite understood how one would add RAM in such a setup. Are there new ideas in this area?
Why we had to get to a point were our PMacs are positively ridiculed (Lets not get into a debate about a DP1.42 vs DP 2.8G Athlon's and the like, because I think the G4 for only certain Altivec functions can it compete, and Apple's Pmac sales reflect this), when these processors can be produced?, I know its simple MOTO stuffed up and IBM is left to pick up the pieces.
Apple WILL seriously do huge things with the 970 & OS 10.3 (64bit)!. The [email protected], which is much faster than a 1GHz G4 draws just 19W, the G4 30W. I seriuosly expect to see these processors in PowerBooks as well later this year (September is my best guess), Pmacs will hog the spotlight in July.
My understanding is also that Apple indeed has 970's already working on NEW motherboards, really, between now and July (5months), will be new case design (Jonathan's job), 970 and Mboard production - is due to start no later than April, OS 10.3 will be ready in time (Avie's job).
And then the marketing spin on how much better 64bit computing is over ancient 32bit!. Anyway, Im going to hang on to my Ti Powerbook until the PB970 later this year!, my own personal request, ok.
Finally, something good came out of this sorry affair - Apple's pricing on its Pmac range is not too bad, with 970's they will fly off the production line.javascript:smilie('
Welcome to Appleinsider! I agree with U lots to look forward to.
I dunno about the 970 in a PB yet. If these MB are as large as they say Apple may have to wait for revision 2 before getting it small enough for PBs.
Embedded DRAM. I like that idea. Infineon is a big proponent of EDRAM. I hear that it offers tremendous bandwith. Perhaps when ATI and Nvidia are fabbiing at .09um for GPU's they'll be able to consider some EDRAM.
Originally posted by Whisper
That would be great for reducing latency, but I've never quite understood how one would add RAM in such a setup. Are there new ideas in this area?
Either you don't, or you add 2nd tier RAM (i.e. slower stuff which you virtual memory page to/from), or you add processors like you currently add RAM.
Originally posted by Programmer
Either you don't, or you add 2nd tier RAM (i.e. slower stuff which you virtual memory page to/from), or you add processors like you currently add RAM.
Now that would be a trip.
I suppose if you had a dual-core CPU design you could set it up so that either core could be a CPU or a block of RAM with an interface. Then you could add a dual-core CPU module, or a CPU/RAM module, or a dual-RAM module, until you maxed out the number of sockets/daughtercard slots.
If you used daughtercards, then each module could have its own local RAM cache for paging.
Hmmm.
Originally posted by Amorph
Now that would be a trip.
I suppose if you had a dual-core CPU design you could set it up so that either core could be a CPU or a block of RAM with an interface. Then you could add a dual-core CPU module, or a CPU/RAM module, or a dual-RAM module, until you maxed out the number of sockets/daughtercard slots.
If you used daughtercards, then each module could have its own local RAM cache for paging.
Hmmm.
In the future there is probably going to be less emphasis on the processor and less of a distinction between processors and memory. This is a big part of what the 'cell' architecture is supposed to be about -- what do they do when they can put a billion transistors on a chip and make it cheap? Increasing processor complexity just doesn't pay off, and its not clear if we'll see cores with >100 million transistors in commodity devices. It makes a lot of sense, however, to put a bunch of cores plus a large amount of very fast memory on a die and then start linking them together with things like RapidIO. Now you can start to imagine things about the size of DIMMs or CompactFlash devices which are a single chip that is (for example) 4 cores + 256 MB of RAM, and when you plug it into your motherboard's RIO bus it just joins the machine's NUMA space. There is no reason these can't be PowerPC cores, either. Operating systems will need to evolve to deal with this, but MacOS X is pretty well placed for it. This is the kind of thing that PS3 might turn out to be (albeit an early version).
Either way it would seem to mean that the normal progression where a chip goes from the high end to the consumer end would be no more. It would mean that each family would have its own future roadmap.
That would seem like a big change for Apple. It would make things very interesting.
Hasapi,
Welcome to Appleinsider! I agree with U lots to look forward to.
I dunno about the 970 in a PB yet. If these MB are as large as they say Apple may have to wait for revision 2 before getting it small enough for PBs.
Thanks, the die size on the 970 is just 14% larger - Im not convinced this would be the defining restriction to using this chip in the powerbook?.
It will need a completely new motherboard to support its 900MHz DDR bus, RAM, I/O. But with its power dissipation @ 19W - the trade off would be a faster PowerBook with more battery life.
But, I will not be surprised to see this product @ MWSF in January (the latest?) JMHO.
Hasapi
Originally posted by Programmer
Now you can start to imagine things about the size of DIMMs or CompactFlash devices which are a single chip that is (for example) 4 cores + 256 MB of RAM, and when you plug it into your motherboard's RIO bus it just joins the machine's NUMA space. .
Where's a good place to learn more about NUMA and how it might migrate down to the desktop?
Originally posted by anand
I would not doubt if Apples dumps Moto totally.
Moto who??