The G5 and what it means for future Macs
Work on the G5 (MPC7500) is progressing nicely at Motorola and I can only assume Apple had a role in the development as there are many features included that are condusive to a top-notch desktop processor capable of bring the PowerMac into the 21st centure as a real performer in the compute intensive field.
A recent development box has allowed us to open and examine some details that appeal to us as engineers and hardware designers. One of the machines is built in a G4 case with a smaller motherboard. the interesting part is that the motherboard is a cheaper 4 layer variety while the CPU daughter card is made on a more expensive 8 layer board. the reason for this is very simple and I will get to that in a moment. The CPU card itself is similar in shape and pin connector to the one used in modern G4s but is a bit larger in surface area. The reason for this is the fact that the G5 CPU has a built-in memory controller that interacts with high-speed DDR-SDRAM. This RAM runs at 133MHz DDR but the G5 documentation we have (preliminary) states that 166MHz DDR (333MHz effective) is supported. To run at these fast speeds you must utilize 2 dimensional PCB space efficiently. Apple has done this well. On the CPU daughter card you will find 3 slots for DDR-SDRAM DIMMS. They are distanced from the actual CPU core to allow for the heatsink placement, but in this configuration (since on the card the CPU is hard soldered to the PCB) you can design DIMM slots that can operate at 133, 166, and quite possibly 200MHz at DDR speeds. In fact, I believe the impedence should be low enough to allow for 4 DIMM slots. No L3 RAM is located on the card although it is fully supported under the documentation.
RapidIO is used to connect the CPU to a centralized controller that controls peripherals such as gigabit ethernet, Firewire, USB, ATA interface, audio input/output, AGP/PCI bridge, etc. The RapidIO interface operates in a 16 bit full duplex mode running at 500MHz. This bus is seperate from the memory bus and therefore asyncronous. It does not share the bus either like with the G4 and MPX. PCI-X seems to be implimented fully (it's backwards compatible with PCI 32/64) and AGP remains operating at 4X speeds.
A whole new paradigm in PowerMac design will be introduced soon and it will be a modern example in smart computer design, taking advantage of new trechnologies and foward thinking design. These are late beta machines and the finishing touches are being applied to cut out the rough edges for consumer consumption.
A recent development box has allowed us to open and examine some details that appeal to us as engineers and hardware designers. One of the machines is built in a G4 case with a smaller motherboard. the interesting part is that the motherboard is a cheaper 4 layer variety while the CPU daughter card is made on a more expensive 8 layer board. the reason for this is very simple and I will get to that in a moment. The CPU card itself is similar in shape and pin connector to the one used in modern G4s but is a bit larger in surface area. The reason for this is the fact that the G5 CPU has a built-in memory controller that interacts with high-speed DDR-SDRAM. This RAM runs at 133MHz DDR but the G5 documentation we have (preliminary) states that 166MHz DDR (333MHz effective) is supported. To run at these fast speeds you must utilize 2 dimensional PCB space efficiently. Apple has done this well. On the CPU daughter card you will find 3 slots for DDR-SDRAM DIMMS. They are distanced from the actual CPU core to allow for the heatsink placement, but in this configuration (since on the card the CPU is hard soldered to the PCB) you can design DIMM slots that can operate at 133, 166, and quite possibly 200MHz at DDR speeds. In fact, I believe the impedence should be low enough to allow for 4 DIMM slots. No L3 RAM is located on the card although it is fully supported under the documentation.
RapidIO is used to connect the CPU to a centralized controller that controls peripherals such as gigabit ethernet, Firewire, USB, ATA interface, audio input/output, AGP/PCI bridge, etc. The RapidIO interface operates in a 16 bit full duplex mode running at 500MHz. This bus is seperate from the memory bus and therefore asyncronous. It does not share the bus either like with the G4 and MPX. PCI-X seems to be implimented fully (it's backwards compatible with PCI 32/64) and AGP remains operating at 4X speeds.
A whole new paradigm in PowerMac design will be introduced soon and it will be a modern example in smart computer design, taking advantage of new trechnologies and foward thinking design. These are late beta machines and the finishing touches are being applied to cut out the rough edges for consumer consumption.
Comments
ready, set, go!
Two questions:
1) Does it seem likely to you that they will be ready for MWNY? I know you wouldn't know any exact release dates, but based on your experience with it does "late beta" probably mean "ready to ship by July"?
2) Any clues about the final case design? You mentioned a smaller motherboard, but anything about PCI slots, drive bays, overally appearance, or other details?
Thanks for the info. It's been a long time since we've heard anything on this front.
yeah, what about the case design other than the fact that the designers worked hard on it? spill it buddy....
<strong>He said they are using the old G4 case to house the innards.</strong><hr></blockquote>
all he said was "one of"
No information about 64 bit though?
OK, JYD bring it on as to why we shouldn't listen to this latest one...
[ 03-19-2002: Message edited by: DaveLee ]</p>
<strong>umm, this guy's predictions for mwsf were total shite guys... dorsal has no more credibility.</strong><hr></blockquote>
Gee, that didn't take long.
Dorsal didn't make any freakin' predictions. He's not in any position to predict what products Apple is going to release and he's never claimed to be. He simply reports what he's seen (or claims to have seen, for you skeptics) in his capacity as an engineer. If he hazards the occasional guess as to when a certain technology could ship, that's all it is -- a guess. This ain't brain surgery, people.
People get such a hardon over this stuff, as though they're absolutely determined to show off how savvy they are and how they refuse to be fooled by anyone. Good for you. Now go read something else.
but he did not say :
what is the ata bus : ata 66, 100 , 133 or serial ata ?
amount of L2 cache of the 7500 : 256 KByte or 512 KByte ?
Firewire first generation or firewire second generation
USB or USB 2.
What video card did he see in it ...
If you where able Dorsal M to see that rapid I/O and PCI X was implemanted you will be able to answers at these questions (perhaps not the size of the L2 cache)
And why should I believe somebody who thinks they are a naked mole rat???
<strong>Now what is the record number of posts to a thread?</strong><hr></blockquote>
It's more than 1000, but it was a game, Jonathan finish to close it, before the AI server explode
I doubt that this thread will reach the record, since there is too many differents threads dealing with the G5 , however Mac World Tokyo is very near, so perhaps we can have some subject to deal here on AI.
[ 03-19-2002: Message edited by: powerdoc ]</p>
<strong>Mot doesn't call anything the 8500. They have an announced chip called the 8540 jammed packed with embedded features. They took 7500 off the roadmap. To me this either means the G5 used by Apple will indeed be a 85XX or that the 7500 (the original name) will be an Apple specific part number that will not be available for outside buyers. Therefore no reason to include it on a roadmap.</strong><hr></blockquote>
Sounds reasonable given that apple was looking to hire PPC engineers 1 1/2 years ago.
<strong>Mot doesn't call anything the 8500. They have an announced chip called the 8540 jammed packed with embedded features. They took 7500 off the roadmap. To me this either means the G5 used by Apple will indeed be a 85XX or that the 7500 (the original name) will be an Apple specific part number that will not be available for outside buyers. Therefore no reason to include it on a roadmap.</strong><hr></blockquote>
unless he's making an assumption about who made the chips, i believe he's wrong. motorola isn't making the g5 for apple. although the timing seems about right, just not the source of the chip.
".... or that the 7500 (the original name) will be an Apple specific part number that will not be available for outside buyers."
That would sure put a crimp in the processor upgrade market