[quote]Talking about future hardware developments and the inclusion of AMD, this came out about a year and half ago, a joint venture by AMD and Motorola, developing a new chip architecture. The joint venture is still going on but is in the process of ending. <hr></blockquote>
That alliance dealt with process technology, not architecture or chip design. Only the manufacturing know how to produce the chips was co-developed.
I say Apple buys Moto's PPC division, fires all the engineers, liquidates all the equipment and fabs, and exiles all the executives to some ass-freezing antarctic island.
Then Apple should look for someone to design a REAL G5!
[quote]Yes, after staying stagnant at 500MHz for over 18 months. So when you look at their progress slightly more long term not quite so impressive.<hr></blockquote>
That's irrelevant, and completely misses the point, which was to concentrate on Moto's performance in the immediate past. In the past eighteen months, Moto has done an impressive job moving the G4 forward.
Think about it. What's more relevant to Moto's performance today-- their performance in the past 18 months, or their performance 36-18 months ago?
[quote]1) IBM is moving some functions into hardware in the next rev of Power<hr></blockquote>
Uh, I don't understand. What IBM does with Power won't necessarily trickle down to PPC, and if it does, it's still several years off (we've yet to see anything from Power4 find it's way into a PPC... or have we?)
Otherwise, this is news to me. What kind of stuff is IBM looking to handle in hardware (I assume you mean in the chipset, or something?)
[quote]2) Don't forget, IBM just went through a painful architectural jump + process leap. They'll catch up. [/quote}
Actually, I didn't know that. My point was, IBM doesn't seem to want to compete for the top spot peformance wise with the PPC. They seem content just with it being a low power embedded chip.
In some ways, IBM has surpassed Moto (they've gotten the 60x bus on the 750FX up to 200MHz). Unfortunately, I just don't think they're interested in building top-of-the-line chips for Apple.
<strong>Actually, I didn't know that. My point was, IBM doesn't seem to want to compete for the top spot peformance wise with the PPC. They seem content just with it being a low power embedded chip.</strong><hr></blockquote>
I'm not sure what you mean. The POWER4 is currently the fastest chip you can buy... faster than SPARC, faster than a 2.2ghz Pentium IV... see here for details:
<strong>In the past eighteen months, Moto has done an impressive job moving the G4 forward.</strong><hr></blockquote>
From 466(actually 500 since it came out even earlier, and guess what, 500 MHz was the speed at which the G4 was first introduced in 1999, and that's kinda even more than 18 months)-733 to 933-1000? Wow, that's "impressing"... Apple did the most with the new mobo, and thank nVIDIA they were there willing and able to provide Apple GF3 cards customized for their needs... That's what kept Apple afloat, certainly not Moto's "impressive" ability in moving the G4 forward...
Next what, are we gonna start defending Moto for the 500+/- MHz fiasco simply because they sell their CPUs to Apple? No, they fscked everything up, and I'm bloody well glad they're paying for their mistakes (their semicondutor unit hasn't exactly been churning big profits for the past year or so--try to guess why?)
I try to say it once again, IBM did a far better job. They received an order from Apple. They met Apple's expectations (actually exceeded in terms of MHZ comparing to the "pro" line). If the iBook has been possible it is only because of IBM. Were it for Moto it'd have already gone the Cube way--maybe not even that far... [ie: that design wouldn't have been possible without an IBM G3--and the same is true for the old fanless iMac design, which kept Apple afloat for a while]
So, again, in which way could an Apple-designed and IBM-fabbed PPC CPU be bad for Apple? <img src="graemlins/oyvey.gif" border="0" alt="[No]" />
[quote]Jason Waxman, Intel's enterprise platforms marketing manager, conceded that IBM's Power 4 platform may be able to generate more competitive results, but at a higher cost than either the Intel or Sun platforms.<hr></blockquote>
[quote]Uh, I don't understand. What IBM does with Power won't necessarily trickle down to PPC, and if it does, it's still several years off (we've yet to see anything from Power4 find it's way into a PPC... or have we?)<hr></blockquote>
Granted, but the salient point here is that IBM has sensibly moved away from the pure-RISC philosphy.
[quote]
Otherwise, this is news to me. What kind of stuff is IBM looking to handle in hardware (I assume you mean in the chipset, or something?)<hr></blockquote>
IIRC, it had something to do with speeding up network transactions...its called FastTrack (IIRC) and its planned to ba part of the POWER5 processor.
Anyways, you must know something moki, because you are taunting us just like you did six months ago when you were tipping us about your software being bundled with the Powermacs...
The 500MHz debacle was Mot fabbing a new, flawed design on a brand new process. That will kill anyone for 18 months. After Mot designed around it, they picked up doing exactly what the G4 was supposed to do, according to an article I read sometime in '97 or so: Go through a rapid series of refinements, each one pushing performance up another notch. And the results are what we've seen in the last 18 months or so. I see no signs of Mot slowing down. If Mot brass is actually stupid enough to sell SPS, it'll be snapped up quick. The talent is there, the fab tech is there, they just need money and disciplined management.
1. Does L3 cache have a special benefit for the PowerPC architecture? The current G4s are using it and the oft-mentioned Power4 is using it (something like 32 meg). AMD used it briefly on the K-6III and then abandoned it (as I recall it made a definite improvement over the K-6II). Neither AMD or intel use it currently, id it too costly or is it not effective above a certain processor or memory performance level?
2. I know video cards are using 600 Mhz plus DDR memory, and I read somewhere that supposedly the top of the line next generation nVidia board will use 1 Ghz memory. Would such high clocked DDR work for L3 cache?
Regarding an on-chip memory controller I saw this discussion of the coming AMD Hammer (which has an integrated memory controller) and it made me wonder about the correlation between the rumored on chip memory controller on the G5 and Apple's recently acquired high end video apps :
[quote] The memory controller is the weight in Hammer's head The bulk of improved
performance comes from the integrated memory controller. It takes less time getting data out of main memory than more conventional approaches.
This is very good, provided what you're using has to go to main memory all the time. However, CPUs (and many applications) are designed so that you
don't have to go to main memory all the time. That's why you see those funny words attached to CPUs like prefetching and trace caching.
Ideally, a CPU should never have to make a request to main memory for something. Ideally, anything it wants should already be waiting for it
inside the L1/L2 caches, which are much, much faster than anything in memory, and are right there, rather than be a horrible couple hundred
nanoseconds away.
When that's possible, programmers try to do that: write to keep most of the action in the caches. Where they've succeeded, the memory controller in
Hammer won't be much help, since it won't be used so much.
There are situations where it's impossible to keep all the action in the caches; you have to go to main memory all the time. This is where the memory
controller will really shine.
So when we see benchmarking of the final product, vis-a-vis the Athlon XP,you'll probably see rather lopsided results. Benchmarks of items like office applications probably won't improve much at all, while audio and video editing should show stellar improvements (improved yet more by the inclusion of SSE2 capability). <hr></blockquote>
1. Does L3 cache have a special benefit for the PowerPC architecture? The current G4s are using it and the oft-mentioned Power4 is using it (something like 32 meg). AMD used it briefly on the K-6III and then abandoned it (as I recall it made a definite improvement over the K-6II). Neither AMD or intel use it currently, id it too costly or is it not effective above a certain processor or memory performance level?
</strong><hr></blockquote>
No... L3 is useful if your processor is much faster than the available memory bandwidth. Intel/AMD currently have fairly fast memory subsystems so the expense of an L3 isn't worth it. An on-chip memory controller is going to make this even more true. Apple is using big and fast L3 because their bus is stuck at 1 GB/sec. POWER4 uses a huge L3 because it is really really really damn fast, and even its impressive 500 MHz bus can't keep it fed.
[quote]<strong>
2. I know video cards are using 600 Mhz plus DDR memory, and I read somewhere that supposedly the top of the line next generation nVidia board will use 1 Ghz memory. Would such high clocked DDR work for L3 cache?
</strong><hr></blockquote>
Possibly, although caches usually use static RAM due to its lower latencies. It would be nice if main memory could use that fast DDR, but it needs to be kept too close to the processor and the tolerances are too tight for it to not be soldered to the main board. Ah well, DDR-II is on the way (late next year, perhaps).
[quote]<strong>
Regarding an on-chip memory controller I saw this discussion of the coming AMD Hammer (which has an integrated memory controller) and it made me wonder about the correlation between the rumored on chip memory controller on the G5 and Apple's recently acquired high end video apps :</strong><hr></blockquote>
The quote is true, but as processors and memory get faster newer classes of applications become possible, and larger and larger data sets get pushed around. There are lots of things programmers don't even try because the memory is too slow or the caches too small.
I'm not sure what you mean. The POWER4 is currently the fastest chip you can buy... faster than SPARC, faster than a 2.2ghz Pentium IV... see here for details:
The Power4 is irrelevant to Apple. It is not a consumer desktop CPU. It's like comparing the performance of the original Mac to a Cray supercomputer...one can be bought by a middle class family and used in the study, the other cannot.
Unless you know something about a variant of the Power4 that the rest of us do not?
I'm not sure what you mean. The POWER4 is currently the fastest chip you can buy... faster than SPARC, faster than a 2.2ghz Pentium IV... see here for details:
It's been pointed out on other message boards that the SPEC results for the POWER4 are slightly misleading as it shows the score of a single core running at a higher speed than IBM seems able to operate in dual core mode. And that single core is using the entire 128MB of L3 cache normally reserved for a whole processor module unit. A very fast part to be sure but when a processor such as a P4 comes so close to matching it in int performance at a cost orders of magnitude less one has to wonder. Of course IBM has the scalability of producting very large arrays of their processors. But as another poster said, very little relevance to desktop computer market.
Edit: Actually i was just going through some of the latest SPEC results and the new 2.53GHz P4 is much more competitive with the Power4, surpassing it on SPECINT.
[code]
P4: INT base/peak FP base/peak
882/896 861/873
POWER4: 804/839 1202/1266
</pre><hr></blockquote>
As Intel scales to 3GHz by the end of this year those numbers will start to look even poorer for IBM who probally won't be able to scale their design much.
If Mot brass is actually stupid enough to sell SPS, it'll be snapped up quick. <hr></blockquote>
Oh the Moto brass is stupid, no question about that. To me the question is whether they are smart enough to sell of their SPS unit to save it from the rest of Moto and its management. Sadly Agere wasn't spun off from Lucent soon enough to save it from Lucent's mistakes, I would hope Moto's SPS wouldn't have to suffer the same fate.
[quote] The talent is there, the fab tech is there, they just need money and disciplined management.<hr></blockquote>
A lot of the talent has been laid off, the fabs aren't doing that hot with Moto slashing their cap ex to a measly 250 million this year from well over a billion previously. Everyone but TSMC and AMD cut back this year but the levels Moto has cut will only poison their future capabilites. But since they have indicated they want to abandon their US based fabs and move to China that might be ok.
[quote] Sony together with its Sony Computer Entertainment Inc. (SCEI), IBM, and Toshiba announced the joint efforts for the industry implementation of 0.09-0.045-micron technical processes on 300-mm silicon wafers. Like in the most cases companies do not plan to build joint facilities, each of them is going to implement the joint developments on its own fabs.
IBM is going to launch its 0.09-micron chip factory on 300-mm wafers in the end of 2002. I presume the first products to be chips developed for IBM's Cell project ("supercomputer-on-a-chip"). The transition to 65 nm and 45 nm is to happen in 2004 and 2006, respectively.
Sony is going to use the IBM's "Cell" architecture in its PlayStation 3 console, that's to be released next year.
In general the R&D partnership program looks considered enough: IBM is going to pass its SOI developments to the Japanese Sony and Toshiba. The group of scientists and engineers from IBM, Sony, and Toshiba will be developing SOI and other technologies in the IBM Semiconductor Research and Development Center (SRDC). According to the preliminary plan, the companies are going to spend several hundreds million dollars for this program during four years.
[quote] Sony, Toshiba and IBM are to co-operate on what they're calling a "supercomputer on a chip" and which to us sounds like the successor to the Emotion Engine processor currently driving the PlayStation 2.
Codenamed Cell, the new chip will form the basis of a massive $400 million, five-year R&D project. The goal of that research: to create a chip that not only goes like the proverbial off a shovel, but is designed specifically for high speed networks - and multi-processing across them.
Cell will utilise IBM's most up-to-date processor technologies - "copper wires, silicon-on-insulator transistors and low-K dielectric insulation" - all done at 0.1 micron (and probably a lot smaller by the time the thing ships) and fabbed on 12in wafers. It will "deliver teraflops of processing power". A 'flop' is a floating-point maths operation, and one teraflop is one thousand billion flops.
The trio haven't said much more about the chip, other than the tangential references to supercomputer performance and enabling the chip for a world of ubiquitous broadband Net connections. Ultimately, the part will power a wide range of consumer devices.
All that suggests we're looking at a general purpose microprocessor running at high speeds, enabled to process high throughput data streams coming in from all these wide, fast pipelines the partners expect devices containing Cell to be connected to. It's also expected to be a low-power processor. All that sounds like a cross between Emotion Engine, PowerPC and DSPs.
There's an irony here in that IBM fell out with its PowerPC partner Motorola when the latter developed the AltiVec vector processing system to allow the PowerPC to operate as a kind of programmable DSP. That's no use to us, complained IBM, and the two promptly parted ways.
IBM has clearly changed its mind about this kind of thing. It's certainly churning out Motorola-designed AltiVec-enabled PowerPC 7410 CPUs (aka G4) for Apple, and it may also have licensed AltiVec for the PowerPC-based processor it designed for Nintendo's GameCube console, which is due to ship later this year. And given Cell's emphasis on processing broadband-delivered multimedia data, it's not hard to imagine that IBM is working on something very similar to AltiVec for the new chip.
The chip's codename also gives a clue to its functionality. Said Ken Kutaragi, head of Sony's Computer Entertainment division: "With built-in broadband connectivity, microprocessors that currently exist as individual islands will be more closely linked, making a network of systems act more as one, unified 'supersystem'. Just as biological cells in the body unite to form complete physical systems, Cell-based electronic products of all types will form the building blocks of larger systems."
That suggests that multi-processing support is being designed into Cell from day one, doing all sorts of clever stuff like reading any chip's data and instruction caches, NUMA-style - a feature already on Motorola's PowerPC roadmap. And IBM has a keen interest in NUMA, thanks to its purchase of Sequent.
Sony is going to use the Cell processor in its Playstation 3 console, slated for a release in 2004 or 2005. But as the initial value of the agreement between IBM, Sony and Toshiba has been projected to be between $2 and $ 4 billion, the three companies clearly have other uses for the processor in mind. Designed to process information at supercomputer speeds and handle broadband communications, Cell could be used in multimedia computers and enterprise environments as well. <hr></blockquote>
Sony and Toshiba are expanding an alliance with IBM that will give the companies access to its chip breakthroughs while making the tech giant more of a player in the burgeoning market for consumer electronics.
Under terms of the alliance, announced late Monday, Sony and Toshiba will be able to incorporate some of IBM's chip-making advances, such as Silicon on Insulator, into future processors for consumer-electronic devices. As a result, IBM's chips and intellectual property could wind up in products such as camcorders and PlayStation gaming consoles.
.......
"We're really gunning for MIPS (a processor architecture) and leaning on Motorola," said Ron Tessitore, vice president of PowerPC networking technology at IBM.
........
The three companies have already said they will collaborate on a future processor architecture, called the Cell architecture, that some analysts speculate will end up in the PlayStation 3. The Cell architecture is expected to be able to enhance the performance of peer-to-peer computing and will be based, in part, on the existing PowerPC architecture, analysts say.
Although he declined to discuss specifics, Bijan Davari, vice president of semiconductor development at IBM Microelectronics, said Cell chips would be "optimized for high-speed video as well as various other communication to the Internet."
"It's a unique alliance in that it brings the most advanced technology user together with the most advanced technology manufacturer," he added.
While the companies would not elaborate on whether Sony would adopt the PowerPC architecture, IBM is clearly interested in seeing its technology spread. IBM will offer higher performance processors and be "more liberal with licensing PowerPC cores," Tessitore said.
Analysts believe the agreement marks a change in philosophy, whereby IBM will license both its chip technology and its manufacturing, allowing clients to mix and match to create custom chips. Currently, IBM licenses the technology and manufactures the chips for clients such as Apple Computer and Nintendo.
"What's very different here...is this is the first time that a (customer) is getting a chance to change the cookie dough," said Rick Doherty, director of research for the Envisioneering Group. This is "the first time anyone has been allowed to change the recipe."
SO IBM does appear to be willing to allow big customers to roll their own variations of CPU designs?
Of course no one knows what will really happen but IBM is developing new tech and is willing to get away from a "one size fits all" approach to processor design. I'd take 2-8 fast cheap low power processors in a box with the right architecture to keep them fed over another incremental bump?
I often hear comments like this; unsupported by logic. Intel isn't "into" Macs? As in, if they had an opportunity to sell another five million Pentium processors annually, they'd say, sorry Apple - no soup for you? <img src="graemlins/hmmm.gif" border="0" alt="[Hmmm]" />
Comments
That alliance dealt with process technology, not architecture or chip design. Only the manufacturing know how to produce the chips was co-developed.
Then Apple should look for someone to design a REAL G5!
That's irrelevant, and completely misses the point, which was to concentrate on Moto's performance in the immediate past. In the past eighteen months, Moto has done an impressive job moving the G4 forward.
Think about it. What's more relevant to Moto's performance today-- their performance in the past 18 months, or their performance 36-18 months ago?
Uh, I don't understand. What IBM does with Power won't necessarily trickle down to PPC, and if it does, it's still several years off (we've yet to see anything from Power4 find it's way into a PPC... or have we?)
Otherwise, this is news to me. What kind of stuff is IBM looking to handle in hardware (I assume you mean in the chipset, or something?)
[quote]2) Don't forget, IBM just went through a painful architectural jump + process leap. They'll catch up. [/quote}
Actually, I didn't know that. My point was, IBM doesn't seem to want to compete for the top spot peformance wise with the PPC. They seem content just with it being a low power embedded chip.
In some ways, IBM has surpassed Moto (they've gotten the 60x bus on the 750FX up to 200MHz). Unfortunately, I just don't think they're interested in building top-of-the-line chips for Apple.
<strong>Actually, I didn't know that. My point was, IBM doesn't seem to want to compete for the top spot peformance wise with the PPC. They seem content just with it being a low power embedded chip.</strong><hr></blockquote>
I'm not sure what you mean. The POWER4 is currently the fastest chip you can buy... faster than SPARC, faster than a 2.2ghz Pentium IV... see here for details:
<a href="http://www.AmbrosiaSW.com/webboard/Forum64/HTML/000150.html"; target="_blank">http://www.AmbrosiaSW.com/webboard/Forum64/HTML/000150.html</a>;
<strong>In the past eighteen months, Moto has done an impressive job moving the G4 forward.</strong><hr></blockquote>
From 466(actually 500 since it came out even earlier, and guess what, 500 MHz was the speed at which the G4 was first introduced in 1999, and that's kinda even more than 18 months)-733 to 933-1000? Wow, that's "impressing"... Apple did the most with the new mobo, and thank nVIDIA they were there willing and able to provide Apple GF3 cards customized for their needs... That's what kept Apple afloat, certainly not Moto's "impressive" ability in moving the G4 forward...
Next what, are we gonna start defending Moto for the 500+/- MHz fiasco simply because they sell their CPUs to Apple? No, they fscked everything up, and I'm bloody well glad they're paying for their mistakes (their semicondutor unit hasn't exactly been churning big profits for the past year or so--try to guess why?)
I try to say it once again, IBM did a far better job. They received an order from Apple. They met Apple's expectations (actually exceeded in terms of MHZ comparing to the "pro" line). If the iBook has been possible it is only because of IBM. Were it for Moto it'd have already gone the Cube way--maybe not even that far... [ie: that design wouldn't have been possible without an IBM G3--and the same is true for the old fanless iMac design, which kept Apple afloat for a while]
So, again, in which way could an Apple-designed and IBM-fabbed PPC CPU be bad for Apple? <img src="graemlins/oyvey.gif" border="0" alt="[No]" />
ZoSo
The G3 and the G4 was comin' from the 603e... no?
[quote]Jason Waxman, Intel's enterprise platforms marketing manager, conceded that IBM's Power 4 platform may be able to generate more competitive results, but at a higher cost than either the Intel or Sun platforms.<hr></blockquote>
from: <a href="http://www.theregister.co.uk/content/53/25485.html"; target="_blank">http://www.theregister.co.uk/content/53/25485.html</a>;
Granted, but the salient point here is that IBM has sensibly moved away from the pure-RISC philosphy.
[quote]
Otherwise, this is news to me. What kind of stuff is IBM looking to handle in hardware (I assume you mean in the chipset, or something?)<hr></blockquote>
IIRC, it had something to do with speeding up network transactions...its called FastTrack (IIRC) and its planned to ba part of the POWER5 processor.
Anyways, you must know something moki, because you are taunting us just like you did six months ago when you were tipping us about your software being bundled with the Powermacs...
1. Does L3 cache have a special benefit for the PowerPC architecture? The current G4s are using it and the oft-mentioned Power4 is using it (something like 32 meg). AMD used it briefly on the K-6III and then abandoned it (as I recall it made a definite improvement over the K-6II). Neither AMD or intel use it currently, id it too costly or is it not effective above a certain processor or memory performance level?
2. I know video cards are using 600 Mhz plus DDR memory, and I read somewhere that supposedly the top of the line next generation nVidia board will use 1 Ghz memory. Would such high clocked DDR work for L3 cache?
Regarding an on-chip memory controller I saw this discussion of the coming AMD Hammer (which has an integrated memory controller) and it made me wonder about the correlation between the rumored on chip memory controller on the G5 and Apple's recently acquired high end video apps :
[quote] The memory controller is the weight in Hammer's head The bulk of improved
performance comes from the integrated memory controller. It takes less time getting data out of main memory than more conventional approaches.
This is very good, provided what you're using has to go to main memory all the time. However, CPUs (and many applications) are designed so that you
don't have to go to main memory all the time. That's why you see those funny words attached to CPUs like prefetching and trace caching.
Ideally, a CPU should never have to make a request to main memory for something. Ideally, anything it wants should already be waiting for it
inside the L1/L2 caches, which are much, much faster than anything in memory, and are right there, rather than be a horrible couple hundred
nanoseconds away.
When that's possible, programmers try to do that: write to keep most of the action in the caches. Where they've succeeded, the memory controller in
Hammer won't be much help, since it won't be used so much.
There are situations where it's impossible to keep all the action in the caches; you have to go to main memory all the time. This is where the memory
controller will really shine.
So when we see benchmarking of the final product, vis-a-vis the Athlon XP,you'll probably see rather lopsided results. Benchmarks of items like office applications probably won't improve much at all, while audio and video editing should show stellar improvements (improved yet more by the inclusion of SSE2 capability). <hr></blockquote>
<strong>Two questions I have:
1. Does L3 cache have a special benefit for the PowerPC architecture? The current G4s are using it and the oft-mentioned Power4 is using it (something like 32 meg). AMD used it briefly on the K-6III and then abandoned it (as I recall it made a definite improvement over the K-6II). Neither AMD or intel use it currently, id it too costly or is it not effective above a certain processor or memory performance level?
</strong><hr></blockquote>
No... L3 is useful if your processor is much faster than the available memory bandwidth. Intel/AMD currently have fairly fast memory subsystems so the expense of an L3 isn't worth it. An on-chip memory controller is going to make this even more true. Apple is using big and fast L3 because their bus is stuck at 1 GB/sec. POWER4 uses a huge L3 because it is really really really damn fast, and even its impressive 500 MHz bus can't keep it fed.
[quote]<strong>
2. I know video cards are using 600 Mhz plus DDR memory, and I read somewhere that supposedly the top of the line next generation nVidia board will use 1 Ghz memory. Would such high clocked DDR work for L3 cache?
</strong><hr></blockquote>
Possibly, although caches usually use static RAM due to its lower latencies. It would be nice if main memory could use that fast DDR, but it needs to be kept too close to the processor and the tolerances are too tight for it to not be soldered to the main board. Ah well, DDR-II is on the way (late next year, perhaps).
[quote]<strong>
Regarding an on-chip memory controller I saw this discussion of the coming AMD Hammer (which has an integrated memory controller) and it made me wonder about the correlation between the rumored on chip memory controller on the G5 and Apple's recently acquired high end video apps :</strong><hr></blockquote>
The quote is true, but as processors and memory get faster newer classes of applications become possible, and larger and larger data sets get pushed around. There are lots of things programmers don't even try because the memory is too slow or the caches too small.
<strong>
I'm not sure what you mean. The POWER4 is currently the fastest chip you can buy... faster than SPARC, faster than a 2.2ghz Pentium IV... see here for details:
<a href="http://www.AmbrosiaSW.com/webboard/Forum64/HTML/000150.html"; target="_blank">http://www.AmbrosiaSW.com/webboard/Forum64/HTML/000150.html</a></strong><hr></blockquote>;
The Power4 is irrelevant to Apple. It is not a consumer desktop CPU. It's like comparing the performance of the original Mac to a Cray supercomputer...one can be bought by a middle class family and used in the study, the other cannot.
Unless you know something about a variant of the Power4 that the rest of us do not?
<strong>
I'm not sure what you mean. The POWER4 is currently the fastest chip you can buy... faster than SPARC, faster than a 2.2ghz Pentium IV... see here for details:
<a href="http://www.AmbrosiaSW.com/webboard/Forum64/HTML/000150.html"; target="_blank">http://www.AmbrosiaSW.com/webboard/Forum64/HTML/000150.html</a></strong><hr></blockquote>;
It's been pointed out on other message boards that the SPEC results for the POWER4 are slightly misleading as it shows the score of a single core running at a higher speed than IBM seems able to operate in dual core mode. And that single core is using the entire 128MB of L3 cache normally reserved for a whole processor module unit. A very fast part to be sure but when a processor such as a P4 comes so close to matching it in int performance at a cost orders of magnitude less one has to wonder. Of course IBM has the scalability of producting very large arrays of their processors. But as another poster said, very little relevance to desktop computer market.
Edit: Actually i was just going through some of the latest SPEC results and the new 2.53GHz P4 is much more competitive with the Power4, surpassing it on SPECINT.
[code]
P4: INT base/peak FP base/peak
882/896 861/873
POWER4: 804/839 1202/1266
</pre><hr></blockquote>
As Intel scales to 3GHz by the end of this year those numbers will start to look even poorer for IBM who probally won't be able to scale their design much.
[ 06-09-2002: Message edited by: Eskimo ]</p>
If Mot brass is actually stupid enough to sell SPS, it'll be snapped up quick. <hr></blockquote>
Oh the Moto brass is stupid, no question about that. To me the question is whether they are smart enough to sell of their SPS unit to save it from the rest of Moto and its management. Sadly Agere wasn't spun off from Lucent soon enough to save it from Lucent's mistakes, I would hope Moto's SPS wouldn't have to suffer the same fate.
[quote] The talent is there, the fab tech is there, they just need money and disciplined management.<hr></blockquote>
A lot of the talent has been laid off, the fabs aren't doing that hot with Moto slashing their cap ex to a measly 250 million this year from well over a billion previously. Everyone but TSMC and AMD cut back this year but the levels Moto has cut will only poison their future capabilites. But since they have indicated they want to abandon their US based fabs and move to China that might be ok.
[quote] Sony together with its Sony Computer Entertainment Inc. (SCEI), IBM, and Toshiba announced the joint efforts for the industry implementation of 0.09-0.045-micron technical processes on 300-mm silicon wafers. Like in the most cases companies do not plan to build joint facilities, each of them is going to implement the joint developments on its own fabs.
IBM is going to launch its 0.09-micron chip factory on 300-mm wafers in the end of 2002. I presume the first products to be chips developed for IBM's Cell project ("supercomputer-on-a-chip"). The transition to 65 nm and 45 nm is to happen in 2004 and 2006, respectively.
Sony is going to use the IBM's "Cell" architecture in its PlayStation 3 console, that's to be released next year.
In general the R&D partnership program looks considered enough: IBM is going to pass its SOI developments to the Japanese Sony and Toshiba. The group of scientists and engineers from IBM, Sony, and Toshiba will be developing SOI and other technologies in the IBM Semiconductor Research and Development Center (SRDC). According to the preliminary plan, the companies are going to spend several hundreds million dollars for this program during four years.
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<a href="http://www.digit-life.com/articles/digests/0204.html"; target="_blank">April 2002 hardware digest from digit-life</a>
Codenamed Cell, the new chip will form the basis of a massive $400 million, five-year R&D project. The goal of that research: to create a chip that not only goes like the proverbial off a shovel, but is designed specifically for high speed networks - and multi-processing across them.
Cell will utilise IBM's most up-to-date processor technologies - "copper wires, silicon-on-insulator transistors and low-K dielectric insulation" - all done at 0.1 micron (and probably a lot smaller by the time the thing ships) and fabbed on 12in wafers. It will "deliver teraflops of processing power". A 'flop' is a floating-point maths operation, and one teraflop is one thousand billion flops.
The trio haven't said much more about the chip, other than the tangential references to supercomputer performance and enabling the chip for a world of ubiquitous broadband Net connections. Ultimately, the part will power a wide range of consumer devices.
All that suggests we're looking at a general purpose microprocessor running at high speeds, enabled to process high throughput data streams coming in from all these wide, fast pipelines the partners expect devices containing Cell to be connected to. It's also expected to be a low-power processor. All that sounds like a cross between Emotion Engine, PowerPC and DSPs.
There's an irony here in that IBM fell out with its PowerPC partner Motorola when the latter developed the AltiVec vector processing system to allow the PowerPC to operate as a kind of programmable DSP. That's no use to us, complained IBM, and the two promptly parted ways.
IBM has clearly changed its mind about this kind of thing. It's certainly churning out Motorola-designed AltiVec-enabled PowerPC 7410 CPUs (aka G4) for Apple, and it may also have licensed AltiVec for the PowerPC-based processor it designed for Nintendo's GameCube console, which is due to ship later this year. And given Cell's emphasis on processing broadband-delivered multimedia data, it's not hard to imagine that IBM is working on something very similar to AltiVec for the new chip.
The chip's codename also gives a clue to its functionality. Said Ken Kutaragi, head of Sony's Computer Entertainment division: "With built-in broadband connectivity, microprocessors that currently exist as individual islands will be more closely linked, making a network of systems act more as one, unified 'supersystem'. Just as biological cells in the body unite to form complete physical systems, Cell-based electronic products of all types will form the building blocks of larger systems."
That suggests that multi-processing support is being designed into Cell from day one, doing all sorts of clever stuff like reading any chip's data and instruction caches, NUMA-style - a feature already on Motorola's PowerPC roadmap. And IBM has a keen interest in NUMA, thanks to its purchase of Sequent.
<hr></blockquote><a href="http://www.theregister.co.uk/content/3/17511.html"; target="_blank">The Register</a>
[quote]
Sony is going to use the Cell processor in its Playstation 3 console, slated for a release in 2004 or 2005. But as the initial value of the agreement between IBM, Sony and Toshiba has been projected to be between $2 and $ 4 billion, the three companies clearly have other uses for the processor in mind. Designed to process information at supercomputer speeds and handle broadband communications, Cell could be used in multimedia computers and enterprise environments as well. <hr></blockquote>
<a href="http://www.infosatellite.com/news/2002/01/h070102ibm_toshiba_sony_os.html"; target="_blank">InfoSatellite</a>
[quote]
Sony and Toshiba are expanding an alliance with IBM that will give the companies access to its chip breakthroughs while making the tech giant more of a player in the burgeoning market for consumer electronics.
Under terms of the alliance, announced late Monday, Sony and Toshiba will be able to incorporate some of IBM's chip-making advances, such as Silicon on Insulator, into future processors for consumer-electronic devices. As a result, IBM's chips and intellectual property could wind up in products such as camcorders and PlayStation gaming consoles.
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"We're really gunning for MIPS (a processor architecture) and leaning on Motorola," said Ron Tessitore, vice president of PowerPC networking technology at IBM.
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The three companies have already said they will collaborate on a future processor architecture, called the Cell architecture, that some analysts speculate will end up in the PlayStation 3. The Cell architecture is expected to be able to enhance the performance of peer-to-peer computing and will be based, in part, on the existing PowerPC architecture, analysts say.
Although he declined to discuss specifics, Bijan Davari, vice president of semiconductor development at IBM Microelectronics, said Cell chips would be "optimized for high-speed video as well as various other communication to the Internet."
"It's a unique alliance in that it brings the most advanced technology user together with the most advanced technology manufacturer," he added.
While the companies would not elaborate on whether Sony would adopt the PowerPC architecture, IBM is clearly interested in seeing its technology spread. IBM will offer higher performance processors and be "more liberal with licensing PowerPC cores," Tessitore said.
Analysts believe the agreement marks a change in philosophy, whereby IBM will license both its chip technology and its manufacturing, allowing clients to mix and match to create custom chips. Currently, IBM licenses the technology and manufactures the chips for clients such as Apple Computer and Nintendo.
"What's very different here...is this is the first time that a (customer) is getting a chance to change the cookie dough," said Rick Doherty, director of research for the Envisioneering Group. This is "the first time anyone has been allowed to change the recipe."
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<a href="http://news.zdnet.co.uk/story/0,,t271-s2107623,00.html"; target="_blank">ZDNet news</a>
SO IBM does appear to be willing to allow big customers to roll their own variations of CPU designs?
Of course no one knows what will really happen but IBM is developing new tech and is willing to get away from a "one size fits all" approach to processor design. I'd take 2-8 fast cheap low power processors in a box with the right architecture to keep them fed over another incremental bump?
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I often hear comments like this; unsupported by logic. Intel isn't "into" Macs? As in, if they had an opportunity to sell another five million Pentium processors annually, they'd say, sorry Apple - no soup for you? <img src="graemlins/hmmm.gif" border="0" alt="[Hmmm]" />
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Agreed, it's apple that isn't "into" intel.