To put a Power4 in a Mac, you would have rewrite, or at least severely Tweak OSX to run on it. It would require a complete re-compile with the associated re-write/debugging. It wouldn't be easy. Apple would also have to support two code bases, Power4 and PPC.
<snip>
Ffakr.</strong><hr></blockquote>
It seems to me that this makes the possibility of AMD creating a PowerPC compatible Hammer more likely...
Technical difficulties of PowerPC instruction decode aside it would allow Apple to benefit from rapid advances in processor technology, increase AMD sales (ex-Apple guy at AMD?), no x86 for Apple (!) and there is no reliance on another giant's (IBM) whims. Should AMD fold in a few years couldn't Apple buy them out? They (Apple) could NOT buy out IBM, I think we would all agree.
I know this has been discussed for ever, but since this is a speculation forum and Ffakr being from Moto-land who seems to know his Power history coupled with my non-semiconductor experience at Moto (I have no faith what so ever in Moto top management) I just have to dredge this up.
There is no doubt that the Hammer stuff is ready. Would it take 2+ years to add a PPC decoder to it? I don't think so. One of the bigger issues with this reasoning is Altivec compatibility... Can anyone address the possibility of emulating it in a 64-bit Hammer?
It seems to me that this makes the possibility of AMD creating a PowerPC compatible Hammer more likely...
Technical difficulties of PowerPC instruction decode aside it would allow Apple to benefit from rapid advances in processor technology, increase AMD sales (ex-Apple guy at AMD?), no x86 for Apple (!) and there is no reliance on another giant's (IBM) whims. Should AMD fold in a few years couldn't Apple buy them out? They (Apple) could NOT buy out IBM, I think we would all agree.
I know this has been discussed for ever, but since this is a speculation forum and Ffakr being from Moto-land who seems to know his Power history coupled with my non-semiconductor experience at Moto (I have no faith what so ever in Moto top management) I just have to dredge this up.
There is no doubt that the Hammer stuff is ready. Would it take 2+ years to add a PPC decoder to it? I don't think so. One of the bigger issues with this reasoning is Altivec compatibility... Can anyone address the possibility of emulating it in a 64-bit Hammer?
G5 from Moto - no way, ever.
Let it rip! </strong><hr></blockquote>
If you were to do something like this, given that IBM has already implemented a PowerPC instruction decoder on the Power4, it would make sense to license IBM tech and maybe subcontract some of the development.
Not sure about AltiVec, dunno if you can/should crack those instuctions and translate to SIMD uops or since we're jus slicing and dicing a defenseless piece of Silicon up maybe we'll just Scotch tape an Altivec unit on it.
<strong>Some benchmarks clearly shows that the Xserve is far superior than the dual ghz G4 in some tasks. So the DDR Mobo of the Xserve as is utility : it's not only a marketing trick.</strong><hr></blockquote>
Yes, the Xserve DDR capability is better than not having DDR at all. But the Xserve architecture only helps with I/O intensive operations, not processor-intensive operations.
I'm not looking for a new Power Mac that only compares well to a current Power Mac. Frankly, that's not a very high standard (a few specialized Altivec-enhanced Photoshop benchmarks aside). I'm hoping for a kick-ass Mac hardware platform that rivals current PC offerings. I want to have OS X and really good performance at the same time.
Yes, the Xserve DDR capability is better than not having DDR at all. But the Xserve architecture only helps with I/O intensive operations, not processor-intensive operations.
I'm not looking for a new Power Mac that only compares well to a current Power Mac. Frankly, that's not a very high standard (a few specialized Altivec-enhanced Photoshop benchmarks aside). I'm hoping for a kick-ass Mac hardware platform that rivals current PC offerings. I want to have OS X and really good performance at the same time.</strong><hr></blockquote>
... The instruction set used to code for a Power3 or a Power4 is not the same as the Old Power. It also Isn't the same as PowerPC.
To put a Power4 in a Mac, you would have rewrite, or at least severely Tweak OSX to run on it. It would require a complete re-compile with the associated re-write/debugging. It wouldn't be easy. Apple would also have to support two code bases, Power4 and PPC.
</strong><hr></blockquote>
I'm not sure where you obtained your information. However, it's in direct contradiction to IBM's own published information about the POWER4.
Maintain binary compatibility for both 32-bit and 64-bit applications with prior PowerPC and PowerPCAS systems: Several internal IBM task forces in the first half of the 1990s had concluded that the PowerPC architecture did not have any technical impediments to allow it to scale up to significantly higher frequencies with excellent performance. With no technical reason to change, in order to keep our customers software investment in tact, we accepted the absolute requirement of maintaining binary compatibility for both 32-bit and 64-bit applications, from a hardware perspective.
[quote]Several internal IBM task forces in the first half of the 1990s had concluded that the PowerPC architecture did not have any technical impediments to allow it to scale up to significantly higher frequencies with excellent performance<hr></blockquote>
Although PowerPC's performance is good at high clock rates (but not good enough ), it is taking its time getting there. IBM's report didn't count on Motorola's 18 month "stuck at 500MHz while x86 goes from 500MHz to 1GHz" fiasco. Hopefully they'll return to the good old days (PowerMac 6500: first consumer machine to reach 300MHz :cool: ).
<strong>Although PowerPC's performance is good at high clock rates (but not good enough ), it is taking its time getting there. IBM's report didn't count on Motorola's 18 month "stuck at 500MHz while x86 goes from 500MHz to 1GHz" fiasco. Hopefully they'll return to the good old days (PowerMac 6500: first consumer machine to reach 300MHz :cool: ).</strong><hr></blockquote>
The IBM research had nothing to do with Motorola or the G4's scaling problems. It was entirely about IBM's decision to keep the POWER family compatible with the PowerPC ISA.
Motorola's G4 being stuck for a while also has nothing to do with anything besides the issues that Motorola had with their G4 design. If IBM builds Apple's next desktop processor, they might very well take the technology from the POWER4 and use it to build said processor. Nobody is saying the POWER4 will suddenly appear in a Mac, but there is a lot of great stuff in the POWER4 that can be directly applied (along with a process shrink and a new bus) to building a processor for Apple. Intel manages to build the PentiumIV monster and sell it to the consumer market, so there is no reason that IBM can't sell a re-targeted processor into the consumer market as well.
Sheesh.
BTW: the original text quoted above was incorrect... it should have been:
Yes, the Xserve DDR capability is better than not having DDR at all. But the Xserve architecture only helps with I/O intensive operations, not processor-intensive operations.
I'm not looking for a new Power Mac that only compares well to a current Power Mac. Frankly, that's not a very high standard (a few specialized Altivec-enhanced Photoshop benchmarks aside). I'm hoping for a kick-ass Mac hardware platform that rivals current PC offerings. I want to have OS X and really good performance at the same time.</strong><hr></blockquote>
Definately.
The benchmarks that people have read have a lot to do with Disk performance. Xserve's 4 individual ATA/100 channels on a RAID-0 will spank the crap out of a Powermac G4's single ATA/66 channel, on anything related to disk (like Photoshop reading, that are benchmarked).
Adding DDR won't contribute much to the overall architecture and speed. Its a great tool to market, and I'm sure Apple knows this (this why I'm more confident now we'll see DDR in the new G4s). But man if we didn't get ATA/100 that would be the bottleneck on our machines! Remember Jon Rubenstein's quote:
"Everybody gets hung up on clock speed. But what really counts is balanced system performance."
So new chips alone won't help us, and neither will DDR, or I/O--we need it all. Let's remember that.
<strong>Adding DDR won't contribute much to the overall architecture and speed. Its a great tool to market, and I'm sure Apple knows this (this why I'm more confident now we'll see DDR in the new G4s). But man if we didn't get ATA/100 that would be the bottleneck on our machines! Remember Jon Rubenstein's quote:
"Everybody gets hung up on clock speed. But what really counts is balanced system performance."</strong><hr></blockquote>
Without DDR, the current dual-1 GHz PowerMac already is unbalanced. I'll agree that ATA/100 would be great, but even without it, and with a 1.4 GHz G4, FSB at 266 or 333 MHz, I'm fairly certain you'd notice a none-to-subtle increase in overall performance vs the current 1 GHz G4.
For many tasks, you load up all you need from disk into RAM, process and reprocess what you've got in RAM for a long time, and maybe store some results back to disk later. As long as you have enough RAM that you're not spending a lot of time page swapping memory, you can go for long stretches of time where I/O doesn't much matter.
Okay. It's cool... but does it have a G4 or G5 processor in it? Is this how Steve will arrive on stage at MWNY? Is this an example of what the cooling system on the new Power Macs will sound like? <img src="graemlins/bugeye.gif" border="0" alt="[Skeptical]" />
But I don't want to put the horse in front of the cart.
How else does the horse pull it then?<hr></blockquote>
D'oh!
Well, it's like my great-aunt Rosanne Rosannadana-Delights used to say, "Well it just goes to show you, if it"s not one thing, it's something completely different that what you were expecting, and isn't that the pisser!?"
<strong>I'm gonna go out on a limb here, but I'm guessing one of the main differences between the Power4 and G4 in terms of performance is the shear number of
execution units.
Execution units are sexy, therefore, the G5 is sexier than the G4.</strong><hr></blockquote>
The gestion of the memory of the power4 is far more sophisticated also: ever eard of 32 MB L3 cache ?
BTW: the original text quoted above was incorrect... it should have been:
"and the Geek shall inherit the Earth"<hr></blockquote>
hmm... looking at my King Larry version of the Macintosh Bible, it would appear you?re right-- it?s under Palms and Handsprings 37:11.
It also foretells of the coming of the G5 under Book of Steve?s Friend, Joel 2:31
"The sun shall be turned into darkness, and the moon into blood, before the great and the terrible day of the G5 has come."
Has anyone checked the lunar calendar for the upcoming New York expo?
Personally I don?t need a G5 since I just basically surf the net while supposed to be working. Sure, I?d get one if it came out, but I?d be happy with a G4 at 1.4+GHz with a 166MHz bus (333DDR). (Remember, I?m the guy screeching into the telephone.)
But considering it?s Apple, anything could happen.
Is it possible to have more Altivec co-processors or to widen the amount of registers on a single unit from 128 to say...256(2x) or 512(4x)?
Assuming the main processor and memory could feed and retrieve from them effiecently, would this not be a low cost way to gain great linear performance growth in all Altivec coded APIs.
A 512bit wide Altivec unit that could run PhotoShop filters(+Quicktime +MPG encode) 4x current speeds would be pretty nice.
This is complete and pure speculation on my part, but I would like to hear the feasibility from the hardware gurus here, on the possibility of doing this in a desktop machine.
Is it possible to have more Altivec co-processors or to widen the amount of registers on a single unit from 128 to say...256(2x) or 512(4x)?
Assuming the main processor and memory could feed and retrieve from them effiecently, would this not be a low cost way to gain great linear performance growth in all Altivec coded APIs.
A 512bit wide Altivec unit that could run PhotoShop filters(+Quicktime +MPG encode) 4x current speeds would be pretty nice.</strong><hr></blockquote>
Widening it wouldn't help much. SIMD units are designed to perform the same instruction on lots of little chunks at once. 256 or 512 bit wide registers would have to be able to perform different instructions on two or four 128-bit chunks in order to accelerate AV, which greatly increases the complexity of the problem (and thus the size, cost and power requirements of the chip).
Widening it and keeping it pure SIMD just means that it'll be even more starved for bandwidth than it is now, and that 256- and 512-bit wide vector instructions will have to be added. Any code that used the old 128-bit instructions wouldn't benefit, and you'd probably get diminishing returns. Also, again, the huge data widths would bloat the processor.
What AV could use is more execution units. It would still be 128 bit, but then the CPU could work on more instructions simultaneously. This applies to all of the PPC instruction set, not just AltiVec.
Really, most of what the G4 needs to be a screamer is another FP unit (or two ) and a fat pipe to fast RAM.
Comments
<strong>
Once upon a time, there was Power...
<snip>
To put a Power4 in a Mac, you would have rewrite, or at least severely Tweak OSX to run on it. It would require a complete re-compile with the associated re-write/debugging. It wouldn't be easy. Apple would also have to support two code bases, Power4 and PPC.
<snip>
Ffakr.</strong><hr></blockquote>
It seems to me that this makes the possibility of AMD creating a PowerPC compatible Hammer more likely...
Technical difficulties of PowerPC instruction decode aside it would allow Apple to benefit from rapid advances in processor technology, increase AMD sales (ex-Apple guy at AMD?), no x86 for Apple (!) and there is no reliance on another giant's (IBM) whims. Should AMD fold in a few years couldn't Apple buy them out? They (Apple) could NOT buy out IBM, I think we would all agree.
I know this has been discussed for ever, but since this is a speculation forum and Ffakr being from Moto-land who seems to know his Power history coupled with my non-semiconductor experience at Moto (I have no faith what so ever in Moto top management) I just have to dredge this up.
There is no doubt that the Hammer stuff is ready. Would it take 2+ years to add a PPC decoder to it? I don't think so. One of the bigger issues with this reasoning is Altivec compatibility... Can anyone address the possibility of emulating it in a 64-bit Hammer?
G5 from Moto - no way, ever.
Let it rip!
<strong>
It seems to me that this makes the possibility of AMD creating a PowerPC compatible Hammer more likely...
Technical difficulties of PowerPC instruction decode aside it would allow Apple to benefit from rapid advances in processor technology, increase AMD sales (ex-Apple guy at AMD?), no x86 for Apple (!) and there is no reliance on another giant's (IBM) whims. Should AMD fold in a few years couldn't Apple buy them out? They (Apple) could NOT buy out IBM, I think we would all agree.
I know this has been discussed for ever, but since this is a speculation forum and Ffakr being from Moto-land who seems to know his Power history coupled with my non-semiconductor experience at Moto (I have no faith what so ever in Moto top management) I just have to dredge this up.
There is no doubt that the Hammer stuff is ready. Would it take 2+ years to add a PPC decoder to it? I don't think so. One of the bigger issues with this reasoning is Altivec compatibility... Can anyone address the possibility of emulating it in a 64-bit Hammer?
G5 from Moto - no way, ever.
Let it rip!
If you were to do something like this, given that IBM has already implemented a PowerPC instruction decoder on the Power4, it would make sense to license IBM tech and maybe subcontract some of the development.
Not sure about AltiVec, dunno if you can/should crack those instuctions and translate to SIMD uops or since we're jus slicing and dicing a defenseless piece of Silicon up maybe we'll just Scotch tape an Altivec unit on it.
<strong>3. Are there times when it is some use to flog a dead horse?</strong><hr></blockquote>
To tenderize the horse before marinating it?
<strong>Some benchmarks clearly shows that the Xserve is far superior than the dual ghz G4 in some tasks. So the DDR Mobo of the Xserve as is utility : it's not only a marketing trick.</strong><hr></blockquote>
Yes, the Xserve DDR capability is better than not having DDR at all. But the Xserve architecture only helps with I/O intensive operations, not processor-intensive operations.
I'm not looking for a new Power Mac that only compares well to a current Power Mac. Frankly, that's not a very high standard (a few specialized Altivec-enhanced Photoshop benchmarks aside). I'm hoping for a kick-ass Mac hardware platform that rivals current PC offerings. I want to have OS X and really good performance at the same time.
<strong>
Yes, the Xserve DDR capability is better than not having DDR at all. But the Xserve architecture only helps with I/O intensive operations, not processor-intensive operations.
I'm not looking for a new Power Mac that only compares well to a current Power Mac. Frankly, that's not a very high standard (a few specialized Altivec-enhanced Photoshop benchmarks aside). I'm hoping for a kick-ass Mac hardware platform that rivals current PC offerings. I want to have OS X and really good performance at the same time.</strong><hr></blockquote>
we are all , hoping for this
<strong>
... The instruction set used to code for a Power3 or a Power4 is not the same as the Old Power. It also Isn't the same as PowerPC.
To put a Power4 in a Mac, you would have rewrite, or at least severely Tweak OSX to run on it. It would require a complete re-compile with the associated re-write/debugging. It wouldn't be easy. Apple would also have to support two code bases, Power4 and PPC.
</strong><hr></blockquote>
I'm not sure where you obtained your information. However, it's in direct contradiction to IBM's own published information about the POWER4.
From <a href="http://www-1.ibm.com/servers/eserver/pseries/hardware/whitepapers/power4.html"; target="_blank">http://www-1.ibm.com/servers/eserver/pseries/hardware/whitepapers/power4.html</a>; :
[quote]
- Maintain binary compatibility for both 32-bit and 64-bit applications with prior PowerPC and PowerPCAS systems: Several internal IBM task forces in the first half of the 1990s had concluded that the PowerPC architecture did not have any technical impediments to allow it to scale up to significantly higher frequencies with excellent performance. With no technical reason to change, in order to keep our customers software investment in tact, we accepted the absolute requirement of maintaining binary compatibility for both 32-bit and 64-bit applications, from a hardware perspective.
<hr></blockquote>[edit: fixed some UBB code]
[ 07-02-2002: Message edited by: Zarafa ]</p>
Although PowerPC's performance is good at high clock rates (but not good enough
<strong>
But I don't want to put the horse in front of the cart.</strong><hr></blockquote>
How else does the horse pull it then?
<strong>Although PowerPC's performance is good at high clock rates (but not good enough
The IBM research had nothing to do with Motorola or the G4's scaling problems. It was entirely about IBM's decision to keep the POWER family compatible with the PowerPC ISA.
Motorola's G4 being stuck for a while also has nothing to do with anything besides the issues that Motorola had with their G4 design. If IBM builds Apple's next desktop processor, they might very well take the technology from the POWER4 and use it to build said processor. Nobody is saying the POWER4 will suddenly appear in a Mac, but there is a lot of great stuff in the POWER4 that can be directly applied (along with a process shrink and a new bus) to building a processor for Apple. Intel manages to build the PentiumIV monster and sell it to the consumer market, so there is no reason that IBM can't sell a re-targeted processor into the consumer market as well.
Sheesh.
BTW: the original text quoted above was incorrect... it should have been:
"and the Geek shall inherit the Earth"
<strong>
Yes, the Xserve DDR capability is better than not having DDR at all. But the Xserve architecture only helps with I/O intensive operations, not processor-intensive operations.
I'm not looking for a new Power Mac that only compares well to a current Power Mac. Frankly, that's not a very high standard (a few specialized Altivec-enhanced Photoshop benchmarks aside). I'm hoping for a kick-ass Mac hardware platform that rivals current PC offerings. I want to have OS X and really good performance at the same time.</strong><hr></blockquote>
Definately.
The benchmarks that people have read have a lot to do with Disk performance. Xserve's 4 individual ATA/100 channels on a RAID-0 will spank the crap out of a Powermac G4's single ATA/66 channel, on anything related to disk (like Photoshop reading, that are benchmarked).
Adding DDR won't contribute much to the overall architecture and speed. Its a great tool to market, and I'm sure Apple knows this (this why I'm more confident now we'll see DDR in the new G4s). But man if we didn't get ATA/100 that would be the bottleneck on our machines! Remember Jon Rubenstein's quote:
"Everybody gets hung up on clock speed. But what really counts is balanced system performance."
So new chips alone won't help us, and neither will DDR, or I/O--we need it all. Let's remember that.
<strong>Adding DDR won't contribute much to the overall architecture and speed. Its a great tool to market, and I'm sure Apple knows this (this why I'm more confident now we'll see DDR in the new G4s). But man if we didn't get ATA/100 that would be the bottleneck on our machines! Remember Jon Rubenstein's quote:
"Everybody gets hung up on clock speed. But what really counts is balanced system performance."</strong><hr></blockquote>
Without DDR, the current dual-1 GHz PowerMac already is unbalanced. I'll agree that ATA/100 would be great, but even without it, and with a 1.4 GHz G4, FSB at 266 or 333 MHz, I'm fairly certain you'd notice a none-to-subtle increase in overall performance vs the current 1 GHz G4.
For many tasks, you load up all you need from disk into RAM, process and reprocess what you've got in RAM for a long time, and maybe store some results back to disk later. As long as you have enough RAM that you're not spending a lot of time page swapping memory, you can go for long stretches of time where I/O doesn't much matter.
<strong>Flying car: <a href="http://www.moller.com/skycar/m400/"; target="_blank">http://www.moller.com/skycar/m400/</a></strong><hr></blockquote>;
Okay. It's cool... but does it have a G4 or G5 processor in it? Is this how Steve will arrive on stage at MWNY? Is this an example of what the cooling system on the new Power Macs will sound like? <img src="graemlins/bugeye.gif" border="0" alt="[Skeptical]" />
Originally posted by GardenOfEarthlyDelights:
But I don't want to put the horse in front of the cart.
How else does the horse pull it then?<hr></blockquote>
D'oh!
Well, it's like my great-aunt Rosanne Rosannadana-Delights used to say, "Well it just goes to show you, if it"s not one thing, it's something completely different that what you were expecting, and isn't that the pisser!?"
Nevermind.
execution units.
Execution units are sexy, therefore, the G5 is sexier than the G4.
BTW, I'm going to suck my own dick regardless of what comes out at Macworld.
[ 07-03-2002: Message edited by: stimuli ]</p>
<strong>I'm gonna go out on a limb here, but I'm guessing one of the main differences between the Power4 and G4 in terms of performance is the shear number of
execution units.
Execution units are sexy, therefore, the G5 is sexier than the G4.</strong><hr></blockquote>
The gestion of the memory of the power4 is far more sophisticated also: ever eard of 32 MB L3 cache ?
BTW: the original text quoted above was incorrect... it should have been:
"and the Geek shall inherit the Earth"<hr></blockquote>
hmm... looking at my King Larry version of the Macintosh Bible, it would appear you?re right-- it?s under Palms and Handsprings 37:11.
It also foretells of the coming of the G5 under Book of Steve?s Friend, Joel 2:31
"The sun shall be turned into darkness, and the moon into blood, before the great and the terrible day of the G5 has come."
Has anyone checked the lunar calendar for the upcoming New York expo?
Personally I don?t need a G5 since I just basically surf the net while supposed to be working. Sure, I?d get one if it came out, but I?d be happy with a G4 at 1.4+GHz with a 166MHz bus (333DDR). (Remember, I?m the guy screeching into the telephone.)
But considering it?s Apple, anything could happen.
What are our sources of G5 "info":
- an old Motorola road map
- e500
- <a href="http://www.theregister.co.uk/content/39/22381.html"; target="_blank">A letter to the Register/MOSR</a>
- Pure, unadulterated speculation
There?s more evidence that Britney Spears has singing talent than the G5 is imminent. But I guess that?s what rumor boards are for.Is it possible to have more Altivec co-processors or to widen the amount of registers on a single unit from 128 to say...256(2x) or 512(4x)?
Assuming the main processor and memory could feed and retrieve from them effiecently, would this not be a low cost way to gain great linear performance growth in all Altivec coded APIs.
A 512bit wide Altivec unit that could run PhotoShop filters(+Quicktime +MPG encode) 4x current speeds would be pretty nice.
Quad-processors?
This is complete and pure speculation on my part, but I would like to hear the feasibility from the hardware gurus here, on the possibility of doing this in a desktop machine.
[ 07-03-2002: Message edited by: Ti X ]</p>
<strong>Technical question:
Is it possible to have more Altivec co-processors or to widen the amount of registers on a single unit from 128 to say...256(2x) or 512(4x)?
Assuming the main processor and memory could feed and retrieve from them effiecently, would this not be a low cost way to gain great linear performance growth in all Altivec coded APIs.
A 512bit wide Altivec unit that could run PhotoShop filters(+Quicktime +MPG encode) 4x current speeds would be pretty nice.</strong><hr></blockquote>
Widening it wouldn't help much. SIMD units are designed to perform the same instruction on lots of little chunks at once. 256 or 512 bit wide registers would have to be able to perform different instructions on two or four 128-bit chunks in order to accelerate AV, which greatly increases the complexity of the problem (and thus the size, cost and power requirements of the chip).
Widening it and keeping it pure SIMD just means that it'll be even more starved for bandwidth than it is now, and that 256- and 512-bit wide vector instructions will have to be added. Any code that used the old 128-bit instructions wouldn't benefit, and you'd probably get diminishing returns. Also, again, the huge data widths would bloat the processor.
What AV could use is more execution units. It would still be 128 bit, but then the CPU could work on more instructions simultaneously. This applies to all of the PPC instruction set, not just AltiVec.
Really, most of what the G4 needs to be a screamer is another FP unit (or two
[ 07-03-2002: Message edited by: Amorph ]</p>