Multiprocessors...
Well, I've seen more and more threads about MP G4 (quad, octo-...), but I think it isn't realistic.
Why ?
IIRC, in order to have efficient MP configurations (# proc > 2), processors must implement MERSI (modified, exclusive, reserved, shared, invalid) protocol to reduce the overhead while transferring data between the processors. ( few details <a href="http://maccentral.macworld.com/storyforum/forums/2001/07/30/hypertransport/?read=35" target="_blank">here</a>.)
7400 and 7410 proc. implements full 5-state MERSI protocol, but according to <a href="http://e-www.motorola.com/brdata/PDFDB/docs/MPC7450TS.pdf" target="_blank">Moto</a> (p.8), 745X processors only implement MESI protocol ( lacking the most important "Reserved" state ).
According to Bad Andy's posts [PowerPC/Altivec guru] at <a href="http://arstechnica.infopop.net/OpenTopic/page?a=frm&s=50009562&f=8300945231" target="_blank">arstechnica</a> (sorry, can't remember the exact link), making a quad-G4 using MESI protocol wouldn't be as useful as we hope, because of the additional overhead, and because designing such a rig would be a nightmare.
More over, current implementations of the G4 by Apple are actually memory bound when using Altivec. Even with DDR, dual G4 are limited by the poor memory subsystem.
So keep expectations low !
**CONFIRMED** <img src="graemlins/smokin.gif" border="0" alt="[Chilling]" />
Nothing more than a dual G4 ( perhaps at 1.4 or even 1.5GHz ) but certainly not a quad or an octo-processor Mac.
Why ?
IIRC, in order to have efficient MP configurations (# proc > 2), processors must implement MERSI (modified, exclusive, reserved, shared, invalid) protocol to reduce the overhead while transferring data between the processors. ( few details <a href="http://maccentral.macworld.com/storyforum/forums/2001/07/30/hypertransport/?read=35" target="_blank">here</a>.)
7400 and 7410 proc. implements full 5-state MERSI protocol, but according to <a href="http://e-www.motorola.com/brdata/PDFDB/docs/MPC7450TS.pdf" target="_blank">Moto</a> (p.8), 745X processors only implement MESI protocol ( lacking the most important "Reserved" state ).
According to Bad Andy's posts [PowerPC/Altivec guru] at <a href="http://arstechnica.infopop.net/OpenTopic/page?a=frm&s=50009562&f=8300945231" target="_blank">arstechnica</a> (sorry, can't remember the exact link), making a quad-G4 using MESI protocol wouldn't be as useful as we hope, because of the additional overhead, and because designing such a rig would be a nightmare.
More over, current implementations of the G4 by Apple are actually memory bound when using Altivec. Even with DDR, dual G4 are limited by the poor memory subsystem.
So keep expectations low !
**CONFIRMED** <img src="graemlins/smokin.gif" border="0" alt="[Chilling]" />
Nothing more than a dual G4 ( perhaps at 1.4 or even 1.5GHz ) but certainly not a quad or an octo-processor Mac.
Comments
Anyway...the next batch of G4s should be 7470 and 7460
<strong>I thought 7455 already has solved that "R" problem
Anyway...the next batch of G4s should be 7470 and 7460</strong><hr></blockquote>
Of course, but Moto downgraded the G4 from MERSI -> MESI, when comparing 74xx to 745x.
Do you really think Moto will reengineer G4-next-rev. to allow MERSI protocol ?
Think "embedded market"
Otherwise I agree with your post. This could change very quickly if the next PowerPC chip (whether it is a modified G4 family member, or a "G5") includes a faster bus (or on-chip memory controller) and full MERSI support.
<strong>Who needs MERSI when you can have MOESI </strong><hr></blockquote>
Okay, its late and I'm tired. I don't get it, you'll need to explain the joke.
"Modified Owner Exclusive Shared Invalid" or MOESI, Cache Coherency Protocol, keeps track of data in CPU caches; identifies when data from one CPU is needed by another, and when data is shared between CPUs; and effectively reduces memory traffic, increasing available bandwidth.
<strong>MOESI cache
"Modified Owner Exclusive Shared Invalid" or MOESI, Cache Coherency Protocol, keeps track of data in CPU caches; identifies when data from one CPU is needed by another, and when data is shared between CPUs; and effectively reduces memory traffic, increasing available bandwidth.</strong><hr></blockquote>
So its pretty much the same thing as MERSI, just using AMD terminology...?
Is this road block still in place with the current beta builds of 10.2?
If it is than only dual procesors are in the cards, If the limit is not there who knows what apple will place in the box.
A heat sink talked about in the prototype box seems to be to big for just a single or dual processor system.
Later Steve
"Re: multiple processors and big heat sink.
As much as the notion of a quadG4 sounds like the DB, the current Kernel of Darwin only supports 2 processors.
On the other hand, the new PowerMacs are rumored to be released with 10.2 which maybe has a revised kernel. Hmmm. I think we would have heard about that by now. Enough people have played with Jaguar preview to have noticed and it is unlikely to be the kind of revision that is added at the last second before the product is shipped.
(Er, off the top of my head, I typing hostinfo at command line will give you information like Kernel version (current release is 5.5) and number of processors supported.)"
So? Someone with a beta of Jaguar want to be so kind as to give it a try?
CGI
<strong>
Of course, but Moto downgraded the G4 from MERSI -> MESI, when comparing 74xx to 745x.
Do you really think Moto will reengineer G4-next-rev. to allow MERSI protocol ?
Think "embedded market"</strong><hr></blockquote>
If Apple specified that this is what they wanted, then Moto would probably put it back in, after all they do have that part of the chip designed, and I would imagine that it would be relatively simple to put it back in.
Sat Jul 13 00:40:35 PDT 2002; root:xnu/xnu-333.obj~1/RELEASE_PPC
Kernel configured for up to 2 processors.
2 processors are physically available.
Processor type: ppc7450 (PowerPC 7450)
Processors active: 0 1
Primary memory available: 1536.00 megabytes.
Default processor set: 40 tasks, 91 threads, 2 processors
Load average: 0.00, Mach factor: 1.99
<strong>Mach kernel version: Darwin Kernel Version 6.0:
Sat Jul 13 00:40:35 PDT 2002; root:xnu/xnu-333.obj~1/RELEASE_PPC
Kernel configured for up to 2 processors.
2 processors are physically available.
Processor type: ppc7450 (PowerPC 7450)
Processors active: 0 1
Primary memory available: 1536.00 megabytes.
Default processor set: 40 tasks, 91 threads, 2 processors
Load average: 0.00, Mach factor: 1.99</strong><hr></blockquote>
Ok so the current Beta is only set up for two processors. Any idea how hard it would be for apple to change that before the final build of 10.2 goes to press?
Dual G4's are far more reasonable and I think that a dual 1.4 G4 with enough bandwith to keep the altivec units fed would beat any other machine out there in the standard video/photo benchmarks. If Apple came out with Dual 1.4's and a bus that worked with them, then they would be back in the speed race.
I can see Apple making the entire Pro line a lineup with multiprocessor boxes. This is probably the fastest way to make up for the performance gap.
I'd rather have 8 (or even 4) 7410's @ 500 Mhz than 2 74xx @ 1.5 Ghz. My Sig says it all, and I have had it on this forum since Jan 2000. Apple has always had the capability to win the Mhz Wars outright. They have chosen not to all this time and unfortunately will continue to lag behind by choice, not by any technical limitations set by Motorola or anybody else.
A Quad system would be "a good thing"® if they could keep all the processors feed with data. I remember Daystar with the Quad system back in the days of Clones. If they could fix the issues for prepress and video pros why can't apple today. They have more software today that would get the speed boost now than any time before.
Later Steve
Looking for a Macintosh fast enough to go back in time and trick Bill Gates to say in School!
[ 07-23-2002: Message edited by: ssmurphy ]</p>
<strong>MERSI ME!
I'd rather have 8 (or even 4) 7410's @ 500 Mhz than 2 74xx @ 1.5 Ghz.</strong><hr></blockquote>
It's a conceivable alternative for folks
who:
-Make extensive use of explicitly MP enabled
software (video, graphics, and image editing),
which is able to divide the processing task
among several processors.
-Have to process several threads of approximately
equal CPU consumption concurrently. (Server
applications, etc)
Personally I don't do any of this. 2 CPUs
would be of marginal help, because e.g. the UI
portion of some audio applications I use
will schedule separately from the audio
processing thread (once these applications
are ported to OSX), but my feeling is that
it's probably not worth the expense.
Particularly since the audio is often memory
throughput rather than processor limited.
-Yon