Thanks for that, Pro'. Cleared that one up for me.
"BTW: I noticed that the 970's VMX unit isn't exactly compatible with the AltiVec unit... the difference is that is supports up to 8 hardware prefetch streams instead of the 4 supported by AltiVec. A subtle difference, and one that the application software won't really notice (although the OS code could take advantage of it a little). I wonder if there are other differences...?"
8 prefetch streams? Is that a subtle doubling of performance? Is it the same as fetching as twice as much data? Can it execute twice as much...? Is it Altivec+?
Can we speculate if this is independent of the 8 way superscalar execution for integer and fpu units? Or is VMX included in the 5 dispatch? Or...do we not know that yet?
If VMX hasn't been included in the Spec scores then a nice bonus to real world app performance is on the cards?
"Even if it can be used as an extra 2 FPUs in practice without too much pain."
Hmmm. Are you sure? If the G4 can have an 'extra 2 FPUs in practice' that would make 3 in total.
Why the hell isn't it dusting the Pentium 4 in Lightwave benches?
Most commentators agree that Altivec is a far superior form of SIMD unit than the Pentium 4's SIMD unit...
Lemon Bon Bon
So...you kind of answered my question. If spec scores don't take into account VMX, than the raw performance of the 970 is impressive if its minus altivec/VMX. Der-rool?
A 1.4 low end may not sound that much but its offering the equivalent of a 2.8 gig G4, not to mention all the other goodies then...it'd be a nice 'low end' PowerMac.
</strong><hr></blockquote>
It's the 1.8 GHz PPC970 that offers [estimated] performance similar to that of today's 2.8 GHz P4.
I'm not stating these things as a doom-and-gloom post, but I do think a healthy dose of reality is important. Despite the niceties of the PowerPC vector unit, and some excellent architectural features of the PPC970, it will still leave Apple lagging in terms of pure performance for the majority of applications.
It does leave Apple much closer to the competition than they are today, with a world-class design/fab partner. The PowerPC has been identified as the "first member of a new family" or somethng along those lines, and I have no doubt that family has a long and illustrious life ahead of it, especially as POWER5 and POWER6 technologies find their way in, and fabrication techniques are improved. Simply fabbing at 0.9 micron rather than the initial 0.13 will help in all sorts of ways.
Just keep in mind that evidence points to a conclusion that, on a per-chip basis, for non-vector-intensive operations, Apple systems released around in the PPC970 in 2H 2003 will likely be slower than the Intel/AMD systems shipping at the same time. But they'll have a good new foundation upon which to grow. What Apple and IBM do with that past that point remains to be seen.
It's the 1.8 GHz PPC970 that offers [estimated] performance similar to that of today's 2.8 GHz P4.
</strong><hr></blockquote>
It has been speculated that a 1GHz 970 was twice as fast as an equivalently clocked G4. Remember this was speculated. That being said, a 1.4GHz based on this speculation would lend one to believe it would perform equivalent to a 2.8GHz G4.
No one will know until the 970 ships and runs some actual software. But this is a rumor site, right, so speculate away.
By the way, I would suspect a 1.8GHz 970 with the bandwidth being bandied about may just keep up with a P IV at 3GHz. even with hyperthreading, in floating point and integer. And anything optimized for VMX will slobberknock it.
[[[Why the hell isn't it dusting the Pentium 4 in Lightwave benches? Most commentators agree that Altivec is a far superior form of SIMD unit than the Pentium 4's SIMD unit...]]]
Because AltiVec is only good for single precision (unless it was 256-bit). If you go back and search my threads from the past few months where I talk about the single/double precision dilemma and its advantages and disadvantages. Lightwave uses double-precision math so does POV-Ray. There is no time to post the discussion again. Just review my prior posts; especially the one hat talks about the G5 speculation. BTW, rumor has it that Apple engineers are looking into the POV-Ray code, benchmarks etc.
Or maybe there's something like a 990 that we don't know about yet.... after all, those in the know have made it fairly clear that the 970 is not an only child.
</strong><hr></blockquote>
IBM issued a statement about the 970 being the first in a family of PowerPC processors. It is easy to assume that they go up from here. Well, this ain't necessarily so. The family could also go down in performance, as well as up. So, just what is it that make this a family? Again, it is too easy to assume 64-bits, which also may not be true. I think this family is a PPC with SIMD and the new interface bus.
If Apple and IBM were working on this together, like Nintendo and IBM did, then the new bus fits in with whatever Apple has been working on. Some call it Apple PI. The concept was likely developed some time ago, and there may be a chip already existing that ties the new processor bus and Hypertransport together on the motherboard.
This may be wild thinking and technically flawed, but there may be a G4 replacement coming in the family. It would have lower performance and lower power than the 970, and be 32 bit. That would also make it cheaper, and with the new bus it would not have the performance limits, which the G4 has now. The new bus would also provide more consistency in motherboard designs. (Sorry is this got too far off topic.)
<strong>This may be wild thinking and technically flawed, but there may be a G4 replacement coming in the family. It would have lower performance and lower power than the 970, and be 32 bit. That would also make it cheaper, and with the new bus it would not have the performance limits, which the G4 has now. The new bus would also provide more consistency in motherboard designs. (Sorry is this got too far off topic.)</strong><hr></blockquote>
The question is: Why? The current G4s on .13 (or lower) still fit Mot's plans & would lower heat etc for the short term. And longer term - a die shrunk 970 at 1.2 GHz or so should reach laptop levels, yes? There's not that much room between the max G4 and the minimum 970, why stick another chip in there?
I don't think we'll see another POWER4-based chip at a lower performance point than the 1.2 GHz 970. We may see an IBM G3 + VMX. The role of such a chip would be to remove any dependancy on Motorola for any part of the PowerPC line. Will it happen? That probably depends on what Motorola does with their semiconductor division.
I think we will see bigger/faster 9xx chips, probably starting with a multi-core version. Features claimed for the POWER5 may also show up (multi-threading, in particular).
As said above the VMX unit is single-precision only and cannot be used to speed up SPECfp for that reason. With the right compiler SPECint could be sped up using VMX, but it probably wouldn't be a huge speed up since auto-vectorizing compilers typically aren't nearly as effective as hand-coded SIMD code. The 970 does well on SPECfp because of its high bandwidth and 2 FPUs.
The rumoured / desired 256-bit VMX extension doesn't necessarily have anything to do with double precision support. The 128-bit unit, for example, could add a "double pair" vector type. Or a 256-bit unit could not implement a double type, only offering "8 singles" and the various integer types. I don't believe we'll ever see a 256-bit vector unit, however.
The ones in bold are the only ones we know for sure. They were the only speeds directly quoted by IBM. The other speeds are extrapolated.</strong><hr></blockquote>
The PowerPC 970 is probably locked at 4x.
"Normal" Bus speeds: 533MHz, 666MHz, 800MHz.
PowerPC 970 (ApplePI?) Bus speed is 1 and 1/8th (for metadata) of "normal" speeds.
PowerPC 970 (ApplePI?) Bus speed is 1 and 1/8th (for metadata) of "normal" speeds.
600MHz, 750MHz, 900MHz. (All effective speeds)
1.2GHz, 1.5GHz, 1.8GHz.
All future speeds will be 2^n of these.
2.4GHz, 3.0GHz, 3.6GHz
4.8GHz, 6.0GHz, 7.2GHz
Barto</strong><hr></blockquote>
If it is locked at 4x how will this satisfy the need for Apple to have a processor that can scale to speeds beyond 1.8GHz? IBM has stated that the bus works at speeds of up to 900MHz. This would indicate that initially they are limited to a speed of 1.8GHz off the bat and I don't think they can scale their bus any faster at the moment. Although I see no problem in down scaling it (700MHz bus for a 1.4GHz part for example) they will have a harder time in upscaling it. It would make sense that they have flexible CPU/bus ratios. Do you know of any limitations with their bus that would prevent such a thing?
The 1.8GHz PPC970 offers performance similiar to that of todays 2.8GHz P4 in a highly synthetic benchmark, without using VMX. SPEC-benchmarks says very little about real-world performance. Just look at the G4 SPEC results. They're only at 1/3-1/6 of the P4, even in dual processor-config (I'm not too sure about the dual), and the real world performance is nowhere like that much of an embarrassment (in overall).
The hugely increased throughput of the PPC970 will also allow VMX to perform faster than in a G4, which gives it another, nice edge.
I'd like to see some P4 vs PPC970 benchmarks, where both are executing good SIMD code.
And the fact that Apple is very likely to use dual processor configurations does keep me from fearing a performance-lag next year (or when it'll be released)
[QB]I'd like to see some P4 vs PPC970 benchmarks, where both are executing good SIMD code./QB]<hr></blockquote>
Crunching RC5 keys make real use of AltiVec.And from the looks of it.. it does hardly use the x86-processors at all. 7455 is almost 6 times as fast as the P4 at the same Hz. You can also see that AltiVec performance scales lineraly between 7455 and 970, but RC5-crunching isn't very reliant on bandwidth if I remember correctly so the added bandwidth in 970 doesn't show here.
I was passed some info that I have a hard time putting together. It makes sense but I may be misconstruing it. Apparently the bus from the main controller to the CPU works on 2 bus ratios; one is fixed while the other is not. The one that is fixed is the 2:1 ratio that we keep hearing mentioned by IBM. the second was referred to as the "Multiplication Factor" (their words) and runs between 1-10 while mentioning that 8 is the Default. And the base speed of the bus is between 112.5 and 225MHz (their numbers exactly). And this part of the bus runs between the 2:1 interface of the CPU and the controller chip on the motherboard. The math adds up: 112.5 x 8 = 900, 900 x 2 =1800.
But what puzzles me is how do you get the bus to work at 8x speeds? I know the Pentium 4 quad pumps their bus and AGP 8x makes the 66MHz AGP bus work at theoretical 8x66 speeds but how does it work with non binary numbers such as 7 or 9 or 6?
Crunching RC5 keys make real use of AltiVec.And from the looks of it.. it does hardly use the x86-processors at all. 7455 is almost 6 times as fast as the P4 at the same Hz. You can also see that AltiVec performance scales lineraly between 7455 and 970, but RC5-crunching isn't very reliant on bandwidth if I remember correctly so the added bandwidth in 970 doesn't show here.
Yeah, I'm aware of that, and in a dual-config the PPC 970 mac should be 7(!) times faster than the single P4 @ 2.8, and this is really fantastic
But what I really meant, is benchmarks - P4 vs PPC970 SIMD where the code makes good use of the bandwidth. It should an enjoyable fight, but I guess it's awesomeness depends on whether the code is vmx-friendly like in RC5, or just vmx-compatible. There is a fat difference afaik
<strong>I was passed some info that I have a hard time putting together. It makes sense but I may be misconstruing it. Apparently the bus from the main controller to the CPU works on 2 bus ratios; one is fixed while the other is not. The one that is fixed is the 2:1 ratio that we keep hearing mentioned by IBM. the second was referred to as the "Multiplication Factor" (their words) and runs between 1-10 while mentioning that 8 is the Default. And the base speed of the bus is between 112.5 and 225MHz (their numbers exactly). And this part of the bus runs between the 2:1 interface of the CPU and the controller chip on the motherboard. The math adds up: 112.5 x 8 = 900, 900 x 2 =1800.
But what puzzles me is how do you get the bus to work at 8x speeds? I know the Pentium 4 quad pumps their bus and AGP 8x makes the 66MHz AGP bus work at theoretical 8x66 speeds but how does it work with non binary numbers such as 7 or 9 or 6?</strong><hr></blockquote>
<strong>I was passed some info that I have a hard time putting together. It makes sense but I may be misconstruing it. Apparently the bus from the main controller to the CPU works on 2 bus ratios; one is fixed while the other is not. The one that is fixed is the 2:1 ratio that we keep hearing mentioned by IBM. the second was referred to as the "Multiplication Factor" (their words) and runs between 1-10 while mentioning that 8 is the Default. And the base speed of the bus is between 112.5 and 225MHz (their numbers exactly). And this part of the bus runs between the 2:1 interface of the CPU and the controller chip on the motherboard. The math adds up: 112.5 x 8 = 900, 900 x 2 =1800.
But what puzzles me is how do you get the bus to work at 8x speeds? I know the Pentium 4 quad pumps their bus and AGP 8x makes the 66MHz AGP bus work at theoretical 8x66 speeds but how does it work with non binary numbers such as 7 or 9 or 6?</strong><hr></blockquote>
The PPC970's bus isn't octopumped, it's double pumped. The 8X must be a clock speed multiplier.
Comments
"BTW: I noticed that the 970's VMX unit isn't exactly compatible with the AltiVec unit... the difference is that is supports up to 8 hardware prefetch streams instead of the 4 supported by AltiVec. A subtle difference, and one that the application software won't really notice (although the OS code could take advantage of it a little). I wonder if there are other differences...?"
8 prefetch streams? Is that a subtle doubling of performance? Is it the same as fetching as twice as much data? Can it execute twice as much...? Is it Altivec+?
Can we speculate if this is independent of the 8 way superscalar execution for integer and fpu units? Or is VMX included in the 5 dispatch? Or...do we not know that yet?
If VMX hasn't been included in the Spec scores then a nice bonus to real world app performance is on the cards?
Lemon Bon Bon
Somewhat speculatively...
[ 10-22-2002: Message edited by: Lemon Bon Bon ]</p>
If VMX hasn't been included in the Spec scores then a nice bonus to real world app performance is on the cards?
<hr></blockquote>
Current Altivec only supports single-precision floating point, SPEC uses double precision -> Altivec can't be used for determining the SPEC scores.
Even if it can be used as an extra 2 FPUs in practice without too much pain.
Hmmm. Are you sure? If the G4 can have an 'extra 2 FPUs in practice' that would make 3 in total.
Why the hell isn't it dusting the Pentium 4 in Lightwave benches?
Most commentators agree that Altivec is a far superior form of SIMD unit than the Pentium 4's SIMD unit...
Lemon Bon Bon
So...you kind of answered my question. If spec scores don't take into account VMX, than the raw performance of the 970 is impressive if its minus altivec/VMX. Der-rool?
[ 10-22-2002: Message edited by: Lemon Bon Bon ]</p>
<strong>
A 1.4 low end may not sound that much but its offering the equivalent of a 2.8 gig G4, not to mention all the other goodies then...it'd be a nice 'low end' PowerMac.
</strong><hr></blockquote>
It's the 1.8 GHz PPC970 that offers [estimated] performance similar to that of today's 2.8 GHz P4.
Intel is <a href="http://news.com.com/2100-1001-962931.html?tag=fd_top_2"; target="_blank">releasing a hyperthreading 3-GHz P4 next month</a>.
I'm not stating these things as a doom-and-gloom post, but I do think a healthy dose of reality is important. Despite the niceties of the PowerPC vector unit, and some excellent architectural features of the PPC970, it will still leave Apple lagging in terms of pure performance for the majority of applications.
It does leave Apple much closer to the competition than they are today, with a world-class design/fab partner. The PowerPC has been identified as the "first member of a new family" or somethng along those lines, and I have no doubt that family has a long and illustrious life ahead of it, especially as POWER5 and POWER6 technologies find their way in, and fabrication techniques are improved. Simply fabbing at 0.9 micron rather than the initial 0.13 will help in all sorts of ways.
Just keep in mind that evidence points to a conclusion that, on a per-chip basis, for non-vector-intensive operations, Apple systems released around in the PPC970 in 2H 2003 will likely be slower than the Intel/AMD systems shipping at the same time. But they'll have a good new foundation upon which to grow. What Apple and IBM do with that past that point remains to be seen.
[edit: typo]
[ 10-22-2002: Message edited by: Zarafa ]</p>
<strong>
It's the 1.8 GHz PPC970 that offers [estimated] performance similar to that of today's 2.8 GHz P4.
</strong><hr></blockquote>
It has been speculated that a 1GHz 970 was twice as fast as an equivalently clocked G4. Remember this was speculated. That being said, a 1.4GHz based on this speculation would lend one to believe it would perform equivalent to a 2.8GHz G4.
No one will know until the 970 ships and runs some actual software. But this is a rumor site, right, so speculate away.
By the way, I would suspect a 1.8GHz 970 with the bandwidth being bandied about may just keep up with a P IV at 3GHz. even with hyperthreading, in floating point and integer. And anything optimized for VMX will slobberknock it.
[ 10-22-2002: Message edited by: rickag ]</p>
Because AltiVec is only good for single precision (unless it was 256-bit). If you go back and search my threads from the past few months where I talk about the single/double precision dilemma and its advantages and disadvantages. Lightwave uses double-precision math so does POV-Ray. There is no time to post the discussion again. Just review my prior posts; especially the one hat talks about the G5 speculation. BTW, rumor has it that Apple engineers are looking into the POV-Ray code, benchmarks etc.
--
Ed
;-)
--
Ed
<strong>
Or maybe there's something like a 990 that we don't know about yet.... after all, those in the know have made it fairly clear that the 970 is not an only child.
</strong><hr></blockquote>
IBM issued a statement about the 970 being the first in a family of PowerPC processors. It is easy to assume that they go up from here. Well, this ain't necessarily so. The family could also go down in performance, as well as up. So, just what is it that make this a family? Again, it is too easy to assume 64-bits, which also may not be true. I think this family is a PPC with SIMD and the new interface bus.
If Apple and IBM were working on this together, like Nintendo and IBM did, then the new bus fits in with whatever Apple has been working on. Some call it Apple PI. The concept was likely developed some time ago, and there may be a chip already existing that ties the new processor bus and Hypertransport together on the motherboard.
This may be wild thinking and technically flawed, but there may be a G4 replacement coming in the family. It would have lower performance and lower power than the 970, and be 32 bit. That would also make it cheaper, and with the new bus it would not have the performance limits, which the G4 has now. The new bus would also provide more consistency in motherboard designs. (Sorry is this got too far off topic.)
<strong>This may be wild thinking and technically flawed, but there may be a G4 replacement coming in the family. It would have lower performance and lower power than the 970, and be 32 bit. That would also make it cheaper, and with the new bus it would not have the performance limits, which the G4 has now. The new bus would also provide more consistency in motherboard designs. (Sorry is this got too far off topic.)</strong><hr></blockquote>
The question is: Why? The current G4s on .13 (or lower) still fit Mot's plans & would lower heat etc for the short term. And longer term - a die shrunk 970 at 1.2 GHz or so should reach laptop levels, yes? There's not that much room between the max G4 and the minimum 970, why stick another chip in there?
I think we will see bigger/faster 9xx chips, probably starting with a multi-core version. Features claimed for the POWER5 may also show up (multi-threading, in particular).
As said above the VMX unit is single-precision only and cannot be used to speed up SPECfp for that reason. With the right compiler SPECint could be sped up using VMX, but it probably wouldn't be a huge speed up since auto-vectorizing compilers typically aren't nearly as effective as hand-coded SIMD code. The 970 does well on SPECfp because of its high bandwidth and 2 FPUs.
The rumoured / desired 256-bit VMX extension doesn't necessarily have anything to do with double precision support. The 128-bit unit, for example, could add a "double pair" vector type. Or a 256-bit unit could not implement a double type, only offering "8 singles" and the various integer types. I don't believe we'll ever see a 256-bit vector unit, however.
<strong>My calculations:
800MHz DDR bus (400MHz x 2)
-----------------------
400 x 3 = 1200MHz
400 x 3.5 = 1400MHz
400 x 4 = 1600MHz
900MHz DDR bus (450MHz x 2)
-----------------------
450 x 4 = 1800MHz
450 x 4.5 = 2025MHz
450 x 5 = 2250MHz
450 x 5.5 = 2475MHz
The ones in bold are the only ones we know for sure. They were the only speeds directly quoted by IBM. The other speeds are extrapolated.</strong><hr></blockquote>
The PowerPC 970 is probably locked at 4x.
"Normal" Bus speeds: 533MHz, 666MHz, 800MHz.
PowerPC 970 (ApplePI?) Bus speed is 1 and 1/8th (for metadata) of "normal" speeds.
600MHz, 750MHz, 900MHz. (All effective speeds)
1.2GHz, 1.5GHz, 1.8GHz.
All future speeds will be 2^n of these.
2.4GHz, 3.0GHz, 3.6GHz
4.8GHz, 6.0GHz, 7.2GHz
Barto
<strong>
The PowerPC 970 is probably locked at 4x.
"Normal" Bus speeds: 533MHz, 666MHz, 800MHz.
PowerPC 970 (ApplePI?) Bus speed is 1 and 1/8th (for metadata) of "normal" speeds.
600MHz, 750MHz, 900MHz. (All effective speeds)
1.2GHz, 1.5GHz, 1.8GHz.
All future speeds will be 2^n of these.
2.4GHz, 3.0GHz, 3.6GHz
4.8GHz, 6.0GHz, 7.2GHz
Barto</strong><hr></blockquote>
If it is locked at 4x how will this satisfy the need for Apple to have a processor that can scale to speeds beyond 1.8GHz? IBM has stated that the bus works at speeds of up to 900MHz. This would indicate that initially they are limited to a speed of 1.8GHz off the bat and I don't think they can scale their bus any faster at the moment. Although I see no problem in down scaling it (700MHz bus for a 1.4GHz part for example) they will have a harder time in upscaling it. It would make sense that they have flexible CPU/bus ratios. Do you know of any limitations with their bus that would prevent such a thing?
<strong>
It's the 1.8 GHz PPC970 that offers [estimated] performance similar to that of today's 2.8 GHz P4.
Intel is <a href="http://news.com.com/2100-1001-962931.html?tag=fd_top_2"; target="_blank">releasing a hyperthreading 3-GHz P4 next month</a>.
</strong><hr></blockquote>
The 1.8GHz PPC970 offers performance similiar to that of todays 2.8GHz P4 in a highly synthetic benchmark, without using VMX. SPEC-benchmarks says very little about real-world performance. Just look at the G4 SPEC results. They're only at 1/3-1/6 of the P4, even in dual processor-config (I'm not too sure about the dual), and the real world performance is nowhere like that much of an embarrassment (in overall).
The hugely increased throughput of the PPC970 will also allow VMX to perform faster than in a G4, which gives it another, nice edge.
I'd like to see some P4 vs PPC970 benchmarks, where both are executing good SIMD code.
And the fact that Apple is very likely to use dual processor configurations does keep me from fearing a performance-lag next year (or when it'll be released)
[QB]I'd like to see some P4 vs PPC970 benchmarks, where both are executing good SIMD code./QB]<hr></blockquote>
Crunching RC5 keys make real use of AltiVec.And from the looks of it.. it does hardly use the x86-processors at all. 7455 is almost 6 times as fast as the P4 at the same Hz. You can also see that AltiVec performance scales lineraly between 7455 and 970, but RC5-crunching isn't very reliant on bandwidth if I remember correctly so the added bandwidth in 970 doesn't show here.
PPC 970 @ 1.8 GHz = 18 Mkeys/sec
MPC 7455 @ 1 GHz = 10 Mkeys/sec
Athlon XP @ 1.8 GHz = 8 Mkeys/sec
Pentium 4 @ 2.8 GHz = 5 Mkeys/sec
[ 10-23-2002: Message edited by: Henriok ]</p>
IBM has the 75_ series
and now the 97_ series of processors. What happened to the 86_ series?
But what puzzles me is how do you get the bus to work at 8x speeds? I know the Pentium 4 quad pumps their bus and AGP 8x makes the 66MHz AGP bus work at theoretical 8x66 speeds but how does it work with non binary numbers such as 7 or 9 or 6?
<strong>
Crunching RC5 keys make real use of AltiVec.And from the looks of it.. it does hardly use the x86-processors at all. 7455 is almost 6 times as fast as the P4 at the same Hz. You can also see that AltiVec performance scales lineraly between 7455 and 970, but RC5-crunching isn't very reliant on bandwidth if I remember correctly so the added bandwidth in 970 doesn't show here.
PPC 970 @ 1.8 GHz = 18 Mkeys/sec
MPC 7455 @ 1 GHz = 10 Mkeys/sec
Athlon XP @ 1.8 GHz = 8 Mkeys/sec
Pentium 4 @ 2.8 GHz = 5 Mkeys/sec
[ 10-23-2002: Message edited by: Henriok ]</strong><hr></blockquote>
Yeah, I'm aware of that, and in a dual-config the PPC 970 mac should be 7(!) times faster than the single P4 @ 2.8, and this is really fantastic
But what I really meant, is benchmarks - P4 vs PPC970 SIMD where the code makes good use of the bandwidth. It should an enjoyable fight, but I guess it's awesomeness depends on whether the code is vmx-friendly like in RC5, or just vmx-compatible. There is a fat difference afaik
[ 10-23-2002: Message edited by: r-0X#Zapchud ]</p>
<strong>Random thought
IBM has the 75_ series
and now the 97_ series of processors. What happened to the 86_ series?
There was a _86 series from IBM. The chips where called <a href="http://cpu-museum.de/?m=IBM&f=486"; target="_blank">Blue Lightning</a>.
Some claim a successor of this chip could be the future of Apple
<strong>I was passed some info that I have a hard time putting together. It makes sense but I may be misconstruing it. Apparently the bus from the main controller to the CPU works on 2 bus ratios; one is fixed while the other is not. The one that is fixed is the 2:1 ratio that we keep hearing mentioned by IBM. the second was referred to as the "Multiplication Factor" (their words) and runs between 1-10 while mentioning that 8 is the Default. And the base speed of the bus is between 112.5 and 225MHz (their numbers exactly). And this part of the bus runs between the 2:1 interface of the CPU and the controller chip on the motherboard. The math adds up: 112.5 x 8 = 900, 900 x 2 =1800.
But what puzzles me is how do you get the bus to work at 8x speeds? I know the Pentium 4 quad pumps their bus and AGP 8x makes the 66MHz AGP bus work at theoretical 8x66 speeds but how does it work with non binary numbers such as 7 or 9 or 6?</strong><hr></blockquote>
Sounds like this rumor about power saving:
<a href="http://www.powerpage.org/story.lasso?newsID=10087"; target="_blank">O'Grady Powerpage</a>
<strong>I was passed some info that I have a hard time putting together. It makes sense but I may be misconstruing it. Apparently the bus from the main controller to the CPU works on 2 bus ratios; one is fixed while the other is not. The one that is fixed is the 2:1 ratio that we keep hearing mentioned by IBM. the second was referred to as the "Multiplication Factor" (their words) and runs between 1-10 while mentioning that 8 is the Default. And the base speed of the bus is between 112.5 and 225MHz (their numbers exactly). And this part of the bus runs between the 2:1 interface of the CPU and the controller chip on the motherboard. The math adds up: 112.5 x 8 = 900, 900 x 2 =1800.
But what puzzles me is how do you get the bus to work at 8x speeds? I know the Pentium 4 quad pumps their bus and AGP 8x makes the 66MHz AGP bus work at theoretical 8x66 speeds but how does it work with non binary numbers such as 7 or 9 or 6?</strong><hr></blockquote>
The PPC970's bus isn't octopumped, it's double pumped. The 8X must be a clock speed multiplier.