So, what does all this get you for your 13W typical, 25W max? The chips are quoted as being >1000 SPECint per core and >2000SPECfp per core at 2GHz. This is a huge number, high end x86 cores score about 2000/2000 but consume around 10x the power. Add in all the other functionality and low board space requirements due to the integration, and you have a performance per watt monster.
If I understand well, the 25 W max refers to one chip (total of two cores), while the SPEC numbers are per core.
The SPECint and SPECfp tests aren't multithreaded so you can only test one core and the numbers they've listed aren't really going to be much to write home about when the processor is actually released in 2007. It'll be great for the embedded space but it isn't going to be keeping up with the current desktop or laptop chips of the time.
The really impressive stuff about this chip is the level of configurability and integration that it possesses and not its performance.
That SPECfp2k score must have been simulated with an infinitely perfect memory system, otherwise, I don't believe it.
2000 does seem like a bit of a stretch, but SPEC tends to be quite sensitive to the memory subsystem so big caches and low latency / high bandwidth memory have a big impact. Since these things are OOE and have a throughput of 1 double precision MADD per clock (plus 2 other instructions), this might be achieveable on real hardware.
2000 does seem like a bit of a stretch, but SPEC tends to be quite sensitive to the memory subsystem so big caches and low latency / high bandwidth memory have a big impact. Since these things are OOE and have a throughput of 1 double precision MADD per clock (plus 2 other instructions), this might be achieveable on real hardware.
I have to be skeptical about it for now. It only has the 1 FPU unit, and yeah I agree that it is really the dual DDR2-1066 memory buses that is spiking the SPECfp number. But real world with real memory implementations, I wouldn't be too sure.
IBM quotes SPECfp2k of 3000 for Power5+ at 1.9 GHz, so I think 2200 is maybe achieved with the right memory system (infinitely perfect?) with only 1 FPU, but that [Power5 like] memory system for embedded market? I wouldn't be too trusting of that. If IBM wanted to, they could crush this CPU by bringing fabbing the 970mp at 65 nm, the supposed 970mx, and adding a good memory system for it.
The big issue is of course the integer performance being abysmal, even by today's standards. It simply makes Apple's use of it non-starter.
I find their charts to be a bit facetious, since they measure what appears to be typical power disspation alongside (and combined with) maximum FPU output.
Nonetheless, this seems like a great chip for what it's designed for.
Update: PA Semi is the work of Dan Dobberpuhl, who has quite a good track record (StrongARM, for example). The EETimes I'm reading article has him claiming 2GHZ cores on a 65nm process next summer, achieving a TDP of 5W. I imagine these will be extremely popular in the telecom industry should they work as planned. Very Cool.
I remember the amazing exponantial power PC chip who never saw the light. Exponential never suceed to clock it at a sufficiant clock speed, and when this chip was ready for mass production , it was not much more powerfull than the moto or IBM counterparts, at least not enough more powerfull to justify the price of this beast.
The EETimes I'm reading article has him claiming 2GHZ cores on a 65nm process next summer, achieving a TDP of 5W.
This is from PA Semi's own website:
"The 1682M achieves this breakthrough with a ground-up design that optimizes power dissipation in all aspects of its novel system architecture, comprising an entire platform on a chip. P. A. Semi's patent-pending power-management scheme dynamically adjusts the 1682M's power dissipation to deliver the required performance. Typical power dissipation ranges from 5W in portable applications to 13W in high-performance applications that require 10Gb Ethernet interfacing; in power-saving modes, power dissipation drops to a low 1W (typical)."
"Typical power dissipation... 5W in portable applications"
Hmm... sounds like marketing doublespeak for a declocked processor in the 1 GHz range. The supposed 2 GHz TDP is somewhere in the 25 Watt range.
MDR Online says they have an American 65 nm fab lined up. So who could that be? Intel, IBM, AMD (but isn't there 65 nm in Germany?), or Texas Instruments? Who else could it be.
Quote:
I imagine these will be extremely popular in the telecom industry should they work as planned. Very Cool.
Possibly. But there is a lot of competition in telecom or embedded hardware. Where PA Semi looks to have the best chance is in computing clusters for FPU intensive applications.
Even there, there will be a lot of competition. 2 GHz Merom could be good competition. 970mx most definitely if IBM ever builds it. IBM can dominate computing clusters with the 970mx if they wanted too, but I'm sort of doubting they want to do it that way. 65 nm Opteron fore sure.
Exponential never suceed to clock it at a sufficiant clock speed, and when this chip was ready for mass production , it was not much more powerfull than the moto or IBM counterparts, at least not enough more powerfull to justify the price of this beast.
Exponential relied on bipolar CMOS manufacturing to get their clock rate. It was a horrible bet.
PA Semi is relying on an existing American company with a 65 nm fab using standard CMOS manufacturing. They can do what they are marketing for the most part.
However, their processors have no chance in the PC market until they increase their integer performance. It's not good.
Exponential relied on bipolar CMOS manufacturing to get their clock rate. It was a horrible bet.
PA Semi is relying on an existing American company with a 65 nm fab using standard CMOS manufacturing. They can do what they are marketing for the most part.
However, their processors have no chance in the PC market until they increase their integer performance. It's not good.
In the webcast from the MPF, Jim Keller talks about the design in more detail. From all the I/O they built in, it sounds like they never designed the chip with PCs/Macs in mind. An interesting point concerning the projected power requirements, the core itself should consume only 4 W typical, 7 W max, i.e. 14 W max. in the dual core configuration, which makes the I/O consume the remaining 11 W, which I am guessing includes the cache, since it's on a separate bus. Anyhow, what impresses me most apart from the very low power requirements for the cores are the massive I/O capabilities. Also, the 25 W max. include the 2-5 W the northbridge and southbridge of Intel systems consume, which never shows up in their processor power budget.
Amazing stuff. Unfortunately, all this doesn't belong in Future Hardware.
Anymore.
Sniff.
Oh well.
Despite it all, I'm looking forward to what Apple will do with the new power/processing budget the Intel procs will afford them - Here's to the Future Hardware!
Well you can cool a separate northbridge separately so why include it in the power budget for the processor?
Right! And it also makes the processor sound more power efficient!!!
Of course you are right, leaving the necessary accessory chips out of the processor budget makes sense, since they are not part of the processor. My comment was geared towards people who compare processor TDP and forget that some processors contain some or all of the I/O in their power budget while others don't. If you take that into account, the PA-Semi design really shines - anticipatedly, admittedly ... .
Especially in terms of e.g. a notebook system, looking at the power budget of the whole system including processor and I/O makes more sense to me. There of course, one leg can cool the processor while the other leg is for cooling the northbridge separately...
You're correct that system power is an issue, one of the reasons Centrino is so strong is because Intel reduced the power of the whole chipset as well as the processor. Thing is they release the TDP values for the sake of cooling design.
Comments
Originally posted by gc63hk
Check out this link
http://www.theinquirer.net/?article=27233
The architecture is impressive.
Just a quote from the article:
So, what does all this get you for your 13W typical, 25W max? The chips are quoted as being >1000 SPECint per core and >2000SPECfp per core at 2GHz. This is a huge number, high end x86 cores score about 2000/2000 but consume around 10x the power. Add in all the other functionality and low board space requirements due to the integration, and you have a performance per watt monster.
If I understand well, the 25 W max refers to one chip (total of two cores), while the SPEC numbers are per core.
The really impressive stuff about this chip is the level of configurability and integration that it possesses and not its performance.
Originally posted by THT
That SPECfp2k score must have been simulated with an infinitely perfect memory system, otherwise, I don't believe it.
2000 does seem like a bit of a stretch, but SPEC tends to be quite sensitive to the memory subsystem so big caches and low latency / high bandwidth memory have a big impact. Since these things are OOE and have a throughput of 1 double precision MADD per clock (plus 2 other instructions), this might be achieveable on real hardware.
The power figures are pretty amazing though.
Originally posted by Programmer
2000 does seem like a bit of a stretch, but SPEC tends to be quite sensitive to the memory subsystem so big caches and low latency / high bandwidth memory have a big impact. Since these things are OOE and have a throughput of 1 double precision MADD per clock (plus 2 other instructions), this might be achieveable on real hardware.
I have to be skeptical about it for now. It only has the 1 FPU unit, and yeah I agree that it is really the dual DDR2-1066 memory buses that is spiking the SPECfp number. But real world with real memory implementations, I wouldn't be too sure.
IBM quotes SPECfp2k of 3000 for Power5+ at 1.9 GHz, so I think 2200 is maybe achieved with the right memory system (infinitely perfect?) with only 1 FPU, but that [Power5 like] memory system for embedded market? I wouldn't be too trusting of that. If IBM wanted to, they could crush this CPU by bringing fabbing the 970mp at 65 nm, the supposed 970mx, and adding a good memory system for it.
The big issue is of course the integer performance being abysmal, even by today's standards. It simply makes Apple's use of it non-starter.
Nonetheless, this seems like a great chip for what it's designed for.
Apple was rumored to have invested in them even. We never saw squat.
This has an eerily similar feel.
EDIT: Dug up an old Byte Article
Originally posted by atomicham
Does this remind anyone else of the Exponential PowerPC chips? These were going to be 2-5x faster than anything MOT/IBM had at the time (604's).
Apple was rumored to have invested in them even. We never saw squat.
This has an eerily similar feel.
EDIT: Dug up an old Byte Article
Bingo you beat me to it !
I remember the amazing exponantial power PC chip who never saw the light. Exponential never suceed to clock it at a sufficiant clock speed, and when this chip was ready for mass production , it was not much more powerfull than the moto or IBM counterparts, at least not enough more powerfull to justify the price of this beast.
Originally posted by Splinemodel
The EETimes I'm reading article has him claiming 2GHZ cores on a 65nm process next summer, achieving a TDP of 5W.
This is from PA Semi's own website:
"The 1682M achieves this breakthrough with a ground-up design that optimizes power dissipation in all aspects of its novel system architecture, comprising an entire platform on a chip. P. A. Semi's patent-pending power-management scheme dynamically adjusts the 1682M's power dissipation to deliver the required performance. Typical power dissipation ranges from 5W in portable applications to 13W in high-performance applications that require 10Gb Ethernet interfacing; in power-saving modes, power dissipation drops to a low 1W (typical)."
"Typical power dissipation... 5W in portable applications"
Hmm... sounds like marketing doublespeak for a declocked processor in the 1 GHz range.
MDR Online says they have an American 65 nm fab lined up. So who could that be? Intel, IBM, AMD (but isn't there 65 nm in Germany?), or Texas Instruments? Who else could it be.
I imagine these will be extremely popular in the telecom industry should they work as planned. Very Cool.
Possibly. But there is a lot of competition in telecom or embedded hardware. Where PA Semi looks to have the best chance is in computing clusters for FPU intensive applications.
Even there, there will be a lot of competition. 2 GHz Merom could be good competition. 970mx most definitely if IBM ever builds it. IBM can dominate computing clusters with the 970mx if they wanted too, but I'm sort of doubting they want to do it that way. 65 nm Opteron fore sure.
So, there is no shortage of competition for them.
Originally posted by Powerdoc
Exponential never suceed to clock it at a sufficiant clock speed, and when this chip was ready for mass production , it was not much more powerfull than the moto or IBM counterparts, at least not enough more powerfull to justify the price of this beast.
Exponential relied on bipolar CMOS manufacturing to get their clock rate. It was a horrible bet.
PA Semi is relying on an existing American company with a 65 nm fab using standard CMOS manufacturing. They can do what they are marketing for the most part.
However, their processors have no chance in the PC market until they increase their integer performance. It's not good.
Originally posted by THT
However, their processors have no chance in the PC market until they increase their integer performance. It's not good.
In 2007 there will be no PowerPC PC market, so it doesn't really matter.
What I wonder is how the PWRficient compares to the Raza XLR.
Originally posted by THT
Exponential relied on bipolar CMOS manufacturing to get their clock rate. It was a horrible bet.
PA Semi is relying on an existing American company with a 65 nm fab using standard CMOS manufacturing. They can do what they are marketing for the most part.
However, their processors have no chance in the PC market until they increase their integer performance. It's not good.
In the webcast from the MPF, Jim Keller talks about the design in more detail. From all the I/O they built in, it sounds like they never designed the chip with PCs/Macs in mind. An interesting point concerning the projected power requirements, the core itself should consume only 4 W typical, 7 W max, i.e. 14 W max. in the dual core configuration, which makes the I/O consume the remaining 11 W, which I am guessing includes the cache, since it's on a separate bus. Anyhow, what impresses me most apart from the very low power requirements for the cores are the massive I/O capabilities. Also, the 25 W max. include the 2-5 W the northbridge and southbridge of Intel systems consume, which never shows up in their processor power budget.
Amazing stuff. Unfortunately, all this doesn't belong in Future Hardware.
Anymore.
Sniff.
Oh well.
Despite it all, I'm looking forward to what Apple will do with the new power/processing budget the Intel procs will afford them - Here's to the Future Hardware!
Originally posted by heinzel
Also, the 25 W max. include the 2-5 W the northbridge and southbridge of Intel systems consume, which never shows up in their processor power budget.
Well you can cool a separate northbridge separately so why include it in the power budget for the processor?
Originally posted by Telomar
Well you can cool a separate northbridge separately so why include it in the power budget for the processor?
Right! And it also makes the processor sound more power efficient!!!
Of course you are right, leaving the necessary accessory chips out of the processor budget makes sense, since they are not part of the processor. My comment was geared towards people who compare processor TDP and forget that some processors contain some or all of the I/O in their power budget while others don't. If you take that into account, the PA-Semi design really shines - anticipatedly, admittedly ... .
Especially in terms of e.g. a notebook system, looking at the power budget of the whole system including processor and I/O makes more sense to me. There of course, one leg can cool the processor while the other leg is for cooling the northbridge separately...