<strong>I have made a conversion from a Moterolla to a Pentium
Mot.*2.8=Pentium
Then agian me being new this may have already been posted</strong><hr></blockquote>
What is the point of this? What message are you trying to get across? CPU comparisons have been discussed in many other threads. In any case, your ratio is a complete fantasy.
What is the point of this? What message are you trying to get across? CPU comparisons have been discussed in many other threads. In any case, your ratio is a complete fantasy. </strong><hr></blockquote>
you must have done a lot of research to come up with that wonderful, unheard of conclusion. tell me, how did you derive that? what data did you use? how did you interpolate the data? and for what range of motorola processors does the constant multiplication variable, 2.8, hold to equal that of a pentium?
i'd really like to hear your data source for this.
then again, you being new year, did you really think we'd believe you right off the bat?
More realistically, though, what about this: Ignoring Altivec, other stuff like that and the rest of the computer, a vast generalization could be made that MHz and Pipeline length are the only two determining factors in processor performance. Since each stage in a pipeline takes one clock cycle to complete, you could say something like this:
G4 = 7 stages ÷ 800MHz = 7 ÷ 800,000,000 Hz = 0.00000000875 s = 8.75 x 10 ^ (-9) seconds per instruction = 8.75 seconds per billion instructions. Or, alternatively, 0.114 GigaFlops
P4 = 20 stages ÷ 2,000,000,000 Hz (2GHz) = 1 x 10 ^ (-8) seconds per instruction = 10 seconds per billion instructions. Or, 0.100 GigaFlops
Obviously, these figures are not accurate in the real world, but I wonder if they correlate to each other accurately, so,
Wow. Isn't that funny. I got 2.86. I didn't even think that I would get close to 2.8, but I thought It would be interesting to approach it from a different angle.
how can this be when you calculated 7/g4mhz to be .114 and the 20/p4mhz to be .100?
.114 is not equal to .100
but if we readjust your eqation to say
x*(7/g4mhz)=20/p4mhz
that should yield a direct connection to your "performance" comparo where the variable "x" indicates how many multiples is the g4 faster or slower
so, based on this, .114x=.100
where x therefore is .100/.114
thus, x=.877 so the g4 is not as bad as you'd put it: it's .887 times faster (thus a bit slower) than a p4 2ghz or, to put it another way, the 2ghz p4 is 1.14 times faster than a 800mhz g4
which is less than half of your calculation result.
now, bring in the 1ghz g4....then start the calculation over again (i'm too lazy to)
but... i digress, for this is purely theoretical and thus reflects very little actual performance facts as you stated. i just wanted to point that weird thing out
<strong>Now I remember, It was with the pipeline thing, pentiums have a 20 and ours have 7 20/7 is about 2.8</strong><hr></blockquote>So... your point would be?
More realistically, though, what about this: Ignoring Altivec, other stuff like that and the rest of the computer, a vast generalization could be made that MHz and Pipeline length are the only two determining factors in processor performance.<hr></blockquote>
No it can't.
Pipeline length contributes towards latency.
That's it.
Consider an idealized processor; it has an input (where it gets instructions and data) and it has an output (where it emits answers).
It consumes one unit of input per cycle, and excretes one unit of output per cycle. That is, it completes on operation per clock cycle.
Now pipeline the processor.
Wow.
It still completes on operation per clock cycle. It adds latency -- a clock cycle for each pipeline stage (with some provisos).
But it doesn't alter the raw number of instructions completed per cycle.
As long as it's spitting out one finished instruction per cycle, the pipeline length is immaterial.
[quote]Since each stage in a pipeline takes one clock cycle to complete, you could say something like this:<hr></blockquote>
Yeah, you could.
You'd have to be an apologist of Everyesque proportions to do so, and it would have no correlation to the real world, but I suppose, yeah, you could say something like this.
[quote]G4 = 7 stages ÷ 800MHz = 7 ÷ 800,000,000 Hz = 0.00000000875 s = 8.75 x 10 ^ (-9) seconds per instruction = 8.75 seconds per billion instructions. Or, alternatively, 0.114 GigaFlops<hr></blockquote>
Except on the right code mix the thing can retire >= 1 instruction per clock cycle. Just like every other processor made in the past, what, seven years?
[quote]P4 = 20 stages ÷ 2,000,000,000 Hz (2GHz) = 1 x 10 ^ (-8) seconds per instruction = 10 seconds per billion instructions. Or, 0.100 GigaFlops<hr></blockquote>
Or not, because it too can retire an instruction every clock cycle.
[quote]Obviously, these figures are not accurate in the real world, but I wonder if they correlate to each other accurately, so, <hr></blockquote>
Well, no, they don't. Because they have no basis in reality.
[quote]Wow. Isn't that funny. I got 2.86. I didn't even think that I would get close to 2.8, but I thought It would be interesting to approach it from a different angle.<hr></blockquote>
And 2.8 is magic... why? Doesn't take 2.8 GHz of P4 to cream a G4 at everything except for goddamn RC5.
Comments
<strong>I have made a conversion from a Moterolla to a Pentium
Mot.*2.8=Pentium
Then agian me being new this may have already been posted</strong><hr></blockquote>
What is the point of this? What message are you trying to get across? CPU comparisons have been discussed in many other threads. In any case, your ratio is a complete fantasy.
<strong>
What is the point of this? What message are you trying to get across? CPU comparisons have been discussed in many other threads. In any case, your ratio is a complete fantasy.
Hey, he's new here, cut him some slack.
i'd really like to hear your data source for this.
then again, you being new year, did you really think we'd believe you right off the bat?
Pentium > Mot. for all MHz, 0 < MHz. < 2400
[ 04-21-2002: Message edited by: crawlingparanoia ]</p>
G4 = 7 stages ÷ 800MHz = 7 ÷ 800,000,000 Hz = 0.00000000875 s = 8.75 x 10 ^ (-9) seconds per instruction = 8.75 seconds per billion instructions. Or, alternatively, 0.114 GigaFlops
P4 = 20 stages ÷ 2,000,000,000 Hz (2GHz) = 1 x 10 ^ (-8) seconds per instruction = 10 seconds per billion instructions. Or, 0.100 GigaFlops
Obviously, these figures are not accurate in the real world, but I wonder if they correlate to each other accurately, so,
7 ÷ G4 MHz = 20 ÷ P4 MHz
20/7 * G4 MHz = P4 MHz
2.86 * G4 MHz = P4 MHz :eek: :eek: <img src="graemlins/lol.gif" border="0" alt="[Laughing]" />
Wow. Isn't that funny. I got 2.86. I didn't even think that I would get close to 2.8, but I thought It would be interesting to approach it from a different angle.
Well, I guess that's where iJosbo235 got 2.8.
relax <img src="graemlins/smokin.gif" border="0" alt="[Chilling]" />
<strong>
Hey, he's new here, cut him some slack.</strong><hr></blockquote>
EmAn, do you want to check the math here, or should I?
(the " + " means add, right?) <img src="graemlins/lol.gif" border="0" alt="[Laughing]" />
Well if it wasn't for a bit of math, we'd all be homosexuals <img src="graemlins/smokin.gif" border="0" alt="[Chilling]" />
you used stages/mhz. odd, but ok..fine
but this is the thing:
for the g4, you calculated stages/mhz as .114
for the p4, you calculated it as .100
.114>.100
but in your next statement, you wrote
7/g4mhz=20/p4mhz.
how can this be when you calculated 7/g4mhz to be .114 and the 20/p4mhz to be .100?
.114 is not equal to .100
but if we readjust your eqation to say
x*(7/g4mhz)=20/p4mhz
that should yield a direct connection to your "performance" comparo where the variable "x" indicates how many multiples is the g4 faster or slower
so, based on this, .114x=.100
where x therefore is .100/.114
thus, x=.877 so the g4 is not as bad as you'd put it: it's .887 times faster (thus a bit slower) than a p4 2ghz or, to put it another way, the 2ghz p4 is 1.14 times faster than a 800mhz g4
which is less than half of your calculation result.
now, bring in the 1ghz g4....then start the calculation over again (i'm too lazy to)
but... i digress, for this is purely theoretical and thus reflects very little actual performance facts as you stated. i just wanted to point that weird thing out
I used the pic on this, It was a while ago but some how thats what I got
Now I remember, It was with the pipeline thing, pentiums have a 20 and ours have 7 20/7 is about 2.8
[ 04-24-2002: Message edited by: iJosbo235 ]</p>
<strong>Now I remember, It was with the pipeline thing, pentiums have a 20 and ours have 7 20/7 is about 2.8</strong><hr></blockquote>So... your point would be?
They don't. The accuracy of the content your post is so close to zero as to make no detectable or statistically significant difference from zero.
Oh wait, my mistake. You didn't spell anything incorrectly, and your grammar is above rebuke. There's your accuracy in a nutshell.
More realistically, though, what about this: Ignoring Altivec, other stuff like that and the rest of the computer, a vast generalization could be made that MHz and Pipeline length are the only two determining factors in processor performance.<hr></blockquote>
No it can't.
Pipeline length contributes towards latency.
That's it.
Consider an idealized processor; it has an input (where it gets instructions and data) and it has an output (where it emits answers).
It consumes one unit of input per cycle, and excretes one unit of output per cycle. That is, it completes on operation per clock cycle.
Now pipeline the processor.
Wow.
It still completes on operation per clock cycle. It adds latency -- a clock cycle for each pipeline stage (with some provisos).
But it doesn't alter the raw number of instructions completed per cycle.
As long as it's spitting out one finished instruction per cycle, the pipeline length is immaterial.
[quote]Since each stage in a pipeline takes one clock cycle to complete, you could say something like this:<hr></blockquote>
Yeah, you could.
You'd have to be an apologist of Everyesque proportions to do so, and it would have no correlation to the real world, but I suppose, yeah, you could say something like this.
[quote]G4 = 7 stages ÷ 800MHz = 7 ÷ 800,000,000 Hz = 0.00000000875 s = 8.75 x 10 ^ (-9) seconds per instruction = 8.75 seconds per billion instructions. Or, alternatively, 0.114 GigaFlops<hr></blockquote>
Except on the right code mix the thing can retire >= 1 instruction per clock cycle. Just like every other processor made in the past, what, seven years?
[quote]P4 = 20 stages ÷ 2,000,000,000 Hz (2GHz) = 1 x 10 ^ (-8) seconds per instruction = 10 seconds per billion instructions. Or, 0.100 GigaFlops<hr></blockquote>
Or not, because it too can retire an instruction every clock cycle.
[quote]Obviously, these figures are not accurate in the real world, but I wonder if they correlate to each other accurately, so, <hr></blockquote>
Well, no, they don't. Because they have no basis in reality.
[quote]Wow. Isn't that funny. I got 2.86. I didn't even think that I would get close to 2.8, but I thought It would be interesting to approach it from a different angle.<hr></blockquote>
And 2.8 is magic... why? Doesn't take 2.8 GHz of P4 to cream a G4 at everything except for goddamn RC5.
<strong>
And 2.8 is magic... why? Doesn't take 2.8 GHz of P4 to cream a G4 at everything except for goddamn RC5.</strong><hr></blockquote>
now if the resulting answer was, say... 42
then we might be looking at more curious questions
<cue marvin the paranoid android> <img src="graemlins/lol.gif" border="0" alt="[Laughing]" />