Intel announces new Xeon processors, demos quad-core chip
Presenting at its developer forum on Tuesday, Intel Corp. announced that it will ship three new dual-core processors for servers and workstations in 2006 and also gave developers their first public view of a running quad-core processor designed for dual-processor servers.
True to expectations, company vice president Pat Gelsinger announced that "Sossaman," an ultra?low?power server processor designed for server blades, storage devices and telecommunications equipment, will begin volume shipments next week. He also stated that "Dempsey" -- the first server processor based on the company's "Bensley" Xeon?based platform -- is on track to ship by the end of the month.
"2006 marks a year of transitions for Intel -- a transition to a new process technology and a powerful new microarchitecture, along with the delivery of new platforms solving tough problems for our customers," said Gelsinger. "This year we have a line?up of enterprise platforms and technologies that will inspire developers with opportunities and excite IT managers with critical capabilities to manage costs and run their business."
In the third quarter of 2006, Gelsinger said Intel will update the Bensley platform with "Woodcrest," a processor that will further reduce power consumption by 35 percent while delivering greater than 80 percent improvement in computing performance.
The Intel exec also gave developers their first public view of a running quad-core processor, codenamed "Clovertown," for dual?processor servers. This chip is socket -compatible with the Bensley platform and is slated to ship in early 2007. It will deliver increased processing capacity and is well?suited for multi?threaded applications, such as those used in databases, financial services and supply?chain management.
Additionally, Intel offered a glimpse at its next generation Virtualization Technology for enterprise servers. The technology, which the company began to ship with processors last year, helps IT organizations streamline their infrastructure, optimize utilization, reduce total costs and improve business agility.
The next generation of virtualization, Intel Virtualization for Directed I/O, will include I/O virtualization to assign I/O devices to virtual machines, providing a more robust, higher performance platform for virtualized systems, the company said.
True to expectations, company vice president Pat Gelsinger announced that "Sossaman," an ultra?low?power server processor designed for server blades, storage devices and telecommunications equipment, will begin volume shipments next week. He also stated that "Dempsey" -- the first server processor based on the company's "Bensley" Xeon?based platform -- is on track to ship by the end of the month.
"2006 marks a year of transitions for Intel -- a transition to a new process technology and a powerful new microarchitecture, along with the delivery of new platforms solving tough problems for our customers," said Gelsinger. "This year we have a line?up of enterprise platforms and technologies that will inspire developers with opportunities and excite IT managers with critical capabilities to manage costs and run their business."
In the third quarter of 2006, Gelsinger said Intel will update the Bensley platform with "Woodcrest," a processor that will further reduce power consumption by 35 percent while delivering greater than 80 percent improvement in computing performance.
The Intel exec also gave developers their first public view of a running quad-core processor, codenamed "Clovertown," for dual?processor servers. This chip is socket -compatible with the Bensley platform and is slated to ship in early 2007. It will deliver increased processing capacity and is well?suited for multi?threaded applications, such as those used in databases, financial services and supply?chain management.
Additionally, Intel offered a glimpse at its next generation Virtualization Technology for enterprise servers. The technology, which the company began to ship with processors last year, helps IT organizations streamline their infrastructure, optimize utilization, reduce total costs and improve business agility.
The next generation of virtualization, Intel Virtualization for Directed I/O, will include I/O virtualization to assign I/O devices to virtual machines, providing a more robust, higher performance platform for virtualized systems, the company said.
Comments
The performance levels are there, and the timeframe is as well. Conroe is a mid line chip, and has been moved back to the forth quarter, possibly October, while the Woodcrest has been moved forwards.
Apple's dev conf has been moved back two months this year. Possibly a coincidence, possibly not.
Originally posted by melgross
I still think that there is a good chance that Woodcrest will be used for the new Powermacs.
The performance levels are there, and the timeframe is as well. Conroe is a mid line chip, and has been moved back to the forth quarter, possibly October, while the Woodcrest has been moved forwards.
I too thought that Woodcrest was in. Isn't Woodcrest based on the Conroe design? The part that doesn't make sense is the more complex part coming out earlier.
Originally posted by hmurchison
Woodcrest is basically Conroe with SMP support and a larger L2 cache. There might be a few other tweaks but the two are closer than kissing cousins.
The significantly faster bus, better floating point.
Both designs are based on Merom.
Originally posted by melgross
The significantly faster bus, better floating point.
Both designs are based on Merom.
Wonder what nifty stuff they've done to improve the floating point. I guess I'll see a diagram soon enough. Woodcrest is also going to support DIB(Dual Independant Bus)
Originally posted by hmurchison
Wonder what nifty stuff they've done to improve the floating point. I guess I'll see a diagram soon enough. Woodcrest is also going to support DIB(Dual Independant Bus)
I forgot about that. Right.
A lot of press, because it's the mainline chip.
It does liik good. I'd like to see the analysis of Woodcrest get as detailed soon.
http://www.extremetech.com/article2/...1935727,00.asp
Originally posted by hmurchison
Wonder what nifty stuff they've done to improve the floating point. I guess I'll see a diagram soon enough. Woodcrest is also going to support DIB(Dual Independant Bus)
I thought every P6-based chip had DIB, I thought the second bus was the cache, Mac-heads might remember it as the back side cache bus. Is this a new DIB?