Heh. Should I mention I have a project starting to merge high level OO design methodologies with VHDL systems to provide one model from hardware on up?
Naw....
It's easy to deride the idea, but the point isn't to make one single programming model. The point is that parallelism isn't elegant in contemporary, high level software development paradigm. It is in programmable logic. While a compiler can fairly easily determine appropriate "weights" of processes by cross-listing variable usage, etc, it can't do a very good job at turning sequentially-rooted code into parallel code. Writing code to perform parallel operations -- and compiling it -- is much more elegantly done by implicit process sensitivity than it is by explicitly making function calls.
So ultimately what I envision -- and what I can't imagine not coming to the forefront -- is actually a more abstracted programming model than the current methods for parallel programming, such as the APIs and models used with the Cell.
I hope amd K8L can take back the lead in the other areas.
Yes and no.
Hypertransport owns. No question. But 1333MHz FSB is no child. The real issue doesn't come in 07, but in 08 for Intel. They don't move to CSI (their Hypertransport) until 2009. They can deal with a 1333 FSB with 4 cores, and 08 brings them the next generation microarchitecture, which will help further.
K8L isn't gonna bring AMD 20% clock-for-clock gains, which is what it now needs.
Hypertransport owns. No question. But 1333MHz FSB is no child. The real issue doesn't come in 07, but in 08 for Intel. They don't move to CSI (their Hypertransport) until 2009. They can deal with a 1333 FSB with 4 cores, and 08 brings them the next generation microarchitecture, which will help further.
K8L isn't gonna bring AMD 20% clock-for-clock gains, which is what it now needs.
K8L is as radical of a change as Intel's Netburst->Core transition. I think it could definetly be on par with Core, if not better. Unfortunately for AMD, Nehelem is coming right abound that time, and will smash K8L.
Hypertransport owns. No question. But 1333MHz FSB is no child. The real issue doesn't come in 07, but in 08 for Intel. They don't move to CSI (their Hypertransport) until 2009. They can deal with a 1333 FSB with 4 cores, and 08 brings them the next generation microarchitecture, which will help further.
K8L isn't gonna bring AMD 20% clock-for-clock gains, which is what it now needs.
Given the speedup in innovation between Intel and AMD, I expect to see CSI much sooner than 2009, maybe even as early as end of 2007 early 2008.
Given the speedup in innovation between Intel and AMD, I expect to see CSI much sooner than 2009, maybe even as early as end of 2007 early 2008.
I sure hope so, but I imagine the teams working on Core architecture and Nelhalm (or whatever) and CSI are different - hence the speed at which one progresses shouldn't be an indication of the speed of another.
I sure hope so, but I imagine the teams working on Core architecture and Nelhalm (or whatever) and CSI are different - hence the speed at which one progresses shouldn't be an indication of the speed of another.
I am eagerly waiting (after WWDC, its the next thing on my radar) for the Intel's Developer Conference in Sept to hear about future plans specially anything to do with CSI.
I hear that. That could start popping up on the rumor community radar (isn't there one of those in April too?)
But if I get a Mac Pro, it's with the assurance I won't buy another computer while in college, so no CSI for me no matter what :-( (ponders mobo swaps...)
I hear that. That could start popping up on the rumor community radar (isn't there one of those in April too?)
But if I get a Mac Pro, it's with the assurance I won't buy another computer while in college, so no CSI for me no matter what :-( (ponders mobo swaps...)
Yes, Intel's Developer Conference is twice a year. I follow these things just to keep track of what's going on in the industry.
I sure hope so, but I imagine the teams working on Core architecture and Nelhalm (or whatever) and CSI are different - hence the speed at which one progresses shouldn't be an indication of the speed of another.
also CSI is only going into the server chips at first so that will keep it out the desktop side even longer.
Which is fine, because it's the server chips that need them first (they'll be the first to go octo-core). Remember that Clovertown and Woodcrest ARE server chips.
Is it? [K8 -> K8L transition ~= Netburst -> ICM transition] I had understood it to be more evolutionary than revolutionary, at least from my (limited) reading somewhere.
It's evolutionary, if one can classify such things. ICM is basically an entirely different architecture from Netburst except for using the same FSB, while K8L is built on top of K8. The G4 -> G4+ may even be more of a change than K8 to K8L.
So far, all we know about K8L is revamped cache architecture (wider buses, more levels), 128 bit SIMD units, 4 DP FP ops (2 adds, 2 multiplies), and better memory prefetch. It apparently has the same number of ALUs, FPUs, and SIMD units. If there is more, AMD has said so yet.
Not that it will matter. When Apple starts making enterprise servers, maybe, but its doubtful they will go there.
I would say that, based on previous Intel offerings, Clovertown will, most likely, not be compatible with the current Mac Pro motherboards... and even if it will be (most likely later Mac Pro motherboard revisions), it will require a BIOS update which Apple may, or may not release.
Just look at the current crop of so called "Presler/ Conroe compatible" motherboards made during Pentium D era... most are not compatible except for the very recent board revisions. The same story was with Northwood/ Prescott CPUs, and the same story was with Coppermine/ Tualatin CPUs... I could go on here. So I would not get you hopes up just yet.
Hypertransport owns. No question. But 1333MHz FSB is no child. The real issue doesn't come in 07, but in 08 for Intel. They don't move to CSI (their Hypertransport) until 2009. They can deal with a 1333 FSB with 4 cores, and 08 brings them the next generation microarchitecture, which will help further.
Hypertransport didn't necessarily own, it was more the fact that Prescott turned out to be disaster.
Intel can stick with the 2S Bensley architecture for the next 3 years as long as they move to 1600 MHz FSB, and more importantly, add a snoop filter for the FSB. For 4S, they are moving to some sort of point-to-point connection, not CSI, with Tigerton/Clarksboro.
Frell, they can stick with FSB as long as they have a fat enough pipe. Go license some Rambus FlexIO tech (octo data rates!) and 1600 to 6400 MHz FSB rates could be used.
I would say that, based on previous Intel offerings, Clovertown will, most likely, not be compatible with the current Mac Pro motherboards... and even if it will be (most likely later Mac Pro motherboard revisions), it will require a BIOS update which Apple may, or may not release.
Intel explicitly went to it's server-buying customers and said "The new Xeon platform will work with the next three Xeon generations". And of those, Woodcrest is the second. Clovertown is two Woodcrests on an MCM, and Intel isn't releasing another platform for it. Beyond that, Intel promised some support through 2009, but that could be very limited.
As to the BIOS (technically now EFI) update - I'm sure some soul will pull it off. It's supposedly easier to add-on to EFI than BIOS (hence the E for "Extensible" in EFI). I mean, there's money in it for some upgrade company.
Intel explicitly went to it's server-buying customers and said "The new Xeon platform will work with the next three Xeon generations". .... As to the BIOS (technically now EFI) update - I'm sure some soul will pull it off. It's supposedly easier to add-on to EFI than BIOS (hence the E for "Extensible" in EFI). I mean, there's money in it for some upgrade company.
thanks for answers, Zach & others ? that's rlly gr8, lovin Intel by the day... \
Comments
Heh. Should I mention I have a project starting to merge high level OO design methodologies with VHDL systems to provide one model from hardware on up?
Naw....
It's easy to deride the idea, but the point isn't to make one single programming model. The point is that parallelism isn't elegant in contemporary, high level software development paradigm. It is in programmable logic. While a compiler can fairly easily determine appropriate "weights" of processes by cross-listing variable usage, etc, it can't do a very good job at turning sequentially-rooted code into parallel code. Writing code to perform parallel operations -- and compiling it -- is much more elegantly done by implicit process sensitivity than it is by explicitly making function calls.
So ultimately what I envision -- and what I can't imagine not coming to the forefront -- is actually a more abstracted programming model than the current methods for parallel programming, such as the APIs and models used with the Cell.
that is where AMD is way ahead of intel.
I hope amd K8L can take back the lead in the other areas.
Yes and no.
Hypertransport owns. No question. But 1333MHz FSB is no child. The real issue doesn't come in 07, but in 08 for Intel. They don't move to CSI (their Hypertransport) until 2009. They can deal with a 1333 FSB with 4 cores, and 08 brings them the next generation microarchitecture, which will help further.
K8L isn't gonna bring AMD 20% clock-for-clock gains, which is what it now needs.
Yes and no.
Hypertransport owns. No question. But 1333MHz FSB is no child. The real issue doesn't come in 07, but in 08 for Intel. They don't move to CSI (their Hypertransport) until 2009. They can deal with a 1333 FSB with 4 cores, and 08 brings them the next generation microarchitecture, which will help further.
K8L isn't gonna bring AMD 20% clock-for-clock gains, which is what it now needs.
K8L is as radical of a change as Intel's Netburst->Core transition. I think it could definetly be on par with Core, if not better. Unfortunately for AMD, Nehelem is coming right abound that time, and will smash K8L.
Yes and no.
Hypertransport owns. No question. But 1333MHz FSB is no child. The real issue doesn't come in 07, but in 08 for Intel. They don't move to CSI (their Hypertransport) until 2009. They can deal with a 1333 FSB with 4 cores, and 08 brings them the next generation microarchitecture, which will help further.
K8L isn't gonna bring AMD 20% clock-for-clock gains, which is what it now needs.
Given the speedup in innovation between Intel and AMD, I expect to see CSI much sooner than 2009, maybe even as early as end of 2007 early 2008.
Given the speedup in innovation between Intel and AMD, I expect to see CSI much sooner than 2009, maybe even as early as end of 2007 early 2008.
I sure hope so, but I imagine the teams working on Core architecture and Nelhalm (or whatever) and CSI are different - hence the speed at which one progresses shouldn't be an indication of the speed of another.
I sure hope so, but I imagine the teams working on Core architecture and Nelhalm (or whatever) and CSI are different - hence the speed at which one progresses shouldn't be an indication of the speed of another.
I am eagerly waiting (after WWDC, its the next thing on my radar) for the Intel's Developer Conference in Sept to hear about future plans specially anything to do with CSI.
But if I get a Mac Pro, it's with the assurance I won't buy another computer while in college, so no CSI for me no matter what :-( (ponders mobo swaps...)
I hear that. That could start popping up on the rumor community radar (isn't there one of those in April too?)
But if I get a Mac Pro, it's with the assurance I won't buy another computer while in college, so no CSI for me no matter what :-( (ponders mobo swaps...)
Yes, Intel's Developer Conference is twice a year. I follow these things just to keep track of what's going on in the industry.
I sure hope so, but I imagine the teams working on Core architecture and Nelhalm (or whatever) and CSI are different - hence the speed at which one progresses shouldn't be an indication of the speed of another.
also CSI is only going into the server chips at first so that will keep it out the desktop side even longer.
also CSI is only going into the server chips at first so that will keep it out the desktop side even longer.
CSI's already in teh Itanium iirc.
CSI's already in teh Itanium iirc.
There is no CSI implementation yet.
In contrast, the Mac Pro is all dual by choice, and Apple could have easily offered single CPU low and midrange systems without much criticism.
You misspelled "th shouts of joy!"
Is it? [K8 -> K8L transition ~= Netburst -> ICM transition] I had understood it to be more evolutionary than revolutionary, at least from my (limited) reading somewhere.
It's evolutionary, if one can classify such things. ICM is basically an entirely different architecture from Netburst except for using the same FSB, while K8L is built on top of K8. The G4 -> G4+ may even be more of a change than K8 to K8L.
So far, all we know about K8L is revamped cache architecture (wider buses, more levels), 128 bit SIMD units, 4 DP FP ops (2 adds, 2 multiplies), and better memory prefetch. It apparently has the same number of ALUs, FPUs, and SIMD units. If there is more, AMD has said so yet.
Not that it will matter. When Apple starts making enterprise servers, maybe, but its doubtful they will go there.
Just look at the current crop of so called "Presler/ Conroe compatible" motherboards made during Pentium D era... most are not compatible except for the very recent board revisions. The same story was with Northwood/ Prescott CPUs, and the same story was with Coppermine/ Tualatin CPUs... I could go on here. So I would not get you hopes up just yet.
Hypertransport owns. No question. But 1333MHz FSB is no child. The real issue doesn't come in 07, but in 08 for Intel. They don't move to CSI (their Hypertransport) until 2009. They can deal with a 1333 FSB with 4 cores, and 08 brings them the next generation microarchitecture, which will help further.
Hypertransport didn't necessarily own, it was more the fact that Prescott turned out to be disaster.
Intel can stick with the 2S Bensley architecture for the next 3 years as long as they move to 1600 MHz FSB, and more importantly, add a snoop filter for the FSB. For 4S, they are moving to some sort of point-to-point connection, not CSI, with Tigerton/Clarksboro.
Frell, they can stick with FSB as long as they have a fat enough pipe. Go license some Rambus FlexIO tech (octo data rates!) and 1600 to 6400 MHz FSB rates could be used.
I would say that, based on previous Intel offerings, Clovertown will, most likely, not be compatible with the current Mac Pro motherboards... and even if it will be (most likely later Mac Pro motherboard revisions), it will require a BIOS update which Apple may, or may not release.
Intel explicitly went to it's server-buying customers and said "The new Xeon platform will work with the next three Xeon generations". And of those, Woodcrest is the second. Clovertown is two Woodcrests on an MCM, and Intel isn't releasing another platform for it. Beyond that, Intel promised some support through 2009, but that could be very limited.
As to the BIOS (technically now EFI) update - I'm sure some soul will pull it off. It's supposedly easier to add-on to EFI than BIOS (hence the E for "Extensible" in EFI). I mean, there's money in it for some upgrade company.
Intel explicitly went to it's server-buying customers and said "The new Xeon platform will work with the next three Xeon generations". .... As to the BIOS (technically now EFI) update - I'm sure some soul will pull it off. It's supposedly easier to add-on to EFI than BIOS (hence the E for "Extensible" in EFI). I mean, there's money in it for some upgrade company.
thanks for answers, Zach & others ? that's rlly gr8, lovin Intel by the day...
wonder whether an EFI mod is necessary here?
Merom mini
http://www.xtremesystems.org/forums/...58#post1320183