mmicist

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mmicist
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  • Quote: Originally posted by moki I'm willing to bet you a PowerBook 970 that they don't appear this year. If I win, you buy me one. If I lose, you buy me one. Deal? moki, Isn't it remarkable that nobody reads the actual messages, too b…
  • Quote: Originally posted by Existence The current dual processor G4 machines Apple sells all used a shared bus topology. That means you have both G4's stuck sharing that 166MHz Mpx bus and 1.3GBps. No modern PC still uses shared bus topology. Int…
  • Quote: Originally posted by Outsider And remember that Hyper Transport can still be used on the motherboard even though it is not used to connect the processor top the companion chip. HT will probably be used as the connection between the compani…
    in Wwdc Comment by mmicist June 2003
  • Quote: Originally posted by alcimedes unless of course they're getting a fair number of chips that only sample at 1.2 Ghz which they don't want to put in towers. if every batch has a certain percentage that can only run at 1.2Ghz, you gotta pu…
  • Quote: Originally posted by alex_kac VPU Not exactly. VPU is the vector permute unit. Altivec is VPU + VR1 + VR2 + VFPU + VSIU + VCIU + VISU Edit: Zapchud just beat me to it. VR1 and VR2 are two copies of the vector register file. …
  • Quote: Originally posted by NETROMac I just have to say that I don't see the point of having 2 "low end" 1.2 ghz processors in the powerbooks. If they put the 1.8 ghz in it, it would have almost the same power, but with less heat and design probl…
  • Quote: Originally posted by Outsider Using embedded DRAM can be useful not only for it's low latency (the clock cycles used waiting for the fetch and retrieval to the DIMMS will be cut drastically creating a lower latency situation) but you can a…
  • Quote: Originally posted by THT Data to the PPC 970 cannot be any faster than the bandwidth of the processor bus. So, how does an inline L3 cache feed more than 6.4 GB/s to the PPC 970 when it's limited to 3.2 GB/s reads and 3.2 GB/s writes (…
  • Quote: Originally posted by Bigc The CPU is an ?LC circuit that has frequency, capacitance and inductance. The power useage is proportional to Voltage^2 and frequency. It's not like one wire having 300 amps going through it, there are many wires …
  • Quote: Originally posted by NETROMac For a more intelligible translation: Quote: Originally from MacBidouille [Rumour} More info. on the PPC 970 Here are some further exclusive runours about the PPC 970 motherboard. The source may be…
  • Quote: Originally posted by MartianMatt Sorry, you are right - PCI-express used to be 3GIO but it is a serial technology: "PCI Express is a new serial I/O technology compatible with the current PCI software environment" (from my first link above)…
  • Quote: Originally posted by MartianMatt "Standard" PCI (1.0?) is 33MHz and 32 bit giving 133 MB/s. There are also 66 MHz and 66MHz/64 bit PCI flavours giving 266MB/s and 533 MB/s respectively. Going to www.pcisig.org and checking the news pa…
  • Quote: Originally posted by kupan787 If the bus is only 200Mhz, that would be sad. It has the potential to be double that (450MHz real, 900 double pumped). Everyday these guys post more, I start to believe them less. I believe they mean the m…
  • Quote: Originally posted by kroehl quote: Originally posted by MartianMatt [irony alert] Unfortunately, that is the state our society is at. [/ia] You are IN a state - not at one. So that would be: 'Unfortunately, that is the …
  • Quote: Originally posted by cocoa tree Hi all, I was wondering, if you could use a 64 bit register to work simultaniously on 2 32 bit words. Today we don´t have single thread situations anymore. On the software side of things a lot works in "pa…
  • Quote: Originally posted by Gargoyle You scientists!!! You really need to make your minds up. Source: http://rel.intersil.com/docs/lexicon-old/M.html micron Older term for micrometer. A metric unit of linear measure which equals one milliont…
  • Quote: Originally posted by costique Anyone translate this to English, please! Translation of Macbidouille text, not my own thoughts. ---------------- Note, the following is not a rumour, just based on the premise that Apple will use th…
  • Quote: Originally posted by Programmer Instead of doing that I expect the memory controller to be run at half the processor speed. So what if bandwidth is a little lower on slower machines? It makes sense from a marketing and technical viewpoin…
  • The quoted speeds do make some sort of sense, taking rounding into account. If Apple have a memory controller than can cope with a 450 MHz maximum bus speed (900MHz effective due to DDR transmission), and the PPC970 can run it's bus at an integer…
  • Quote: Originally posted by BoeManE First, let me get things clear. Im NOT suggesting that the 970 have buildt in picoJava support. Im only sharing thoughts with you... Since Java is fast becomming the most popular programming language, the on…