If the article that rickag found is right, then wow. People will stop complaining.
If it is made up, then Apple will have a lot of whiners on their hands saying, "But the rumors I read were so much better!" I hope for the former but expect something in between with the results of the latter no matter what.
Apple, my stock is begging for you to release the former...
My intention was to put in one place all the rumors from MacOSRumors, The Register (Tony Smith), and Architosh. Also there is public stuff from Motorola and IBM in the chart. But there is no other info here at all, and as "Programmer" and "Outsider" point out, some of the data and my extrapolations from it are improbable. I'm merely a programmer, not a hardware guy, so what can you expect? The 128-wide FSB for G5 comes from MacOSRumors, I think (I have all their last years postings and The Register's too). 128-wide FSB for 7460 (full-Apollo, which like the new PowerMacs' 7455 is also 0.18um), I believe comes from Motorola's presentation and announcement of the chip at the Oct. 2001 Microprocessor Forum. (I don't have my documents handy, so I can't check these things just now.) My SPEC2000 numbers are based on various official sources, except for the G5..G7 numbers, which are based on MacOSRumors, Register, eWeek, and ChipGEEK.
SPEC2000 numbers for the G4 are based on Motorola's Drystone-figures, plus a bunch of my, perhaps dubious, assumptions, namely:
(1.) Drystone-21-MIPS and SPEC2000-int measure approximately the same thing, and
(2.) the scale factor between the two measures is 3:1, so 1,566 MIPS is the same integer-performance as SPEC2000int 520.
(3.) Another assumption (better than nothing) is that if a given chip model has a SPEC2000 score of 700 @ 1-GHz, the chip will have a score of 1400 at 2-GHz, i.e., linear clock-scaling. We all know things don't work this perfectly.
So you will see that the only value of the chart I have posted is to put together in one place all this data (from questionable sources), to make a few (questionable) extrapolations from it, and TO SERVE AS A REFERENCE POINT FOR DISCUSSION. I intend to update the chart as errors and unacceptable values are established.
Has anyone else noticed that the (very optimistic) G5 mole-reports, stemming from at least 2 people inside Motorola and two others inside Apple, that were the basis of EVERYTHING the two main rumor sites reported, suddenly went dead about Dec 5 last year? Were the moles found out and "dealt with", or did the people at MacOSRumors decide that they were being hood-winked? (Or did Apple threaten legal action???)
If it turns out that ALL of the MacOSRumors, Register, etc. G5 mole-reports are false, then that was one hell of a fraud! -- so much (plausible) data, all hanging together, going back for over a year, and from so many ostensibly independent sources, funneled, it is true, through the two rumor sites, but with what seemed like independent corroboration from others, e.g., knowledge of test machines, etc.... wow!!
I will say this, I have followed these forums for a while, I am not worried about being left behind, megahertz wise, my 450-G3 is plenty ( i am not in graphics or programming so my needs are simple). But, at the end of the day RISC will always, respectively. beat out CISC; CISC chip technology is hitting a wall. The G5 will be one hell of a chip, hopefully that manufacturing process will have been worked out so that there is a high yield.
By the way where is gEEK these day(?), he knows allot about this stuff?
[quote]Has anyone else noticed that the (very optimistic) G5 mole-reports, stemming from at least 2 people inside Motorola and two others inside Apple, that were the basis of EVERYTHING the two main rumor sites reported, suddenly went dead about Dec 5 last year? Were the moles found out and "dealt with", or did the people at MacOSRumors decide that they were being hood-winked? (Or did Apple threaten legal action???)
<hr></blockquote>
Don't forget that G5 rumors were also reported by Architosh. While MOSR and the Register haven't said anything about the G5 recently, Architosh reported that some G5 test mules were taken back by Apple and suggested that this would be consistent with a MWNY Powermac G5 release. So the rumors haven't stopped, they are just a bit less rampant.
I doubt that the "mole(s)" were found and silenced, more likely is that they simply don't have anything new to add. Perhaps since they were wrong about MWSF, MOSR and the Register refuse to believe any they say now. Or maybe the G5 project has suffered a setback. It's all speculation, but that's what makes it fun (and useless)!
I'm still optimistic about G5s at MWNY. The current towers are obviously stop-gap products, they remind me of the last iMac revision prior to the G4 iMac, where all the iMac got was a speed-bump. I'm positive that MWNY will bring us a new Powermac case and fully redesigned mobo, with ddr ram and a faster system bus, but whether it's a G5 or an Apollo is still unclear and probably will remain so until MWNY. Optimistic for a G5, but expecting no more than a 1.2 GHz G4. I don't think that shrinking the G4 process to 0.13 µM will result in more than a 20% gain in performance, that's why I'm saying 1.2 GHz.
That article is about an Itanium processor, which is not CISC and technically not RISC. Intel calls it EPIC, but really its just a very-long instruction word RISC chip... if you take RISC to mean "Recent Instruction Set Computer".
That article is about an Itanium processor, which is not CISC and technically not RISC. Intel calls it EPIC, but really its just a very-long instruction word RISC chip... if you take RISC to mean "Recent Instruction Set Computer".</strong><hr></blockquote>
The article is not very clear, but I think it says that the 5Ghz chip they will demo is not the McKinley, successor to the Itanium. Rather, it is a 32bit chip, which is probably the next generation of the P4.
CISC did hit a wall?4 years ago. The Pentium MMX series were the last true CISC processors from Intel. It never scaled beyond 300MHz. Today's modern x86 processors are RISC with a CISC interpretor slapped on.
<strong>I don't know about the Hammer, but from what I've seen a single 800Mhz G5 is quicker than a Dual Athlon (I think it was a dual 1.9 Ghz but I can't be sure).
The article is not very clear, but I think it says that the 5Ghz chip they will demo is not the McKinley, successor to the Itanium. Rather, it is a 32bit chip, which is probably the next generation of the P4.</strong><hr></blockquote>
You do realise that this magical everlasting CISC instructions get decoded into u-ops in the first few stages of the pipeline?
Comments
If it is made up, then Apple will have a lot of whiners on their hands saying, "But the rumors I read were so much better!" I hope for the former but expect something in between with the results of the latter no matter what.
Apple, my stock is begging for you to release the former...
porovaara
Smack-Fu Master, in training
Posted the link in Arstechnica's forums.
I just passed it along
The chart that "rickag" found was constructed by me.
<a href="http://www.bayarea.net/~kins/AboutMe/CPUs.html"; target="_blank">http://www.bayarea.net/~kins/AboutMe/CPUs.html</a>;
My intention was to put in one place all the rumors from MacOSRumors, The Register (Tony Smith), and Architosh. Also there is public stuff from Motorola and IBM in the chart. But there is no other info here at all, and as "Programmer" and "Outsider" point out, some of the data and my extrapolations from it are improbable. I'm merely a programmer, not a hardware guy, so what can you expect? The 128-wide FSB for G5 comes from MacOSRumors, I think (I have all their last years postings and The Register's too). 128-wide FSB for 7460 (full-Apollo, which like the new PowerMacs' 7455 is also 0.18um), I believe comes from Motorola's presentation and announcement of the chip at the Oct. 2001 Microprocessor Forum. (I don't have my documents handy, so I can't check these things just now.) My SPEC2000 numbers are based on various official sources, except for the G5..G7 numbers, which are based on MacOSRumors, Register, eWeek, and ChipGEEK.
SPEC2000 numbers for the G4 are based on Motorola's Drystone-figures, plus a bunch of my, perhaps dubious, assumptions, namely:
(1.) Drystone-21-MIPS and SPEC2000-int measure approximately the same thing, and
(2.) the scale factor between the two measures is 3:1, so 1,566 MIPS is the same integer-performance as SPEC2000int 520.
(3.) Another assumption (better than nothing) is that if a given chip model has a SPEC2000 score of 700 @ 1-GHz, the chip will have a score of 1400 at 2-GHz, i.e., linear clock-scaling. We all know things don't work this perfectly.
So you will see that the only value of the chart I have posted is to put together in one place all this data (from questionable sources), to make a few (questionable) extrapolations from it, and TO SERVE AS A REFERENCE POINT FOR DISCUSSION. I intend to update the chart as errors and unacceptable values are established.
..................................................
Has anyone else noticed that the (very optimistic) G5 mole-reports, stemming from at least 2 people inside Motorola and two others inside Apple, that were the basis of EVERYTHING the two main rumor sites reported, suddenly went dead about Dec 5 last year? Were the moles found out and "dealt with", or did the people at MacOSRumors decide that they were being hood-winked? (Or did Apple threaten legal action???)
If it turns out that ALL of the MacOSRumors, Register, etc. G5 mole-reports are false, then that was one hell of a fraud! -- so much (plausible) data, all hanging together, going back for over a year, and from so many ostensibly independent sources, funneled, it is true, through the two rumor sites, but with what seemed like independent corroboration from others, e.g., knowledge of test machines, etc.... wow!!
KINS COLLINS
But the G5 looks like it's going to be one expensive chip ($700 for 1.6Ghz)
Thank you for all the clarifications.
I'm hoping for a G5 in July2002, expecting it in Dec2002/Jan2003.
By the way where is gEEK these day(?), he knows allot about this stuff?
[quote]Has anyone else noticed that the (very optimistic) G5 mole-reports, stemming from at least 2 people inside Motorola and two others inside Apple, that were the basis of EVERYTHING the two main rumor sites reported, suddenly went dead about Dec 5 last year? Were the moles found out and "dealt with", or did the people at MacOSRumors decide that they were being hood-winked? (Or did Apple threaten legal action???)
<hr></blockquote>
Don't forget that G5 rumors were also reported by Architosh. While MOSR and the Register haven't said anything about the G5 recently, Architosh reported that some G5 test mules were taken back by Apple and suggested that this would be consistent with a MWNY Powermac G5 release. So the rumors haven't stopped, they are just a bit less rampant.
I doubt that the "mole(s)" were found and silenced, more likely is that they simply don't have anything new to add. Perhaps since they were wrong about MWSF, MOSR and the Register refuse to believe any they say now. Or maybe the G5 project has suffered a setback. It's all speculation, but that's what makes it fun (and useless)!
I'm still optimistic about G5s at MWNY. The current towers are obviously stop-gap products, they remind me of the last iMac revision prior to the G4 iMac, where all the iMac got was a speed-bump. I'm positive that MWNY will bring us a new Powermac case and fully redesigned mobo, with ddr ram and a faster system bus, but whether it's a G5 or an Apollo is still unclear and probably will remain so until MWNY. Optimistic for a G5, but expecting no more than a 1.2 GHz G4. I don't think that shrinking the G4 process to 0.13 µM will result in more than a 20% gain in performance, that's why I'm saying 1.2 GHz.
<img src="graemlins/smokin.gif" border="0" alt="[Chilling]" />
<strong>CISC chip technology is hitting a wall.</strong><hr></blockquote>
Not quite. Take a look here: <a href="http://www.theinquirer.net/04020212.htm"; target="_blank">http://www.theinquirer.net/04020212.htm</A>;
Reports of the imminent death of CISC chips are greatly exaggerated.
<img src="graemlins/oyvey.gif" border="0" alt="[No]" />
<strong>
Not quite. Take a look here: <a href="http://www.theinquirer.net/04020212.htm"; target="_blank">http://www.theinquirer.net/04020212.htm</a>;
Reports of the imminent death of CISC chips are greatly exaggerated.
<img src="graemlins/oyvey.gif" border="0" alt="[No]" /> </strong><hr></blockquote>
That article is about an Itanium processor, which is not CISC and technically not RISC. Intel calls it EPIC, but really its just a very-long instruction word RISC chip... if you take RISC to mean "Recent Instruction Set Computer".
<strong>
That article is about an Itanium processor, which is not CISC and technically not RISC. Intel calls it EPIC, but really its just a very-long instruction word RISC chip... if you take RISC to mean "Recent Instruction Set Computer".</strong><hr></blockquote>
The article is not very clear, but I think it says that the 5Ghz chip they will demo is not the McKinley, successor to the Itanium. Rather, it is a 32bit chip, which is probably the next generation of the P4.
ago. The Pentium MMX series were the last true CISC processors from Intel.
It never scaled beyond 300MHz. Today's modern x86 processors are RISC with
a CISC interpretor slapped on.</strong><hr></blockquote>
I seem to recall that the 386, rather than the Pentium, was the last
iteration of the x86 sans any translation layer (can't be bothered
searching Google right now). I also recall that the Pentium finished at
233 MHz (nitpick
<strong>I don't know about the Hammer, but from what I've seen a single 800Mhz G5 is quicker than a Dual Athlon (I think it was a dual 1.9 Ghz but I can't be sure).
[ 02-02-2002: Message edited by: philbot ]</strong><hr></blockquote>
<groan>
how on earth can you compare two chips, neither of which are in production yet?
<strong>
I seem to recall that the 386, rather than the Pentium, was the last
iteration of the x86 sans any translation layer </strong><hr></blockquote>
Since the 486 was basically just a 386 + 387 + 8kb (?) L1 cache, it's a more likely candidate for the "last true CISC chip from Intel" award.
Bye,
RazzFazz
<strong>
The article is not very clear, but I think it says that the 5Ghz chip they will demo is not the McKinley, successor to the Itanium. Rather, it is a 32bit chip, which is probably the next generation of the P4.</strong><hr></blockquote>
You do realise that this magical everlasting CISC instructions get decoded into u-ops in the first few stages of the pipeline?
<strong>
I also recall that the Pentium finished at
233 MHz (nitpick
Actually, mobile low-power versions reached 300MHz (nitpick