Not that I like defending Intel, or especially RAMBus, but the new 850 chipset will be dual channel... so double the above number. The new P4's FSB is 133 MHz quad pumped and 64-bits wide, so it can actually leverage the high bandwidth... 4 times as much as the current G4 MPX bus.
If the "next G4"/G5 rumours are right, however, bringing the memory controller onto the CPU could make a big improvement. Without knowing the details of the memory interface we can't predict its performance -- i.e. how many bits wide, what clock rate, how many channels, single/double/quad pumped, and just the overall efficiency of the memory controller implementation (likely to be pretty good at 1+ GHz!).
The stuff in the P4s of today is 800 Mhz dual channel RDRAM, and it is 16 bits wide.
That makes (800x16x2)/8= 3200 MB/s which fits in very nicely with the quad pumped (4x100) 64 bit front side bus of the P4 as (400x64)/8 also equals 3200 MB/s
The new Pentium 4s that are due out soon have a 133 Mhz quad pumped bus which improves their bandwidth to 4266 MB/s which will also syncronise with the new 1066 Mhz dual channel RDRAM that provides exactly the same bandwidth.
Since when does the writing style substitute for technical accuracy/merit? Without any real knowledge of the subject or insight the prettiest prose isn't worth much more than the paper it's written on.
[quote]Not that I like defending Intel, or especially RAMBus, but the new 850 chipset will be dual channel... so double the above number. The new P4's FSB is 133 MHz quad pumped and 64-bits wide, so it can actually leverage the high bandwidth... 4 times as much as the current G4 MPX bus.
<hr></blockquote>
I'm with Programmer, i'm not a big fan of Intel or Rambus for various reasons but 1066MHz Rambus is not that bad of a technology and benchmarks have shown that Pentium 4 processors running on a 533MHz FSB with this memory receive quite a boost in performance indeed. According to tests at Tomshardwareguide.com in fact a 2.6GHz P4 with 1066RDRAM outperforms a 3.0GHz P4 with DDR. So for a bandwidth sensitive product like the P4 Rambus is not that bad of a technology.
Additionally is should be noted that 32bit RIMM modules are now available from Samsung and others which would again double your bandwidth numbers.
<strong>Not that I like defending Intel, or especially RAMBus, but the new 850 chipset will be dual channel... so double the above number. The new P4's FSB is 133 MHz quad pumped and 64-bits wide, so it can actually leverage the high bandwidth... 4 times as much as the current G4 MPX bus.</strong><hr></blockquote>
[quote]Originally posted by timortis:
<strong>Wrongo!
The stuff in the P4s of today is 800 Mhz dual channel RDRAM, and it is 16 bits wide.
That makes (800x16x2)/8= 3200 MB/s which fits in very nicely with the quad pumped (4x100) 64 bit front side bus of the P4 as (400x64)/8 also equals 3200 MB/s</strong><hr></blockquote>
[quote]Originally posted by Eskimo:
<strong>I'm with Programmer, i'm not a big fan of Intel or Rambus for various reasons but 1066MHz Rambus is not that bad of a technology and benchmarks have shown that Pentium 4 processors running on a 533MHz FSB with this memory receive quite a boost in performance indeed. According to tests at Tomshardwareguide.com in fact a 2.6GHz P4 with 1066RDRAM outperforms a 3.0GHz P4 with DDR. So for a bandwidth sensitive product like the P4 Rambus is not that bad of a technology.</strong><hr></blockquote>
<strong>The new Pentium 4s that are due out soon have a 133 Mhz quad pumped bus which improves their bandwidth to 4266 MB/s which will also syncronise with the new 1066 Mhz dual channel RDRAM that provides exactly the same bandwidth.</strong><hr></blockquote>
[quote]Originally posted by Eskimo:
<strong>Additionally is should be noted that 32bit RIMM modules are now available from Samsung and others which would again double your bandwidth numbers.</strong><hr></blockquote>
So. you wanna cobble together some standards eh? well here's a real jury-rigged mess:
<strong>So there, Mackido sucks by the way...</strong><hr></blockquote>
[quote]Originally posted by Eskimo:
<strong>Since when does the writing style substitute for technical accuracy/merit? Without any real knowledge of the subject or insight the prettiest prose isn't worth much more than the paper it's written on.</strong><hr></blockquote>
Except I can't see so much as one technical inaccuracy in the piece. all that's wrong with it is that it's old.
MacKiDo rocks.
[quote]Originally posted by Programmer:
<strong>If the "next G4"/G5 rumours are right, however, bringing the memory controller onto the CPU could make a big improvement. Without knowing the details of the memory interface we can't predict its performance -- i.e. how many bits wide, what clock rate, how many channels, single/double/quad pumped, and just the overall efficiency of the memory controller implementation (likely to be pretty good at 1+ GHz!).</strong><hr></blockquote>
This is the important part. like I said. DDR still whups Intels hide. the question is whether or not the G5 can use the correct varieties. it looks like it's just 64-bit 333Mhz single channel DDR SDRAM. as I don't know of any 128-bit or 256-bit DDR that runs at 333Mhz. and I don't recall any rumors about the G5 having multiple memory channels. though I honestly don't know. as all <a href="http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=MPC8540&nodeId=01M98655"; target="_blank">Motorola's page</a> says is 333Mhz DDR. although. some chipsets labeled as 333Mhz DDR <a href="http://www.sharkyextreme.com/hardware/motherboards/article.php/10703_999491__2"; target="_blank">also support the weird 400Mhz DDR</a>. so even if I'm right. there's still a chance the G5 will beat the Rambus equipped Pentiums.
As for the chip's I/O capacity. we needn't worry. as Motorola is using a 16GBps total interconnect fabric for the PPC 8540's on-chip communications. which is more than any kind of RAM likely to ever appear during the chip's lifetime.
Comments
<strong>16-bitsx1066Mhz=17056Mbps÷8=2132MBps</strong><hr></blockquote>
Not that I like defending Intel, or especially RAMBus, but the new 850 chipset will be dual channel... so double the above number. The new P4's FSB is 133 MHz quad pumped and 64-bits wide, so it can actually leverage the high bandwidth... 4 times as much as the current G4 MPX bus.
If the "next G4"/G5 rumours are right, however, bringing the memory controller onto the CPU could make a big improvement. Without knowing the details of the memory interface we can't predict its performance -- i.e. how many bits wide, what clock rate, how many channels, single/double/quad pumped, and just the overall efficiency of the memory controller implementation (likely to be pretty good at 1+ GHz!).
<strong>
* RDRAM 1066(The stuff in the P4s of today):
16-bitsx1066Mhz=17056Mbps÷8=2132MBps
*
</strong><hr></blockquote>
Wrongo!
The stuff in the P4s of today is 800 Mhz dual channel RDRAM, and it is 16 bits wide.
That makes (800x16x2)/8= 3200 MB/s which fits in very nicely with the quad pumped (4x100) 64 bit front side bus of the P4 as (400x64)/8 also equals 3200 MB/s
The new Pentium 4s that are due out soon have a 133 Mhz quad pumped bus which improves their bandwidth to 4266 MB/s which will also syncronise with the new 1066 Mhz dual channel RDRAM that provides exactly the same bandwidth.
So there, Mackido sucks by the way...
[ 04-17-2002: Message edited by: timortis ]</p>
<strong>
So there, Mackido sucks by the way...
</strong><hr></blockquote>
Why do you say Mackido sucks? The technical articles seem fairly well written.
[ 04-17-2002: Message edited by: sc_markt ]</p>
<strong>
Why do you say Mackido sucks? The technical articles seem fairly well written.
[ 04-17-2002: Message edited by: sc_markt ]</strong><hr></blockquote>
Since when does the writing style substitute for technical accuracy/merit? Without any real knowledge of the subject or insight the prettiest prose isn't worth much more than the paper it's written on.
[quote]Not that I like defending Intel, or especially RAMBus, but the new 850 chipset will be dual channel... so double the above number. The new P4's FSB is 133 MHz quad pumped and 64-bits wide, so it can actually leverage the high bandwidth... 4 times as much as the current G4 MPX bus.
<hr></blockquote>
I'm with Programmer, i'm not a big fan of Intel or Rambus for various reasons but 1066MHz Rambus is not that bad of a technology and benchmarks have shown that Pentium 4 processors running on a 533MHz FSB with this memory receive quite a boost in performance indeed. According to tests at Tomshardwareguide.com in fact a 2.6GHz P4 with 1066RDRAM outperforms a 3.0GHz P4 with DDR. So for a bandwidth sensitive product like the P4 Rambus is not that bad of a technology.
Additionally is should be noted that 32bit RIMM modules are now available from Samsung and others which would again double your bandwidth numbers.
<strong>Not that I like defending Intel, or especially RAMBus, but the new 850 chipset will be dual channel... so double the above number. The new P4's FSB is 133 MHz quad pumped and 64-bits wide, so it can actually leverage the high bandwidth... 4 times as much as the current G4 MPX bus.</strong><hr></blockquote>
[quote]Originally posted by timortis:
<strong>Wrongo!
The stuff in the P4s of today is 800 Mhz dual channel RDRAM, and it is 16 bits wide.
That makes (800x16x2)/8= 3200 MB/s which fits in very nicely with the quad pumped (4x100) 64 bit front side bus of the P4 as (400x64)/8 also equals 3200 MB/s</strong><hr></blockquote>
[quote]Originally posted by Eskimo:
<strong>I'm with Programmer, i'm not a big fan of Intel or Rambus for various reasons but 1066MHz Rambus is not that bad of a technology and benchmarks have shown that Pentium 4 processors running on a 533MHz FSB with this memory receive quite a boost in performance indeed. According to tests at Tomshardwareguide.com in fact a 2.6GHz P4 with 1066RDRAM outperforms a 3.0GHz P4 with DDR. So for a bandwidth sensitive product like the P4 Rambus is not that bad of a technology.</strong><hr></blockquote>
You're right. I didn't know Intel had a dual channel Rambus RAM bus. but Intel still hasn't brought Rambus past DDR yet. as they themselves make a <a href="http://www.anandtech.com/chipsets/showdoc.html?i=1588&p=3"; target="_blank">dual channel 64-bit 200Mhz DDR chipset</a> which performs at 3.2GBps, nVidia makes a <a href="http://www.nvidia.com/docs/lo/49/SUPP/nForce_TwinBank_Memory_Architecture_Tech_Brief.pdf " target="_blank">single channel 128-bit 133Mhz chipset</a> which performs at 4.2GBps. also Samsung and Micron have brought out a <a href="http://www.micron.com/products/category.jsp?path=/DRAM/DDR+SDRAM&ct=hp.pl"; target="_blank">weird 64-bit 400Mhz DDR DIMM</a> that's <a href="http://www.ebnonline.com/story/OEG20020326S0020"; target="_blank">not supported by JEDEC</a> which performs at 3.2GBps on a single channel chipset and 6.4GBps on a dual channel chipset.
[quote]Originally posted by timortis:
<strong>The new Pentium 4s that are due out soon have a 133 Mhz quad pumped bus which improves their bandwidth to 4266 MB/s which will also syncronise with the new 1066 Mhz dual channel RDRAM that provides exactly the same bandwidth.</strong><hr></blockquote>
[quote]Originally posted by Eskimo:
<strong>Additionally is should be noted that 32bit RIMM modules are now available from Samsung and others which would again double your bandwidth numbers.</strong><hr></blockquote>
So. you wanna cobble together some standards eh? well here's a real jury-rigged mess:
128-bitsx400Mhz=51200MbpsÖ8=6400MBpsx2(Dual bus)=12800GBps
[quote]Originally posted by timortis:
<strong>So there, Mackido sucks by the way...</strong><hr></blockquote>
[quote]Originally posted by Eskimo:
<strong>Since when does the writing style substitute for technical accuracy/merit? Without any real knowledge of the subject or insight the prettiest prose isn't worth much more than the paper it's written on.</strong><hr></blockquote>
Except I can't see so much as one technical inaccuracy in the piece. all that's wrong with it is that it's old.
MacKiDo rocks.
[quote]Originally posted by Programmer:
<strong>If the "next G4"/G5 rumours are right, however, bringing the memory controller onto the CPU could make a big improvement. Without knowing the details of the memory interface we can't predict its performance -- i.e. how many bits wide, what clock rate, how many channels, single/double/quad pumped, and just the overall efficiency of the memory controller implementation (likely to be pretty good at 1+ GHz!).</strong><hr></blockquote>
This is the important part. like I said. DDR still whups Intels hide. the question is whether or not the G5 can use the correct varieties. it looks like it's just 64-bit 333Mhz single channel DDR SDRAM. as I don't know of any 128-bit or 256-bit DDR that runs at 333Mhz. and I don't recall any rumors about the G5 having multiple memory channels. though I honestly don't know. as all <a href="http://e-www.motorola.com/webapp/sps/site/prod_summary.jsp?code=MPC8540&nodeId=01M98655"; target="_blank">Motorola's page</a> says is 333Mhz DDR. although. some chipsets labeled as 333Mhz DDR <a href="http://www.sharkyextreme.com/hardware/motherboards/article.php/10703_999491__2"; target="_blank">also support the weird 400Mhz DDR</a>. so even if I'm right. there's still a chance the G5 will beat the Rambus equipped Pentiums.
As for the chip's I/O capacity. we needn't worry. as Motorola is using a 16GBps total interconnect fabric for the PPC 8540's on-chip communications. which is more than any kind of RAM likely to ever appear during the chip's lifetime.
\t\t\t\t\t Eric,
[ 04-18-2002: Message edited by: Eric D.V.H ]
[ 04-18-2002: Message edited by: Eric D.V.H ]
[ 04-18-2002: Message edited by: Eric D.V.H ]</p>
Post that on ArsTechnica's Battlefront, or something to that effect.
The long and the short of DKE is that he's a ****ing moron, and an arrogant bull-headed one at that.