Just vote: Which Scenario?

Posted:
in Future Apple Hardware edited January 2014
Scenario 1: No PowerMac update at MWNY



Scenario 2: Updated PowerMac G4 (Quicksilver)

Dual 1.2GHz G4s (7455)

2MB L3 cache per processor

133MHz MPX

no DDR



Scenario 3: New PowerMac G4 (Quicksilver)

Dual 1.25GHz G4s (7460)

4MB L3 cache per processor

166MHz MPX

DDR



Scenario 4: New PowerMac G4 (Trinity II)

Dual 1.5GHz G4s (7470)

4MB L3 cache per processor

RapidIO

DDR



Scenario 5: PowerMac G5 (Trinity II)

Dual 1.6GHz G5s (7500)

4MB L3 cache per processor

RapidIO

DDR



Scenario 6: None of these
«13

Comments

  • Reply 1 of 43
    leonisleonis Posts: 3,427member
    PPC 7460 is the cacheless chip so you may have to forget about this option
  • Reply 2 of 43
    lucaluca Posts: 3,833member
    2 or 3. I'd love to see 4 or 5 but I think we'll be at a DDR setup similar to the Xserve's, with a boost in bus speed to make up for the increased processor speed. Thing is, consumers don't know or care about bus speed, but the pro clients that buy PowerMac G4s (sometimes in large volumes) do. That's a very important market for Apple, because they still have a lot of strength in the graphics fields. I'm sure with scenario 4 or 5, they'd do much better, but 3 seems like a major update, and 2 seems incremental. And considering the past year, we need more than an incremental boost to the PowerMac.



    So if you're keeping track, my vote's on 3.
  • Reply 3 of 43
    kecksykecksy Posts: 1,002member
    [quote]Originally posted by Leonis:

    <strong>PPC 7460 is the cacheless chip so you may have to forget about this option</strong><hr></blockquote>



    The 7460 hasn't been announced yet, so how do you know this?



    Whatever, if the 7460 turns out to be cacheless, then put 7465 in parentheses instead of 7460.





    Oops, forgot to vote myself...



    3 also.



    [ 06-28-2002: Message edited by: Kecksy ]</p>
  • Reply 4 of 43
    andersanders Posts: 6,523member
    2. Think evolution.
  • Reply 5 of 43
    g::mastag::masta Posts: 121member
    4, but i want a BTO option of moki's quantum proc!
  • Reply 6 of 43
    bartobarto Posts: 2,246member
    IMHO, 3. Definatly 3, IMHO.



    Although, I wouldn't use "7460", as no-one knows what Motorola would call a 166MHz MPX G4. G4 w/166MHz MPX might have been better to use.



    Barto
  • Reply 7 of 43
    jwdawsojwdawso Posts: 355member
    3 (though Imy heart says 4....)
  • Reply 8 of 43
    I take Nr 3.

    RapidIO is to early and it would have been in the Xserve.

    A speed bump of 200 Mhz/6 months is correct but not for mac fanatics.

    DDR is for sure.

    New case - I don't think so.



    Now Steve, you could surprise me.
  • Reply 9 of 43
    blackcatblackcat Posts: 697member
    I'm going for 4.



    But it should be pointed out you don't need huge L3 if you have true DDR. I'm sure both would be nice, but the current fashion of huge L3 caches is to offset the slow bus.
  • Reply 10 of 43
    snofsnof Posts: 98member
    My vote is 2.

    Apple is great at dissapointing us. Based on the hype for MWSF this year they should be hyping by now if we're going to see 4 or 5 .



    2 or 3 are the most likely, but I can wish for 4. I won't even bother hoping for 5, save myself from the huge emotional letdown that kind of optimism would lead to.



    Edit #1: making thoughts coherent.

    Edit #2: making spelling understandable (maybe I shouldn't be posting at 4 in the morning.)

    [ 06-28-2002: Message edited by: Snof ]



    [ 06-28-2002: Message edited by: Snof ]</p>
  • Reply 11 of 43
    spotbugspotbug Posts: 361member
    We'll get no more than scenario 3. Probably a tad less.
  • Reply 12 of 43
    5 <img src="graemlins/smokin.gif" border="0" alt="[Chilling]" />



    NOw remember to laud me as a rumor warrior poet when they come at NY (hey a man's gotta dream)
  • Reply 13 of 43
    zosozoso Posts: 177member
    My take is on No. 3--but I don't think we're going to see such a huge L3 cache. I'd say 2MB at most... But I'd add a possible case redesign--Xserve-like? Who knows... Certainly a brand-new case will at least visually give us the sensation that the guys at Apple are really making the effort, even if under the hood the story's quite different...



    ZoSo
  • Reply 14 of 43
    I'd have to go with option 3. I think it'll be a slight alteration of 3 though. Maybe to include Rapid I/O.
  • Reply 15 of 43
    My vote is for Scenario 3, with a sleek new design, and I don't even have a clue what DDR actually IS, but I know you guys really want it, so I'll defer to your unbridled experience.
  • Reply 16 of 43
    Slight improvements to the tune of 2x1.2 GHz, the bastard DDR of Xserve, and gobs and gobs of Jagwire. My dark horse: a slightly faster Powerbook (733/867).



    Maybe a new iThing and iApp. Lot's of talk about 3rd party software dvelopers being fully on board.



    MWNY is shaping up to be a software extravaganza.



    Jet
  • Reply 17 of 43
    nebagakidnebagakid Posts: 2,692member
    3 or 4
  • Reply 18 of 43
    leonisleonis Posts: 3,427member
    [quote]Originally posted by Kecksy:

    <strong>



    The 7460 hasn't been announced yet, so how do you know this?

    </strong><hr></blockquote>



    There is an article in MacCentral. Someone in Motorola explains about the future G4s. 7460, 7470....and 7500
  • Reply 19 of 43
    [quote]Originally posted by Leonis:

    <strong>



    There is an article in MacCentral. Someone in Motorola explains about the future G4s. 7460, 7470....and 7500</strong><hr></blockquote>



    got a link?



    ting5
  • Reply 20 of 43
    kecksykecksy Posts: 1,002member
    [quote]Originally posted by Blackcat:

    <strong>I'm going for 4.



    But it should be pointed out you don't need huge L3 if you have true DDR. I'm sure both would be nice, but the current fashion of huge L3 caches is to offset the slow bus.</strong><hr></blockquote>



    Even with "true" DDR, an L3 cache would help performance because it would still offer greater bandwidth and lower latencies.
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