Portents for Spring 2003

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  • Reply 41 of 50
    murkmurk Posts: 935member
    A month or so ago, a great AI prophet made a comment about disappointment in August, good news coming in October, and our dreams coming true sometime next year. I?m paraphrasing, of course, but does anyone remember who said this? What was the exact quote? The statement predicted the IBM announcement. Whoever it was, please come forth and accept the god-like status you are due. Hell, maybe I said it.
  • Reply 42 of 50
    programmerprogrammer Posts: 3,458member
    [quote]Originally posted by Yevgeny:

    <strong>Would Moto take this long to redesign the G4 for a bus that has been out for some time?</strong><hr></blockquote>



    I really don't know what you meant by this ... what bus has been out for some time? The 166 MHz MPX is brand new. Do you mean some fictional DDR version of MPX? Such a thing might not even be possible on a fast shared bus like MPX -- the x86 guys do it by not sharing their FSB. Since Moto wants MPX to be a shared bus for most of their customers, we're not going to see a significantly changed version of it.



    The rumoured 7500 may never materialize -- perhaps it is the cancelled G5? In this case today's bus is all we're going to get until the IBM machine arrives... and then we'll go from 1 GB/sec to &gt;6 GB/sec in one fell swoop. Memory probably won't be able to keep up (for a little while anyhow). Whether Moto brings the 7500 to market will depend on whether their other customers want a RapidIO G4. Even if they deliver, will Apple use it? If IBM's chip isn't going to be RapidIO then it might not be worth Apple's time to use RapidIO for a mere 6 months. If IBM will go RapidIO with this processor (and they are saying they are committed to it for their embedded chips) then Apple would likely use next year before the IBM chip arrives. This would let them use the same chipset in the high and low end machines.
  • Reply 43 of 50
    [quote]Originally posted by Programmer:

    <strong>

    If IBM will go RapidIO with this processor (and they are saying they are committed to it for their embedded chips) then Apple would likely use next year before the IBM chip arrives. This would let them use the same chipset in the high and low end machines.</strong><hr></blockquote>



    Well, the 6.4GB/s sounds like HT, not RIO, and HT seems to have better support outside of the embedded arena with ATI, nVidia, and Apple there. Marvell is in there as well, so a lot of Apple's main players are on board.
  • Reply 44 of 50
    [quote]Originally posted by murk:

    <strong> Whoever it was, please come forth and accept the god-like status you are due. </strong><hr></blockquote>



    I think it was Dorsal, whom many were ripping on, yet so far everything has come to pass. The evolving MB is fine with me, at least it shows that Apple knows where they are going to take the PowerMac for awhile. The release in Jan was scary - it meant that a new system was coming, so don't buy this one or it mant that Apple was clueless about where they were headed for the next few iterations. I believe the latter was true and yesterday's release shows that at least they have a roadmap again.



    Next year is going to be a wild one - and I just ordered an xServe to be ready for it
  • Reply 45 of 50
    yevgenyyevgeny Posts: 1,148member
    [quote]Originally posted by Programmer:

    <strong>



    I really don't know what you meant by this ... what bus has been out for some time? The 166 MHz MPX is brand new. Do you mean some fictional DDR version of MPX?</strong><hr></blockquote>



    I mean that Moto has been dragging their feet at making a G4 with a DDR frontside bus. I don't think that such a beast is coming out anytime soon, unless IBM's new chip is coming out in something like two years (ok, moto may still not be coming out with a new chip if IBM is late and we may be stuck with a 166MHz MPX bus, but I'm hoping).



    [quote]Originally posted by Programmer:

    <strong>

    The rumoured 7500 may never materialize -- perhaps it is the cancelled G5? In this case today's bus is all we're going to get until the IBM machine arrives... and then we'll go from 1 GB/sec to &gt;6 GB/sec in one fell swoop.</strong><hr></blockquote>



    My point exactly. I think that yesterday's bus is all we are going to get until IBM's new chip. I don't see Apple making yesterday's bus, an interm SDRAM bus (using a new G4 with a more modern FSB), AND a new motherboard for the IBM chip, all within the timespan of a year. I can't see Apple making three pro motherboards.



    Perhaps the processor daughtercard in the current machines can be swapped out for a card with a more modern G4 (with a faster FSB), but this still depends on Moto making a new chip which I doubt they would do if Apple was going to go with IBM.



    All my posts can be reduced to this: if IBM's chip is due out in about a year, then we are going to have the current XServe stule bus until IBM comes out with something. That's my opinion.
  • Reply 46 of 50
    matsumatsu Posts: 6,558member
    But the memory bus is controlled independently, we don't for certain if this bus can talk to daughtercards over a variety of protocols or not. It could be a case of 1 MoBo and three different daughtercards! Mebbe, again I know nothing and this is probably wrong, but I'm just putting it out there anyway.
  • Reply 47 of 50
    outsideroutsider Posts: 6,008member
    This is a new chipset Apple is using. Is there any information on it as of yet? Perhaps it does support a DDR bus using the same traces that MPX uses but at start up the north bridge senses the processor and either switches to MPX (64bit, SDR mode, 133 or 166MHz) or SomethingElse(tm) (64bit, DDR mode, 133 or 166MHz) or SuperSomethingElse(tm) (64bit, QDR mode, 166MHz).



    What if with the next processor they use, be it IBM or someone else, the memory controller in on die or simply on the daughter card, and it access the memory slots directly. It can still access the northbridge controller for access to Ethernet controller/ Firewire/ PCI/ IDE/ etc. but the memory controller is essentially turned off.



    [ 08-14-2002: Message edited by: Outsider ]</p>
  • Reply 48 of 50
    yevgenyyevgeny Posts: 1,148member
    [quote]Originally posted by Matsu:

    <strong>But the memory bus is controlled independently, we don't for certain if this bus can talk to daughtercards over a variety of protocols or not. It could be a case of 1 MoBo and three different daughtercards! Mebbe, again I know nothing and this is probably wrong, but I'm just putting it out there anyway.</strong><hr></blockquote>



    That would be sweet if it was the case, and IF Moto had a G4 in the pipe with a real FSB (a big if in my mind). Of course, such chips would be brand new, probably only available through Apple, and cost quite a bit. Remember how expensive the processor upgrade cards were for the 7500, 8500, and 9500? Still, this would be a pretty good solution. (plus when Apple goes with IBM's chips for the high end, the market would be flooded and you could pick up a cheap Newer upgrade card).



    I am curious to see what IBM says about any bus that their chip will use. It sounds like HT, which would seem to indicate a new motherboard. I'm hoping for a new motherboard for IBM's chip because 333MHz is going to seem a bit dated in a year.
  • Reply 49 of 50
    tabootaboo Posts: 128member
    Totally off topic, I know, but.....



    Has anyone seen any "meet the design team" articles on the recent (say, the last 2 years) hardware. I'm especially interested in the xServe contributers.



    Apologies all, but I've become curious about the hardware backgrounds of the R&D teams at Apple. ie did they come from other companies, or homegrown, what did they work on before, etc.
  • Reply 50 of 50
    nevynnevyn Posts: 360member
    [quote]Originally posted by Outsider:

    <strong>This is a new chipset Apple is using. Is there any information on it as of yet? Perhaps it does support a DDR bus using the same traces that MPX uses but at start up the north bridge senses the processor and either switches to MPX (64bit, SDR mode, 133 or 166MHz) or SomethingElse(tm) (64bit, DDR mode, 133 or 166MHz) or SuperSomethingElse(tm) (64bit, QDR mode, 166MHz).



    What if with the next processor they use, be it IBM or someone else, the memory controller in on die or simply on the daughter card, and it access the memory slots directly. It can still access the northbridge controller for access to Ethernet controller/ Firewire/ PCI/ IDE/ etc. but the memory controller is essentially turned off.



    [ 08-14-2002: Message edited by: Outsider ]</strong><hr></blockquote>



    The answer is: we have no idea. It's clearly a new northbridge, but Apple did the design internally (I assume). For all we know it accepts Hypertransport already. It isn't like most other consumer/prosumer level stuff where you can peek at the innards and say 'gosh, that's a xxxyyy chipset' and know what's going on.
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