Motorola? not dead yet?

murkmurk
Posted:
in Future Apple Hardware edited January 2014
[quote]Motorola asserts that its partnership with two other chipmakers will probably be the first to produce a new generation of semiconductors, beating Intel by at least six months.



Earlier this week, Motorola, STMicroelectronics and Philips jointly unveiled a design for chips based on 90-nanometer circuitry, compared with the current 130-nanometer standard. Thinner circuitry makes each separate chip cheaper to produce, faster and more energy-efficient.



Chris Belden, vice president of Motorola's chip products sector, said the alliance would start production of a high-performance version of the 90-nanometer chips by the fourth quarter of this year and a lower-performing version in the third quarter of 2003.



<hr></blockquote>



[ 10-10-2002: Message edited by: murk ]</p>
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Comments

  • Reply 1 of 69
    hmurchisonhmurchison Posts: 12,425member
    Stick a fork in Moto...they're washed up.
  • Reply 2 of 69
    blablablabla Posts: 185member
    From the link:



    "Belden also said the alliance would start production of a high-performance chip by the fourth quarter of this year and a lower performing version in the third quarter of 2003. "



    what "high-performance" chips (other than the G4.. not really high-performance but) do Motorola, STMicroelectronics and Philips make?



    At 0.09 micron, wouldnt a G4 clock up to ~1.8Ghz or maybe even more?
  • Reply 3 of 69
    amorphamorph Posts: 7,112member
    [quote]Originally posted by blabla:

    <strong>

    At 0.09 micron, wouldnt a G4 clock up to ~1.8Ghz or maybe even more?</strong><hr></blockquote>



    I think 0.09 micron would vault it over 2GHz once the process matured.



    [ 08-30-2002: Message edited by: Amorph ]</p>
  • Reply 3 of 69
    brussellbrussell Posts: 9,812member
    Good catch, murk.



    You know Steve loves to be first. Even if it is something esoteric like .09µ chip fabbing. Could be good news for the G4.



    I found this line funny: [quote]Early this week, Motorola, STMicroelectronics and Philips jointly unveiled a design platform to build chips based on 90-nanometer circuitry, versus the current 130-nanometer standard.<hr></blockquote>The "current 130-nanometer standard?" Maybe for other chip makers, but not Motorola.



    Anyway, this is wild and absurd speculation, but what about this for 2003:

    1. New .09µ G4s in the PowerBook, iMac, and eMac, and

    2. miniPower4 in the PowerMac.
  • Reply 5 of 69
    amorphamorph Posts: 7,112member
    Actually, Mot's been running a .13 micron fab for months now. They just haven't moved the G4 onto it. Now we know why.
  • Reply 6 of 69
    matsumatsu Posts: 6,558member
    Oh god do they ever need a smaller process. SOI kept them from being a total technological embarrasment, but everyone (save the GPU guys) can fab .13u except Mot (well they can, but not for Mac users). Intel will be moving to a .09u fab next year, let's hope Moto can too.



    A .09u G4 could be a good thing (with SOI and copper), even .13 would take them near enough to 2Ghz. Hmmm... A G4 that is a quarter the size of current chips. That could be very good news for clock speeds and power consumption, they might even be able to jack the FSB controller up a bit, to 200Mhz (heck IBM managed it on a .13u chip).



    Perhaps all hope is not lost.



    Steve, you'll get my money when you produce something that deserves it.
  • Reply 7 of 69
    outsideroutsider Posts: 6,008member
    Yay, a 2GHz G4 with a 166MHz SDR MPX bus. Joy.
  • Reply 8 of 69
    vmxvmx Posts: 10member
    [quote]Originally posted by blabla:

    <strong>

    At 0.09 micron, wouldnt a G4 clock up to ~1.8Ghz or maybe even more?

    </strong><hr></blockquote>



    [quote]Originally posted by Amorph:

    <strong>



    I think 0.09 micron would vault it over 2GHz once the process matured.



    [ 08-30-2002: Message edited by: Amorph ]</strong><hr></blockquote>



    Amorph, are you really squabbling over a 10% difference of projected performance on a processor that hasn't been designed in a process that hasn't been defined? Wouldn't anything less than 25-50% be noise?
  • Reply 9 of 69
    murkmurk Posts: 935member
    Remember Steve's statement about having options in the future? He supposedly added: ?But right now, you know, between Motorola and IBM, the roadmap looks pretty decent.?
  • Reply 10 of 69
    blablablabla Posts: 185member
    vmx: Actually, I asked a question



    And, as ususal we are only speculating here. This is FH after all <img src="graemlins/smokin.gif" border="0" alt="[Chilling]" />
  • Reply 11 of 69
    leonisleonis Posts: 3,427member
    Whatever happens it's still good to have more than one cpu supplier.
  • Reply 12 of 69
    amorphamorph Posts: 7,112member
    [quote]Originally posted by Outsider:

    <strong>Yay, a 2GHz G4 with a 166MHz SDR MPX bus. Joy.</strong><hr></blockquote>



    Actually, Mot looks to be adopting RapidIO. This alliance would be perfect timing, because it looks like IBM's next-gen PPC will use RIO as well.



    This, however, is close to pure speculation - there's no official statement that the G4s Mot will design for the new process will support onboard RIO (and the attendant onboard memory controller). While a 2GHz G4 would push the current MaxBus to its absolute limit (167MHz x 12 = 2GHz), that unfortunately doesn't rule it out as an option.
  • Reply 13 of 69
    airslufairsluf Posts: 1,861member
  • Reply 14 of 69
    blablablabla Posts: 185member
    communication could be a G4..



    Cell phones? I dont know. I thoght, in general, older fab technology was used for stuff like that. <img src="confused.gif" border="0">
  • Reply 15 of 69
    brussellbrussell Posts: 9,812member
    Motorola almost never talks about Macs, even in the context of chips like the 7455.
  • Reply 16 of 69
    moogsmoogs Posts: 4,296member
    Nothing more than "Keeping up with the Joneses (IBM)" and a little FUD for good measure. Means next to nothing IMO.



    If they say Q4 02, I'm more like to believe Q3 03. They rarely deliver the new chips when they say they will. My money is on IBM for the next high-end chip / architecture.
  • Reply 17 of 69
    rogue27rogue27 Posts: 607member
    [quote]Originally posted by murk:

    <strong>Remember Steve's statement about having options in the future? He supposedly added: ?But right now, you know, between Motorola and IBM, the roadmap looks pretty decent.?</strong><hr></blockquote>



    Yeah, I was going to post that at work earlier, but then I realized I was late for class so I ran off and didn't post that.



    Anyway, the number 1.8 Ghz has been mentioned for a Motorola G4 processor expected very early next year. I guess this is what would do it.



    Also, at that speed, I'd assume the bus speed is higher as well.



    Time will tell. There's always something better right around the corner.
  • Reply 18 of 69
    stecsstecs Posts: 43member
    This is a question more than anything else, but lets assume a 2Ghz processor on a .09 process.



    1. Could the FSB be moved up to 333Mhz SDR at the same time. I.E is it possible to scale the FSB with the processor?



    2. Can you feed a pair (presumably) of 333MHz FSB using SDR off a 333MHz DDR memory feed?



    [ 08-30-2002: Message edited by: Stecs ]</p>
  • Reply 19 of 69
    junkyard dawgjunkyard dawg Posts: 2,801member
    This means nothing. For all we know it's in reference to the G5 aimed at communications (8400?).



    I highly doubt Moto is going to fab advanced desktop G4s on a 90 nm process. That's just way too far out there for a loser company like Motorola.



    IF Moto were to fab a G4 on such a process, then it would probably still only clock to 1.4 GHz or so, because Moto sucks. And of course it would be limited to a 166 MHz FSB. Forget RIO on the G4, it would be too much work to redesign the G4 to use RIO. RIO is for the G5 aimed at the communications market.
  • Reply 20 of 69
    blablablabla Posts: 185member
    [quote]Originally posted by Stecs:

    <strong>

    1. Could the FSB be moved up to 333Mhz SDR at the same time. I.E is it possible to scale the FSB with the processor?

    [ 08-30-2002: Message edited by: Stecs ]</strong><hr></blockquote>



    Im no expert here but..



    In general.. No.. the bus is designed in such a way the signal can travel from the chip to memory controller with as litle noise/latency as possible, and this is done by buffering to increase the signal strength and stuff I knowe little about. You just cant "overclock" or "scale" a bus as simple as the transistors in a chip.



    So a faster bus would require some redesign.
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