rumor: low end g4 box?

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  • Reply 61 of 112
    thttht Posts: 5,609member
    Quote:

    Originally posted by rickag

    I agree, but my question is,"For the MPC7457 to have any kind of competitive performance(re: read 200MHz FSB here) wouldn't it still require copious amounts of L3 DDRsram, thus kind of negating the reduced cost of the cpu alone???



    For an $800 "low end G4 box", it'll be fine without the backside L3 cache. If Apple ships a 1.6 GHz G4 box for $800 in Fall '03, I'd buy one as long as it has an AGP slot.



    A 7457 has twice the L2 cache than the 7455, so it'll perform a little bit better than the 7455 at the same clock rate, somewhere around 5 to 10%. It's going to be hot at 1.6 GHz though, probably 20 to 30 Watts. A 1 GHz PPC 970 versus a 1.6 GHz 7457 would be an interesting tradeoff.



    If Apple wants to put it in $1000+ machines to compete in the pro market, yeah, it needs to have L3 cache.
  • Reply 62 of 112
    programmerprogrammer Posts: 3,467member
    What is interesting about the 7457 is that Motorola's numbers claim that it uses 58 million transistors (see the thread on Ars). The 970 is around 53 million (don't have the actual number handy, this is from memory). One post on Ars suggested this is because the G4 is a "fully static design", whatever that means -- probably lower power consumption per transistor, but the numbers they are giving aren't much better than IBM's 970.



    So somehow IBM managed to double the length of the pipe, allow 12.5 times as many instructions in-flight, improve the FSB massively, keep the same L2 cache size, increase the L1 cache size, increase the physical registers by 50%, dramatically improve the branch prediction, support far superiour out of order execution, have more execution units, allow more instructions dispatched per clock cycle, and go to a PPC64... all in a smaller chip which will likely arrive first and at a higher clock rate than Motorola's.



    I'd be carefully about bragging, Moto.
  • Reply 63 of 112
    rhumgodrhumgod Posts: 1,289member
    Quote:

    Originally posted by Programmer

    So somehow IBM managed to double the length of the pipe, allow 12.5 times as many instructions in-flight, improve the FSB massively, keep the same L2 cache size, increase the L1 cache size, increase the physical registers by 50%, dramatically improve the branch prediction, support far superiour out of order execution, have more execution units, allow more instructions dispatched per clock cycle, and go to a PPC64... all in a smaller chip which will likely arrive first and at a higher clock rate than Motorola's.



    I'd be carefully about bragging, Moto.




    Moto: Ours goes to eleven....
  • Reply 64 of 112
    soopadrivesoopadrive Posts: 182member
    Quote:

    Originally posted by Matsu

    A computer is not irrelevant, but the current uses are, and IT people know next to nothing about the actual "use" to which most "classroom" computers are subjected. They're time fillers for frazzled teachers. They are not working, at all, but, needless to say, there's a big industry invested in telling us all that they are.



    Which is why I say, pull out ALL the computers in the classroom, and put them back in capacities where they make sense, with teachers who understand their application within a given subject.



    Why do so many people, so thoroughly "trained" on various computer systems, still have so many problems? The answer is that they lack more essential skills that precede computer use.



    Does the computer make anyone a better reader/writer? NO. They read more, write more, maybe... but they're not "better" Trust me, reading even my beautiful AI prose is no replacement for a well chosen anthology when it comes to really learning a language. When I sit down to write something seriously, after polluting myself around the web, I have to re-adjust my register, take a few minutes to start thinking in an active voice again, manage my hypo/para-taxis... the web makes you dumb, don't doubt it.




    Okay, I can see your point now. Computers are a beneficiary IF put to good use, and not used as replacements. Thanks for clearing that up. Computers in the schools I've attended (including the private college I'm currently attending) were all put to good use, and not used 100% of the time, but rather something more like 30%.

    I would just hate to see the youngsters left in the Dark Ages. Education is so important for them, and computers have played an important role in that aspect for many people, including myself.
  • Reply 65 of 112
    programmerprogrammer Posts: 3,467member
    Quote:

    Originally posted by SoopaDrive

    Education is so important for them, and computers have played an important role in that aspect for many people, including myself.



    What's more, in today's society kids had better be computer savvy. The computer can be an educational tool, unfortunately tools can be both used, misused, and abused.
  • Reply 66 of 112
    Quote:

    Originally posted by Programmer

    Well said, Matsu, but you didn't go far enough. The media makes you dumb. TV, advertising, movies, flashy magazines, flashy toys made out of cheap plastic, etc. Everything in our consumer society panders to the dumb because being dumb is easier than being smart and people in general are fundamentally lazy. I look at today's youth and I really have to wonder about our future.



    Programmer, I respect what you say about the future of our beloved platform, and the direction we hope it takes.



    [OFF TOPIC RANT]

    However, I find that you are probably in your 40's (at a guess). I am one of those "youth" that you, and many other people have deemed "Gen-X"ers, and I find it appalling that you could make such a generalization as that.



    I am also a programmer, and a damn fine one. I am far from lazy, and I have a son of my own. I look at my son, and I see the hope and possibility of our society within his eyes. To say that it is a spiritual event, doesn't do it justice.



    As for computers in our classrooms; they can and should be used throughout. My sister is a teacher, and she uses them frequently. However, that doesn't take away from what the childeren have to do when it comes to writing, mathematics, science, or social studies. She makes sure that they write out their responses. She makes sure that their sentences are well-formed. She does the best that she can with the resources at hand.



    However, bring the power of choice back to the teacher, where it belongs. After all, they are the ones in charge of teaching our childeren.[/OFF TOPIC RANT]



    [BACK ON TOPIC]

    A cheap g4?? Why?? Let us all move to the 970 (and maybe Mohave (sp??)), and be done with Motorola. They chinsed us with the 680x0 processors, the 60x series, and the G4. Apple should have learned by now what Motorola means to Apple; One Big Schmuck

    [/BACK ON TOPIC]



    P.S. Thank you for listening to my rant, as I do far few of them.
  • Reply 67 of 112
    amorphamorph Posts: 7,112member
    Quote:

    Originally posted by Programmer

    What is interesting about the 7457 is that Motorola's numbers claim that it uses 58 million transistors (see the thread on Ars). The 970 is around 53 million (don't have the actual number handy, this is from memory). One post on Ars suggested this is because the G4 is a "fully static design", whatever that means -- probably lower power consumption per transistor, but the numbers they are giving aren't much better than IBM's 970.



    So somehow IBM managed to double the length of the pipe, allow 12.5 times as many instructions in-flight, improve the FSB massively, keep the same L2 cache size, increase the L1 cache size, increase the physical registers by 50%, dramatically improve the branch prediction, support far superiour out of order execution, have more execution units, allow more instructions dispatched per clock cycle, and go to a PPC64... all in a smaller chip which will likely arrive first and at a higher clock rate than Motorola's.





    Curiouser and curiouser.



    This is the same chip that won an award early this year, when it was still months from shipping.



    I want to actually see a 7457. I've never seen or heard so much confusion or so many delays around what sounds like a really simple chip (shrink a 7455, double the L2). It'll be interesting to see what it actually is, and what it actually does.



    Jokes aside, there's no way in Hell that Mot blew the G4 up past the 970 in transistor count to add 256k of cache. Nor do I see how the result would dissipate 10W at 1.3GHz, or whatever Moto's claiming for the part.



    Just out of idle curiosity, how many transistors would it cost to double the 7455's cache and add an onboard memory controller with a RapidIO bus or two? Maybe an additional FPU, or a slightly longer pipe with a few more rename registers? I just want a handle on these numbers, because the more of them I hear the less sense they make in aggregate!
  • Reply 68 of 112
    rickagrickag Posts: 1,626member
    Quote:

    Originally posted by Programmer

    What is interesting about the 7457 is that Motorola's numbers claim that it uses 58 million transistors (see the thread on Ars). The 970 is around 53 million (don't have the actual number handy, this is from memory). One post on Ars suggested this is because the G4 is a "fully static design", whatever that means -- probably lower power consumption per transistor, but the numbers they are giving aren't much better than IBM's 970.



    So somehow IBM managed to double the length of the pipe, allow 12.5 times as many instructions in-flight, improve the FSB massively, keep the same L2 cache size, increase the L1 cache size, increase the physical registers by 50%, dramatically improve the branch prediction, support far superiour out of order execution, have more execution units, allow more instructions dispatched per clock cycle, and go to a PPC64... all in a smaller chip which will likely arrive first and at a higher clock rate than Motorola's.



    I'd be carefully about bragging, Moto.




    I saw that earlier this morning and was very surprised at the # of transistors in the MPC7457, but chaulked it up to a misprint in the Motorola documentation. We'll see.



    25 million extra transistors seems like alot for bumped up L2 cache, which was the only basic change Motorola announced as the difference between the MPC7455 and MPC7457.



    Also, if this is true, then even @ 0.13µm the MPC7457 won't have any cost advantage over an IBM 970, because the die sizes will be virtually identical. And the MPC7457 will still be choking on the possible 200MHz FSB.





    EDIT: Did notice that the MPC7457 will support 4MB L3 cache as opposed to only 2MB for the MPC7455

    (from Motorola's pdf , "The MPC7457 supports up to 4 MB of SRAM, of which a maximum of 2 MB can be configured as cache memory; the remaining 2 MB may be unused or configured as private memory.")
  • Reply 69 of 112
    Quote:

    Originally posted by Rhumgod

    Moto: Ours goes to eleven....



    Why not just make ten louder? (snicker snicker snicker)
  • Reply 70 of 112
    rickagrickag Posts: 1,626member
    I just gotta say it. That Motorola pdf has been out for quite some time, with literally thousands of Mac enthusiasts pulling it up on their computer, probably downloading it and NO ONE, not even the experts who are very very knowledgable caught this 25 MILLION difference until today.



    Gotta love the internet.
  • Reply 71 of 112
    thttht Posts: 5,609member
    Quote:

    Originally posted by Amorph

    Curiouser and curiouser.



    I don't think there is any magic here. All indications are that the 7457 is a 7455 built on a 0.13 micron process, an additional 256 KB of on-chip L2 and additional L3 cache controller tags (these are on-chip) to support 4 MB of private memory. Even if there is 4 MB of L3 cache, only 2 MB of it can be cache memory and the rest left unused, so Motorola didn't even put in the work to get it to support 4 MB of L3 cache.



    Quote:

    Jokes aside, there's no way in Hell that Mot blew the G4 up past the 970 in transistor count to add 256k of cache. Nor do I see how the result would dissipate 10W at 1.3GHz, or whatever Moto's claiming for the part.



    We're talking about Motorola here. I can easily see them blowing up the 7457 transistor count past the 970 transistor count, with all of the additional transistors due to inefficient circuit design.



    The 10W at 1.3 GHz sounds like a low voltage typical power consumption number. Not a maximum.



    Quote:

    Just out of idle curiosity, how many transistors would it cost to double the 7455's cache and add an onboard memory controller with a RapidIO bus or two? Maybe an additional FPU, or a slightly longer pipe with a few more rename registers? I just want a handle on these numbers, because the more of them I hear the less sense they make in aggregate!



    A long time ago, I estimated 128KB of SRAM cache is about 8 to 10 million transistors. Additional FPU or scalar execution units will be on the order of 1 or 2 million. Bus and memory controllers will probably on the order of 3 to 5 million. I think the thing you have to be careful of is comparing transistor counts between different manufacturers.
  • Reply 72 of 112
    rickagrickag Posts: 1,626member
    If the Motorola pdf is to be believed, the MPC7457 has not added Rapid I/O, has not added a floating point unit etc., does not have more in flight executions, does not have any additional execution units and I do not expect to see any additions other than what the pdf states.



    That said, THT's quote, "We're talking about Motorola here. I can easily see them blowing up the 7457 transistor count past the 970 transistor count, with all of the additional transistors due to inefficient circuit design." is somewhat disheartening
  • Reply 73 of 112
    programmerprogrammer Posts: 3,467member
    Quote:

    Originally posted by Mike Eggleston

    [OFF TOPIC RANT]

    However, I find that you are probably in your 40's (at a guess). I am one of those "youth" that you, and many other people have deemed "Gen-X"ers, and I find it appalling that you could make such a generalization as that.

    [/OFF TOPIC RANT]





    I'm not as old as you think I am (by quite a margin). I'd say that I'm on the bleeding edge of the Gen-Xers. What I said above is exactly why you describe it as -- a generalization. As such it does not apply to every individual in the population. It does, however, apply to a substantial fraction (dare I suggest a majority?). Go out and sample the population at large, not within your group of well-educated friends and co-workers. They are not representative, and neither are their children. Look at overall literacy rates, look at the problems with ADD and obesity, etc etc. There are huge deficiencies in the public education systems. People are being taught to be consumers, not producers, and they are being taught primarily by the media & marketing. They are taught nothing about how to defend themselves against the onslaught of advertising we face in our day-to-day lives.





    Anyhow, this is the wrong place for this discussion and I'm not really interesting in having it anyhow. Back to the low end headless Mac (which has been beaten to death many times over, IMO)...
  • Reply 74 of 112
    lemon bon bonlemon bon bon Posts: 2,383member
    Maybe it's been beaten to death for a reason.



    iCube therefore I am...happy.



    Lose the monitor from the lard-ass eMac...and that excess plastic. Savings? Maybe enough to make a headless, white consumer iCube for £495-ish?



    Take the risk away. Bundle with 'Move to Mac'. Great 'Switcher Kit'.



    Lemon Bon Bon



    PS. I think the Edu' market is a good example of where Apple has got it wrong. And highlights some of the flaws in Apple's approach play. It aint just IT/Enterprise folk standardising Apple out the market. X-serve will address some of Apple's problems in Education. Not all of them.
  • Reply 75 of 112
    lemon bon bonlemon bon bon Posts: 2,383member
    Quote:

    I'm not as old as you think I am (by quite a margin). I'd say that I'm on the bleeding edge of the Gen-Xers. What I said above is exactly why you describe it as -- a generalization. As such it does not apply to every individual in the population. It does, however, apply to a substantial fraction (dare I suggest a majority?). Go out and sample the population at large, not within your group of well-educated friends and co-workers. They are not representative, and neither are their children. Look at overall literacy rates, look at the problems with ADD and obesity, etc etc. There are huge deficiencies in the public education systems. People are being taught to be consumers, not producers, and they are being taught primarily by the media & marketing. They are taught nothing about how to defend themselves against the onslaught of advertising we face in our day-to-day lives.



    Take it over to general discussion, Programmer...



    Lemon Bon Bon
  • Reply 76 of 112
    amorphamorph Posts: 7,112member
    Quote:

    Originally posted by rickag

    If the Motorola pdf is to be believed, the MPC7457 has not added Rapid I/O, has not added a floating point unit etc., does not have more in flight executions, does not have any additional execution units and I do not expect to see any additions other than what the pdf states.



    That said, THT's quote, "We're talking about Motorola here. I can easily see them blowing up the 7457 transistor count past the 970 transistor count, with all of the additional transistors due to inefficient circuit design." is somewhat disheartening




    It is, and odd considering that Moto is now boasting that AltiVec accounts for 11% of the die size of the 7457, "and shrinking" - implying that they're trying to be parsimonious with transistors.



    My preferred theory at the moment is that the 58 million number is a typo. 38 million accounts for the added cache in THT's estimation, and frankly I don't think transistor waste is a Mot hallmark, even recently.
  • Reply 77 of 112
    thttht Posts: 5,609member
    As an exercise, I have compiled this list:



    Code:




    Company CPU on-die L2 Transistors Die Size Fabrication Process

    (KBytes) (millions) (sq mm)

    ------- --------- --------- ----------- -------- ---------------------

    IBM 750 0 6.35 40 200 nm 6 layer metal

    Moto 755 0 6.75 51 220 nm 6 layer metal

    Moto 7400 0 10.5 83 220 nm 6 layer metal

    Moto 7410 0 10.5 52 180 nm 6 layer metal

    IBM 750cxe 256 20 42.7 180 nm 6 layer metal

    Moto 7450 256 33 106 180 nm 6 layer metal

    IBM 750fx 512 38 34.3 130 nm 6 layer metal

    IBM 970 512 52 118 130 nm 6 layer metal

    Moto 7457 512 58 98.3 130 nm 9 layer metal









    Compare the numbers audience members. Either IBM does a masterful job at floor planning and using the minimum number of transistors, or that 34.3 sq mm die size for the 750fx is wrong.



    Anyways, compare the 7450 and 750cxe transistor counts. Both of them have 256 KB of on-die L2 cache. So the remaining 13 million transistors must account for AltiVec, 2 simple integer units, pipeline depth pad, and slightly larger buffers and such. The 7400 and 750 comparison indicates AltiVec consists of about 3.5M transistors. The two integer units are probably around 2M transistors. That leaves 7.5M transistors for everything else. So is this evidence that the 7450 doesn't make very good use of its transistors? Remeber we're are trying to account for ~8M transistors in the 7457 here.



    Even comparing the 750cxe to the 7410 makes you wonder. The 750cxe to 7450 too. IBM's SRAM cache implementation doesn't require a lot of transistors and is very well laid out to make their die sizes so small. Moto's floor planning takes up a lot of space. The 750cxe at twice the transistor count is smaller than the 7410 in die size. Transistors for cache are packed much denser than for logic. Still, it's amazing to see.



    Or this could all just be Moto and IBM counting transistors in a different manner.
  • Reply 78 of 112
    rickagrickag Posts: 1,626member
    Quote:

    Originally posted by THT



    Or this could all just be Moto and IBM counting transistors in a different manner.




    Well, that is a lot of transistors to count, especially having to count them through a tunneling electron microscope one transistor at a time.



    Excellent post, thanks for the information.



    The only thing I could think of, remember I have no knowledge in this area, is the transistor layout or pattern for Motorola may be different because of heat concerns for the embedded market and may contribute to the larger die sizes for equivalent numbers of transistors.
  • Reply 79 of 112
    rickagrickag Posts: 1,626member
    I just noticed you have the IBM 970 with 6 layers, I thought there were 8 levels of interconnects on the 970.
  • Reply 80 of 112
    airslufairsluf Posts: 1,861member
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