The actually used the word AltiVec, to give 100% confirmation and lay any doubts to rest.<hr></blockquote>
This was pretty interesting also:
[quote]In addition to high performance general -purpose processing, application-specific acceleration (such as multimedia) can be achieved through the AltiVec vector engine. Codeveloped by IBM, this engine extends the PowerPC instruction set with 162 Single-Instruction, Multiple Data (SIMD) instructions.<hr></blockquote>
Hmm... now who do you suppose "codeveloped" this AltiVec engine with IBM? :eek:
Hmm... now who do you suppose "codeveloped" this AltiVec engine with IBM? :eek: </strong><hr></blockquote>
Apple and Motorola at Somerset. The AIM alliance co-developed everything up until the actual G4 (which has co-developed parts, like the INT unit, in it).
Apple and Motorola at Somerset. The AIM alliance co-developed everything up until the actual G4 (which has co-developed parts, like the INT unit, in it).
<hr></blockquote>
I was thinking more like it was one or the other.
Motorola developed and <a href="http://tess.uspto.gov/bin/showfield?f=doc&state=pt7hp5.2.1"; target="_blank">trademarked</a> it. But would they really be motivated to share it with IBM when it (seems like it will) put a dent in their G4 chip sales to Apple?
Could it be possible that IBM and Apple were the co-developers of this "AltiVec-compatible" instruction set?
[quote] The 970's multiple execution units including an AltiVec compatible vector processor are fed by an up to 900-MHz processor interface bus, which can deliver data at a rate of up to 6.4 GBps.
I think that AltiVec is a subset of VMX or something like that, which IBM had something to do with, and has the rights to. They just needed to tweek their own VMX version to be software compatable with Motorollas. I could be compleatly off base on this though...
Also IBM's SIMD is not AltiVec, it is just compatible with it, just as AMD chips are not Pentiums.
<strong>while everyone in the world seemed to know this except for me, i had no idea what FUD meant until a week or two ago. just in case someone doesn't know what it means, i am writing this post just to prolong the suspense.</strong><hr></blockquote>
Enough suspense already!
What is FUD???
I suppose I just dont keep caught up on the latest lingo... <img src="graemlins/hmmm.gif" border="0" alt="[Hmmm]" />
Could it be possible that IBM and Apple were the co-developers of this "AltiVec-compatible" instruction set?
</strong>
<hr></blockquote>
This is an old discussion. Someone looked up the patents, and all three are on the originals, IBM, Apple and Motorola. Any of the three can use this instruction set. The name AltiVec may be a trademark of Motorola. I was surprised to see IBM use it. It may mean that Motorola sees an advantage to let IBM and Apple use the name, since they use the technology in any case. It gives the name AltiVec more exposure and prestige, which benefits Motorola. Just a guess.
This is an old discussion. Someone looked up the patents, and all three are on the originals, IBM, Apple and Motorola. Any of the three can use this instruction set. The name AltiVec may be a trademark of Motorola. I was surprised to see IBM use it. It may mean that Motorola sees an advantage to let IBM and Apple use the name, since they use the technology in any case. It gives the name AltiVec more exposure and prestige, which benefits Motorola. Just a guess.</strong><hr></blockquote>
Motorola choose the name Velocity Engine. I think VE is the property of Mot , and Altivec is belonging to the AIM alliance.
Motorola choose the name Velocity Engine. I think VE is the property of Mot , and Altivec is belonging to the AIM alliance.
</strong><hr></blockquote>
I believe Apple coined the term Velocity Engine, and was the first to use it. Regarding AltiVec, you notice that IBM refrained from using this term until now. At the microprocessor forum, IBM may have said their SIMD engine is compatible with AltiVec. They did not call it AltiVec back then.
IBM calls their SIMD unit "Altivec compatible" because Moto holds the trademark for Altivec. IBM can't call their SIMD unit Altivec, that would be trademark infringement.
I believe Apple coined the term Velocity Engine, and was the first to use it. Regarding AltiVec, you notice that IBM refrained from using this term until now. At the microprocessor forum, IBM may have said their SIMD engine is compatible with AltiVec. They did not call it AltiVec back then.</strong><hr></blockquote>
Apple uses the name Velocity Engine so that when (I'm sure that at the time it was an if) IBM came out with their own subset of the collaborative specs for SIMD for the PowerPC came out they would not have to change any of their marketing strategy. Doing this they dont have spend the money to build up a new brand recognition, they do the same with the processor using the G3, G4 naming converntion.
[[[IBM calls their SIMD unit "Altivec compatible" because Moto holds the trademark for Altivec. IBM can't call their SIMD unit Altivec, that would be trademark infringement.]]]
And from the IBM product information release:
[[[In addition to high performance general-purpose processing, application-specific acceleration (such as multimedia) can be achieved through the AltiVec vector engine. Codeveloped by IBM, this engine extends the PowerPC instruction set with 162 Single-Instruction, Multiple Data (SIMD) instructions. ]]]
Well, I guess IBM calls their vector unit "AltiVec"...
But there are other interesting tidbits aside from IBM incorporating AltiVec on this puppy that would also point to Apple using this chip. Lets look at a few...
[[[But the 970 employs much more than frequency to answer the demands of high-performance computing customers. ]]]
IBM is directly addressing the MHz. myth...Something that I'm not aware of Moto. ever doing. This would help Apple simply because coming from IBM, this statement would hold more validity. And you can bet now that IBM is in on the game, Intel is going to have much stiffer competition. PowerPC is a nice tidy, robust design and you can bet that IBM is going to push it's limits further than anyone would have imagined.
[[[The 970's multiple execution units including an AltiVec compatible vector processor are fed by an up to 900-MHz processor interface bus, which can deliver data at a rate of up to 6.4 GBps.]]]
This addresses the bus issues that Apple is currently having. Hell, I'm still wondering what a monster bus would do for the current Moto. processors if it was implemented. The future looks promising indeed.
[[[In designing the PowerPC 970, IBM's goal was to provide a high-performance, simultaneous multiprocessor-enabled, 64-bit platform. ]]]
This is what Apple is working with right now... And I don't know if anyone recalls, but an individual from IBM said in a statement at the Microprocessor Forum that the chip design was initially intended to be released in a 4-way configuration and then scale to even more processors... Could this have been a *hint* as to what may be coming from Apple? I'm not sure what would be available (for the DESKTOP) from AMD and Intel at the time, but a 4-cpu 1.8 GHz. config would be difficult to match.
Remember that neither Microsoft nor any developers have committed to any of the 64-bit designs offered by AMD or Intel. It's likely that Microsoft will go with Itanium. In that case, Itanium isn't meant for the desktop so, AMD will likely be limited to *server* configurations because of it. Keep in mind that the designs are completely different and incompatible (any future hacks not withstanding). Then there is the question of developer support.... Are developers willing to support Yet Another Platform architecture? Do people need 64-bit and will the upgrade *again* to a completely new system that would require all new software? I doubt it. With an Apple PPC 970 config, they won't have to...
from the article:
[[[Additionally, 32-bit applications needed to be supported with the same level of performance. To achieve this goal, the award-winning POWER4 architecture developed for multiprocessor IBM server systems was chosen for the base design.\t]]]
People say that the PPC isn't an advanced design -- that it's lacking in some way compared to Intel or AMD? This chip will be smaller and consume less power and if a single-CPU config won't outpace the competition, multiple CPUs certainly would...
From the article:
[[[By implementing a proven 64-bit server architecture, this new family of processors will enable new classes of 64-bit solutions. ]]]
And IBM is right, the architecture is in fact more than proven. Can AMD or Intel say the same for their proposed designs? It will be new territory for those companies trying to introduce a new 64-bit architecture into the marketplace. I'm sure Microsoft is asking the same questions. It's doubtful that M$ will choose to develop for both CPUs. As stated before, this would just create another level of uncertainty (compatibility, etc.) for customers.
[[[In addition to its support of new 64-bit solutions, the 970 retains full native support for 32-bit applications. This not only protects 32-bit software investments, but provides these 32-bit applications with the same high-performance levels that it extends to 64-bit uses. This native, nonemulated, 32-bit support is not limited to application code, which runs unmodified. ]]]
This is the *key* statement. What support for current 32-bit applications? The Mac is probably the only PPC platform that employs such mega-complex applications like Maya, Lightwave, VectorWorks, Photoshop etc. that this would be of concern to anyone. I'm sure the applications in the embedded space would simply be rewritten. This is clearly aimed at the desktop and there is only ONE mainstream desktop platform out there. The Mac.
[[[To keep the vector engine and the superscalar core busy requires high bandwidth access to off-chip memory and I/O devices. The PowerPC 970 implements an Elastic I/O processor interface bus, which operates at a speed of up to 900 MHz and can keep the multiple execution units fed by up 6.4 GBps of data. ]]]
Elastic I/O, eh? could provide a hint that the architecture is highly flexible. Again, I believe that Apple will choose to overcome their competition with sheer numbers. Most of the Wintelon crowd is used to looking only at a single CPU and comparing performance CPU for CPU. I believe with the current market the way it is, Apple is in a prime situation to reclaim a lot of lost ground. No one in the Wintel world is upgrading and if they are, it isn't at a significant pace. On the other hand, there seem to be a ton of Mac people just waiting to upgrade their machines. Furthermore, it seems that there is a lot of uncertainty in the Windows world these days about which (as yet unproven) architecture will be selected. Will it simply be another *hack* ? Will it be reason enough for people to upgrade and give developers the incentive to develop for it? This PPC 970 would put Apple in a FAR better position with customers and developers alike than either AMD, Intel or Microsoft.
<strong>Is the floating point unit of the PPC 970 similar to the G4's? I thought I read somewhere that the PPC 970 had two fp units vs the G4's one.</strong><hr></blockquote>
Well they are both PowerPC so from a developer point of view they are the same. The 970's pipeline is a lot longer so to get optimal performance the instruction ordering will be a little different, but existing code will work fine (and fast since there are 2 FPUs instead of the G4's single one).
VMX = AltiVec = VelocityEngine. VMX was a development name, the others are marketing speak from Motorola and Apple respectively. If IBM starts using AltiVec (and the logo) everywhere now my guess is that in the last couple of months they reached an agreement with Moto to share the trademark, if they just refer to it casually as AltiVec compatible then they don't have rights to the trademark.
Frankly its all marketing / legal crap -- Apple, IBM, and Motorola were all involved at Somerset to design the PowerPC SIMD architecture and when they were done IBM decided for technical reasons that it wasn't the right way to go with processor design. When the G4 shipped, however, it became obvious that it did significantly improve performance of some critical algorithms and Apple was solidly behind it. This happened quite quickly and by early 2000 IBM has put together the 970 design team which included a VMX execution unit. IBM not having access to the trademark has more to do with them not using the design when it was first finished than anything else. Why would they do any marketing work for a technology they weren't planning to use?
It will be interesting to see if Apple delivers a PowerMac or Xserve with more than two processors. At 40W the 1.8 GHz version will be a really hot machine with 4 processors! And while the bus might be really fast, its unlikely that Apple (or anybody) could build an economical memory system to keep four 970s fully fed -- that is >25 GB/sec of bandwidth and even the high-end bleeding edge video cards with soldered VRAM can't match that yet. Certainly no PC currently in existence can actually achieve that. A quad 1.4 GHz would only consume 80W (same as a dual 1.8 and less than many single processor Pentium4 machines) and able to use 20 GB/sec of bandwidth.
Of course there is no requirement to keep the processor(s) fully satiated. The G4 7455 certainly isn't, although that's for reasons internal to the processor. It will be interesting to see what Apple can achieve with commodity memory by the middle of next year.
With DDR333 and a 64-bit wide memory channel the maximum theoretical bandwidth is about 2.7 GB/sec (which is why its called PC2700 memory, after all). In reality there is some overhead so this number cannot actually be achieved in practice, and this overhead is worse for DDR since the number of bus clocks to transfer the data decreases but the amount of setup & address time doesn't. I'd guess that DDR333 can't actually do much better than 1.8 GB/sec in practice. Dual channel can almost double this again which gets us up to about 3.6 GB/sec... still a far cry from what a single 970 is capable of. Going to DDR400 increases this slightly to about 2.4 (4.8 dual channel). DDR-II 400 MHz is coming (although maybe not in time for the 970 machines) and it is, from what I understand, quad-pumped. If the burst size doesn't increase, however, the overhead gets even more painful and bandwidth only rises to roughly 3.2 single and 6.4 dual. Its worth noting at this point that dual channel 200 MHz motherboards are rather expensive so Apple might not want to go there if it doesn't demonstrate a significant improvement -- and it may not, these numbers are rough and only for heavily bandwidth dependent algorithms.
These rough (very rough!) calcs are based on a memory transaction burst size of 32 bytes like most processors currently use. The 970 uses larger 128 byte lines so the overhead is reduced by a factor of about 4. This only helps streaming reads/writes and actually hurts random access, but random access is typically much less concerned about bandwidth, and more concerned about latency (which is addressed by sending the requested doubleword first). For bandwidth oriented algorithms, therefore, the 970's peak numbers for DDR333 may be more like 2.5 single and 5 dual. DDR400 should increase to 3.0 and 6 dual. DDR-II 400 MHz to 5.7 and 11.4 dual. There is also talk of DDR533, but who knows if that'll show up in Apple machines.
These numbers are appealing but remember that the 970 is intended for SMP applications and each gets its own bus so 1, 2, and 4 processor configurations can use 6.4, 12.8, and 25.6 GB/sec @ 1.8 GHz. The cooler 1.4 GHz chip would be more reasonable in a quad configuration and it can consume 5, 10, and 20 GB/sec. There is also a lot of other activity in the system which uses bandwidth -- by the time the 970 machines arrive they'll probably have FireWire2 (0.8 - 1.6 GB/sec), dual ATA133 (0.25 ), AGP 8x (2.1), Ethernet (0.1) and PCI 66 MHz/64-bit (0.25). Of these only the AGP really matters, but its a big one and with Quartz Extreme the use of bandwidth is pretty steadily. The others all happen in bursts, although this might be a factor depending on what you are doing (e.g. reading video from a 1394 camera while displaying it, compressing it, and writing it to the hard disk).
One thing is for sure though... these machines will be a lot faster than G4s.
There have been technical problems in making motherboards that support more than 2 or in some cases 1 DIMM slot for DDR 400MHz motherboards. I don't see it being a problem for the processor to be throttled for the moment; having the memory bandwith not able to saturate the bus, the opposite of what we have today. The extra bandwidth can be used for other stuff like AGP bandwidth and PCI-X. DDR-II is said to alleviate the problems that DDR-I has at high MHz but who knows when that will show up.
Comments
The actually used the word AltiVec, to give 100% confirmation and lay any doubts to rest.<hr></blockquote>
This was pretty interesting also:
[quote]In addition to high performance general -purpose processing, application-specific acceleration (such as multimedia) can be achieved through the AltiVec vector engine. Codeveloped by IBM, this engine extends the PowerPC instruction set with 162 Single-Instruction, Multiple Data (SIMD) instructions.<hr></blockquote>
Hmm... now who do you suppose "codeveloped" this AltiVec engine with IBM? :eek:
<strong>
Hmm... now who do you suppose "codeveloped" this AltiVec engine with IBM? :eek: </strong><hr></blockquote>
Apple and Motorola at Somerset. The AIM alliance co-developed everything up until the actual G4 (which has co-developed parts, like the INT unit, in it).
Barto
<strong>
Hmm... now who do you suppose "codeveloped" this AltiVec engine with IBM? :eek: </strong><hr></blockquote>
I'd like to know when and if an "altivec II" is in the works. And if it was, what would the benefits be compared to altivec.
Apple and Motorola at Somerset. The AIM alliance co-developed everything up until the actual G4 (which has co-developed parts, like the INT unit, in it).
<hr></blockquote>
I was thinking more like it was one or the other.
Motorola developed and <a href="http://tess.uspto.gov/bin/showfield?f=doc&state=pt7hp5.2.1"; target="_blank">trademarked</a> it. But would they really be motivated to share it with IBM when it (seems like it will) put a dent in their G4 chip sales to Apple?
Could it be possible that IBM and Apple were the co-developers of this "AltiVec-compatible" instruction set?
[quote] The 970's multiple execution units including an AltiVec compatible vector processor are fed by an up to 900-MHz processor interface bus, which can deliver data at a rate of up to 6.4 GBps.
<hr></blockquote>
[ 12-13-2002: Message edited by: FormerLurker ]</p>
<strong>
[ 12-13-2002: Message edited by: FormerLurker ]</strong><hr></blockquote>
I think that AltiVec is a subset of VMX or something like that, which IBM had something to do with, and has the rights to. They just needed to tweek their own VMX version to be software compatable with Motorollas. I could be compleatly off base on this though...
Also IBM's SIMD is not AltiVec, it is just compatible with it, just as AMD chips are not Pentiums.
[ 12-13-2002: Message edited by: @homenow ]</p>
<strong>while everyone in the world seemed to know this except for me, i had no idea what FUD meant until a week or two ago. just in case someone doesn't know what it means, i am writing this post just to prolong the suspense.</strong><hr></blockquote>
Enough suspense already!
What is FUD???
I suppose I just dont keep caught up on the latest lingo... <img src="graemlins/hmmm.gif" border="0" alt="[Hmmm]" />
It means Fea......[grabbed and whisked into a black van and driven off in a cloud of exhaust and burnt rubber].
Maybe that'll help. It was the first search result from Google.
(Thank you Cake for talking about this earlier.)
[ 12-14-2002: Message edited by: Jeremiah Rich ]</p>
<strong>
Could it be possible that IBM and Apple were the co-developers of this "AltiVec-compatible" instruction set?
</strong>
<hr></blockquote>
This is an old discussion. Someone looked up the patents, and all three are on the originals, IBM, Apple and Motorola. Any of the three can use this instruction set. The name AltiVec may be a trademark of Motorola. I was surprised to see IBM use it. It may mean that Motorola sees an advantage to let IBM and Apple use the name, since they use the technology in any case. It gives the name AltiVec more exposure and prestige, which benefits Motorola. Just a guess.
<strong>
This is an old discussion. Someone looked up the patents, and all three are on the originals, IBM, Apple and Motorola. Any of the three can use this instruction set. The name AltiVec may be a trademark of Motorola. I was surprised to see IBM use it. It may mean that Motorola sees an advantage to let IBM and Apple use the name, since they use the technology in any case. It gives the name AltiVec more exposure and prestige, which benefits Motorola. Just a guess.</strong><hr></blockquote>
Motorola choose the name Velocity Engine. I think VE is the property of Mot , and Altivec is belonging to the AIM alliance.
<strong>
Motorola choose the name Velocity Engine. I think VE is the property of Mot , and Altivec is belonging to the AIM alliance.
</strong><hr></blockquote>
I believe Apple coined the term Velocity Engine, and was the first to use it. Regarding AltiVec, you notice that IBM refrained from using this term until now. At the microprocessor forum, IBM may have said their SIMD engine is compatible with AltiVec. They did not call it AltiVec back then.
<strong>
I believe Apple coined the term Velocity Engine, and was the first to use it. Regarding AltiVec, you notice that IBM refrained from using this term until now. At the microprocessor forum, IBM may have said their SIMD engine is compatible with AltiVec. They did not call it AltiVec back then.</strong><hr></blockquote>
Apple uses the name Velocity Engine so that when (I'm sure that at the time it was an if) IBM came out with their own subset of the collaborative specs for SIMD for the PowerPC came out they would not have to change any of their marketing strategy. Doing this they dont have spend the money to build up a new brand recognition, they do the same with the processor using the G3, G4 naming converntion.
[[[IBM calls their SIMD unit "Altivec compatible" because Moto holds the trademark for Altivec. IBM can't call their SIMD unit Altivec, that would be trademark infringement.]]]
And from the IBM product information release:
[[[In addition to high performance general-purpose processing, application-specific acceleration (such as multimedia) can be achieved through the AltiVec vector engine. Codeveloped by IBM, this engine extends the PowerPC instruction set with 162 Single-Instruction, Multiple Data (SIMD) instructions. ]]]
Well, I guess IBM calls their vector unit "AltiVec"...
But there are other interesting tidbits aside from IBM incorporating AltiVec on this puppy that would also point to Apple using this chip. Lets look at a few...
[[[But the 970 employs much more than frequency to answer the demands of high-performance computing customers. ]]]
IBM is directly addressing the MHz. myth...Something that I'm not aware of Moto. ever doing. This would help Apple simply because coming from IBM, this statement would hold more validity. And you can bet now that IBM is in on the game, Intel is going to have much stiffer competition. PowerPC is a nice tidy, robust design and you can bet that IBM is going to push it's limits further than anyone would have imagined.
[[[The 970's multiple execution units including an AltiVec compatible vector processor are fed by an up to 900-MHz processor interface bus, which can deliver data at a rate of up to 6.4 GBps.]]]
This addresses the bus issues that Apple is currently having. Hell, I'm still wondering what a monster bus would do for the current Moto. processors if it was implemented. The future looks promising indeed.
[[[In designing the PowerPC 970, IBM's goal was to provide a high-performance, simultaneous multiprocessor-enabled, 64-bit platform. ]]]
This is what Apple is working with right now... And I don't know if anyone recalls, but an individual from IBM said in a statement at the Microprocessor Forum that the chip design was initially intended to be released in a 4-way configuration and then scale to even more processors... Could this have been a *hint* as to what may be coming from Apple? I'm not sure what would be available (for the DESKTOP) from AMD and Intel at the time, but a 4-cpu 1.8 GHz. config would be difficult to match.
Remember that neither Microsoft nor any developers have committed to any of the 64-bit designs offered by AMD or Intel. It's likely that Microsoft will go with Itanium. In that case, Itanium isn't meant for the desktop so, AMD will likely be limited to *server* configurations because of it. Keep in mind that the designs are completely different and incompatible (any future hacks not withstanding). Then there is the question of developer support.... Are developers willing to support Yet Another Platform architecture? Do people need 64-bit and will the upgrade *again* to a completely new system that would require all new software? I doubt it. With an Apple PPC 970 config, they won't have to...
from the article:
[[[Additionally, 32-bit applications needed to be supported with the same level of performance. To achieve this goal, the award-winning POWER4 architecture developed for multiprocessor IBM server systems was chosen for the base design.\t]]]
People say that the PPC isn't an advanced design -- that it's lacking in some way compared to Intel or AMD? This chip will be smaller and consume less power and if a single-CPU config won't outpace the competition, multiple CPUs certainly would...
From the article:
[[[By implementing a proven 64-bit server architecture, this new family of processors will enable new classes of 64-bit solutions. ]]]
And IBM is right, the architecture is in fact more than proven. Can AMD or Intel say the same for their proposed designs? It will be new territory for those companies trying to introduce a new 64-bit architecture into the marketplace. I'm sure Microsoft is asking the same questions. It's doubtful that M$ will choose to develop for both CPUs. As stated before, this would just create another level of uncertainty (compatibility, etc.) for customers.
[[[In addition to its support of new 64-bit solutions, the 970 retains full native support for 32-bit applications. This not only protects 32-bit software investments, but provides these 32-bit applications with the same high-performance levels that it extends to 64-bit uses. This native, nonemulated, 32-bit support is not limited to application code, which runs unmodified. ]]]
This is the *key* statement. What support for current 32-bit applications? The Mac is probably the only PPC platform that employs such mega-complex applications like Maya, Lightwave, VectorWorks, Photoshop etc. that this would be of concern to anyone. I'm sure the applications in the embedded space would simply be rewritten. This is clearly aimed at the desktop and there is only ONE mainstream desktop platform out there. The Mac.
[[[To keep the vector engine and the superscalar core busy requires high bandwidth access to off-chip memory and I/O devices. The PowerPC 970 implements an Elastic I/O processor interface bus, which operates at a speed of up to 900 MHz and can keep the multiple execution units fed by up 6.4 GBps of data. ]]]
Elastic I/O, eh? could provide a hint that the architecture is highly flexible. Again, I believe that Apple will choose to overcome their competition with sheer numbers. Most of the Wintelon crowd is used to looking only at a single CPU and comparing performance CPU for CPU. I believe with the current market the way it is, Apple is in a prime situation to reclaim a lot of lost ground. No one in the Wintel world is upgrading and if they are, it isn't at a significant pace. On the other hand, there seem to be a ton of Mac people just waiting to upgrade their machines. Furthermore, it seems that there is a lot of uncertainty in the Windows world these days about which (as yet unproven) architecture will be selected. Will it simply be another *hack* ? Will it be reason enough for people to upgrade and give developers the incentive to develop for it? This PPC 970 would put Apple in a FAR better position with customers and developers alike than either AMD, Intel or Microsoft.
--
Ed M.
<strong>I thought I read somewhere that the PPC 970 had two fp units vs the G4's one.</strong><hr></blockquote>
This is correct.
<strong>Is the floating point unit of the PPC 970 similar to the G4's? I thought I read somewhere that the PPC 970 had two fp units vs the G4's one.</strong><hr></blockquote>
Well they are both PowerPC so from a developer point of view they are the same. The 970's pipeline is a lot longer so to get optimal performance the instruction ordering will be a little different, but existing code will work fine (and fast since there are 2 FPUs instead of the G4's single one).
VMX = AltiVec = VelocityEngine. VMX was a development name, the others are marketing speak from Motorola and Apple respectively. If IBM starts using AltiVec (and the logo) everywhere now my guess is that in the last couple of months they reached an agreement with Moto to share the trademark, if they just refer to it casually as AltiVec compatible then they don't have rights to the trademark.
Frankly its all marketing / legal crap -- Apple, IBM, and Motorola were all involved at Somerset to design the PowerPC SIMD architecture and when they were done IBM decided for technical reasons that it wasn't the right way to go with processor design. When the G4 shipped, however, it became obvious that it did significantly improve performance of some critical algorithms and Apple was solidly behind it. This happened quite quickly and by early 2000 IBM has put together the 970 design team which included a VMX execution unit. IBM not having access to the trademark has more to do with them not using the design when it was first finished than anything else. Why would they do any marketing work for a technology they weren't planning to use?
It will be interesting to see if Apple delivers a PowerMac or Xserve with more than two processors. At 40W the 1.8 GHz version will be a really hot machine with 4 processors! And while the bus might be really fast, its unlikely that Apple (or anybody) could build an economical memory system to keep four 970s fully fed -- that is >25 GB/sec of bandwidth and even the high-end bleeding edge video cards with soldered VRAM can't match that yet. Certainly no PC currently in existence can actually achieve that. A quad 1.4 GHz would only consume 80W (same as a dual 1.8 and less than many single processor Pentium4 machines) and able to use 20 GB/sec of bandwidth.
Of course there is no requirement to keep the processor(s) fully satiated. The G4 7455 certainly isn't, although that's for reasons internal to the processor. It will be interesting to see what Apple can achieve with commodity memory by the middle of next year.
With DDR333 and a 64-bit wide memory channel the maximum theoretical bandwidth is about 2.7 GB/sec (which is why its called PC2700 memory, after all). In reality there is some overhead so this number cannot actually be achieved in practice, and this overhead is worse for DDR since the number of bus clocks to transfer the data decreases but the amount of setup & address time doesn't. I'd guess that DDR333 can't actually do much better than 1.8 GB/sec in practice. Dual channel can almost double this again which gets us up to about 3.6 GB/sec... still a far cry from what a single 970 is capable of. Going to DDR400 increases this slightly to about 2.4 (4.8 dual channel). DDR-II 400 MHz is coming (although maybe not in time for the 970 machines) and it is, from what I understand, quad-pumped. If the burst size doesn't increase, however, the overhead gets even more painful and bandwidth only rises to roughly 3.2 single and 6.4 dual. Its worth noting at this point that dual channel 200 MHz motherboards are rather expensive so Apple might not want to go there if it doesn't demonstrate a significant improvement -- and it may not, these numbers are rough and only for heavily bandwidth dependent algorithms.
These rough (very rough!) calcs are based on a memory transaction burst size of 32 bytes like most processors currently use. The 970 uses larger 128 byte lines so the overhead is reduced by a factor of about 4. This only helps streaming reads/writes and actually hurts random access, but random access is typically much less concerned about bandwidth, and more concerned about latency (which is addressed by sending the requested doubleword first). For bandwidth oriented algorithms, therefore, the 970's peak numbers for DDR333 may be more like 2.5 single and 5 dual. DDR400 should increase to 3.0 and 6 dual. DDR-II 400 MHz to 5.7 and 11.4 dual. There is also talk of DDR533, but who knows if that'll show up in Apple machines.
These numbers are appealing but remember that the 970 is intended for SMP applications and each gets its own bus so 1, 2, and 4 processor configurations can use 6.4, 12.8, and 25.6 GB/sec @ 1.8 GHz. The cooler 1.4 GHz chip would be more reasonable in a quad configuration and it can consume 5, 10, and 20 GB/sec. There is also a lot of other activity in the system which uses bandwidth -- by the time the 970 machines arrive they'll probably have FireWire2 (0.8 - 1.6 GB/sec), dual ATA133 (0.25 ), AGP 8x (2.1), Ethernet (0.1) and PCI 66 MHz/64-bit (0.25). Of these only the AGP really matters, but its a big one and with Quartz Extreme the use of bandwidth is pretty steadily. The others all happen in bursts, although this might be a factor depending on what you are doing (e.g. reading video from a 1394 camera while displaying it, compressing it, and writing it to the hard disk).
One thing is for sure though... these machines will be a lot faster than G4s.
[ 12-14-2002: Message edited by: Programmer ]</p>