You mean the same IBM who couldn't scale the 750FX to 1GHz?
IBM is pushing the POWER5 very hard to bring it to the market as soon as possible, jan/feb 04 seems to be the timeline now (Itanium2 is the name of the game).
There is no pressure like that for IBM with the 980. But I have no doubt we will see it in a POWERmac (I like that, thanks LBB) only a 3/4 year later.
BTW the POWER5 is claimed to be 4times as fast as a POWER4 when it was introduced. So don't expect more than SPECint 2500 ...
Prescott will arrive by Christmas at speeds of up to 3.6GHz. With a monster 1MB L2 cache at 3GHz+ and improved Hyperthreading, there's little doubt it will be the speed champ considering the dual 2.0GHz G5 has trouble keeping up with the 8-month-old 3.06GHz P4 (533MHZ FSB) on non-memory intensive tasks.
The good for Apple is that they'll have faster buses. The bad news is that Apple will still have to use the same RAM as PC manufacturers use and so memory speed will be the bottleneck. Already we have a 1GHz (effective bus) but are relegated to use the same memory Intel's 800MHz FSB motherboards use--dual channel DDR400.
I know I'm being picky, but how does a dual 2GHz G5 have "trouble keeping up"? Are you just referring to the SPEC scores? In the bake-offs, I saw that the fastest intel systems were also rans. It looks that way too on QIII framerates. Why cast a negative light towards the G5 performance?
Ya know, the guys over at Ars talk about how AltiVec was "tacked on" but I just don't get it. Yes they took the POWER4 and integrated a VMX unit into it, but in what way was it "tacked on"? All the internal busses are expanded to register widths, the AltiVec unit is fully integrated into the group dispatch mechanism, etc. The AltiVec unit in the G4 was just as tacked on to the G3 as it is onto the 970. This doesn't mean that future IBM chips won't have improved AltiVec units, but saying this about the 970 just isn't doing it justice. They are getting performance increasing linearly with clock rate, which is pretty damn good considering how impressive AltiVec performance has always been. Very few things scale linearly with clock rate.
The guys from Ars make some comment after the Keynote. He said that most of his article was true, except for altivec. An IBM engineer told him he was wrong for the dispatching between different units, wich is better than what he writed.
An update of his article have to be made. As you said the altivec unit of the PPC 970 is not crippled.
Prescott will arrive by Christmas at speeds of up to 3.6GHz. With a monster 1MB L2 cache at 3GHz+ and improved Hyperthreading, there's little doubt it will be the speed champ considering the dual 2.0GHz G5 has trouble keeping up with the 8-month-old 3.06GHz P4 (533MHZ FSB) on non-memory intensive tasks.
The good for Apple is that they'll have faster buses. The bad news is that Apple will still have to use the same RAM as PC manufacturers use and so memory speed will be the bottleneck. Already we have a 1GHz (effective bus) but are relegated to use the same memory Intel's 800MHz FSB motherboards use--dual channel DDR400.
"Monster" 1MB L2 cache. LOL. Sheesh "Prescott NI" and then "Tejas NI". With every new group of instructions Intel adds/removes they lessen the chances that a Developer will use them. Until we have "World Benchmarks" we have know Idea how the Dual 2Ghz will perform. Memory performance will only affect applications that are bound by it. There's more to an architecture than just Memory performance. I believe you will see the Dual 2Ghz G5 beat even Prescott(which isn't so exciting now that we have P2P Gigahertz memory busses on Powermacs). 1MB of caches is nice but Apple has based the G5 and a pretty fast Mobo.
Quote:
I know I'm being picky, but how does a dual 2GHz G5 have "trouble keeping up"? Are you just referring to the SPEC scores? In the bake-offs, I saw that the fastest intel systems were also rans. It looks that way too on QIII framerates. Why cast a negative light towards the G5 performance?
Existence is a Troll. Expect nothing even remotely unbiased to come from him. Why he lurks around here is beyond me.
Interesting point. At some point in the future, I would suspect we'll talk to our computers much like we talk on our cell phones. I believe the tablet is just a manifestation of how we will use computers at some point in the future when a keyboard is no longer useful. Right now the tablet isn't too useful. I'd imagine Apple is laying the framework where they would be the 1st ones to get rid of the keyboard and mouse -- as they did with the floppy disk -- and he way you'd use the computer is straight GUI, stylus, and Judy the TimeLife Operator style headsets. Bring it on!
Nope...writing a paper would suck with a headset. Think about how many minute changes you make to something 'official' that you're writing. There is no conceivable way you could do that in the headset.
"The quarterly performance chart shows...WAIT, NO, DELETE THAT...the performance for this quarter shows...NO, that's not it...Trends in the performance quarter...STRIKE THAT TOO!"
I don't think the keyboard is going anywhere anytime soon...
Actually he was being a bit pessimistic, 45% on 2GHz is 2.9GHz. It seems likely to me that if they can get that that gain from the process change, they are also likely to be able to get better yields and some process tweaks in to get to 3.0GHz.
Heh, its funny that you're basing all that deduction on my wild-assed stab at how much the improved process might affect the 970's clock rate performance. I would be very surprised if they actually achieved a 40% increase from a 0.13 -> 0.09 shrink.
Quote:
From the bare figures so far they would only be 3% off, it seems remarkably unlikely that the G5 is at top speed in its first production run (G4 went from 350-1,400, G3 has gone from 233-1,000).
The G4 from 0.35 to 1.42 represents 4 generations of G4, so by that logic we'd be at the generation after 990 (whatever they call it). The same holds for the G3 -- it is a considerably different chip than when it first arrived.
I'm getting the distinct impression that the useful information from the 9XX timeline and the concurrently relevant timelines of all things Intel are slowly devolving into bickering over specs that no one agrees on and have little to do with real-time work speed.
This discussion has taken on an unusually pessimistic tone. Let's circle back to one fact which is not in dispute: Jobs promised 3 GHz in 12 months time (i.e., Aug/Sept '04). Clearly, there is a road map, IBM and Apple are coordinating and/or cooperating on this road map, and substantial progress is expected.
Now, in the realm of informed speculation, let's remember that IBM as a rule underpromises and overdelivers. Let's also postulate that if Jobs is willing to announce 3 GHz in 12 months, he actually thinks 3 GHz is doable in 6 months, and gave himself an extra 6 months leeway just in case (and also, if things go well, setting up another mind-blowing "one more thing" for MWSF, since no one in their right mind could possibly expect 3 GHz in 6 months).
3 Ghz within 6-12 months has to be a 970, IMHO. This also strongly suggests that 2 GHz is not the top end of the .13 process. If the top end of the .13 970 is 2.5 GHz, that in turn suggests 3 GHz .09 970's for the high-end tower in January '04 (as a best case scenario).
Perhaps at that point Apple also replaces the $1299 1.25 G4 tower with a new mid-range tower using single .13 970's.
All of this develops logically from Jobs' public, unequivocal commitment to 3 GHz in 12 months. Remember all the discussion about how Apple, as a publicly traded company, would be legally obligated to disclaim the material mistakenly posted a few days prior to WWDC on its website, IF THE INFO WERE WRONG? When Apple failed to deny the truth of the "mistake," many people here correctly inferred that the specs were true. And indeed they were.
A public commitment by Jobs to 3 GHz certainly ranks higher on the "likely to result in massive lawsuits if it isn't true" scale than premature specification by a now-unemployed Apple webmaster.
It comes down to this: Jobs has to be absolutely certain he can get to 3 GHz in 12 months to make a public commitment like that.
So which scenario do you think Jobs is basing his commitment on? A 3 GHz .09 970 (a well-advertised process shrink for a shipping chip), or a 3 GHz 980 (which is still in the "gleam in IBM's eye" stage)?
Isn't the reason there's such a large L2 cache simply because Intel/AMD processors still need to decode x86 code? The larger the cache between the decoding and the processing, the less decoding that needs to happen (I'm not entirely certain it's L2... but don't they use those terms interchangably). This is what made the P4 a lot faster, I believe. Now, I'm no processor whiz, but I would imagine that these new chips would be the same way. So, the 1 Meg L2 cache is simply making up for the performance hit that x86 code brings.... I think
(Note all the uncertain terms in my post. I'm NOT SURE about it So don't tear me apart if I'm wrong )
rickag: IIRC IBM is already using a low-k dieletric process at East Fishkill....
Yes IBM is using SOI with the 970, however, it may or may not be using SiLK, I don't know. IBM has published earlier documents on SOI they were using that definitely was not SiLK.
Speculation: Even if they are currently using SiLK with the 970, I doubt they are using Porous SiLK which provides additional energy and speed benefits, which I believe would provide at least enough improvements to get an IBM970 using a 0.09µm process to 3GHz.
So which scenario do you think Jobs is basing his commitment on? A 3 GHz .09 970 (a well-advertised process shrink for a shipping chip), or a 3 GHz 980 (which is still in the "gleam in IBM's eye" stage)?
IMHO the answer is fairly obvious.
I agree -- a redesign for higher clock rates and taking full advantage of the latest process technology is certain to get them to 3 GHz. Much more likely than a 50% improvement from a mere process shrink of an existing design.
Isn't the reason there's such a large L2 cache simply because Intel/AMD processors still need to decode x86 code? The larger the cache between the decoding and the processing, the less decoding that needs to happen (I'm not entirely certain it's L2... but don't they use those terms interchangably). This is what made the P4 a lot faster, I believe. Now, I'm no processor whiz, but I would imagine that these new chips would be the same way. So, the 1 Meg L2 cache is simply making up for the performance hit that x86 code brings.... I think
(Note all the uncertain terms in my post. I'm NOT SURE about it So don't tear me apart if I'm wrong )
No, the x86 processors decode the instructions after they come from the cache. Due to its non-uniform size instructions the x86 code actually tends to be smaller than PowerPC code (of course it also tends to be slower). The P4 has an internal cache (roughly equivalent to an L1 instruction cache) of decoded instructions. The large L2 caches of the next generation processors is just the easiest way to take advantage of the extra real estate made available by the process shrink. The large caches are really just trying to make up for the large speed difference between memory and processor, which is equally true of PowerPC. I expect we'll see the 0.09 micro 970 having a larger L2 cache as well.
I don't think the keyboard is going anywhere anytime soon...
Extremely true - I heard last year, or so - that tests were done on persons who used headsets and voice recognition vs. persons who used a keyboard ... the results?
It's just not the same area of the brain that's working, you tend to get much better results when you use a keyboard, even if the voice recognition was perfect you'd still write better using a keyboard.
For some reason, using your hands to write gives a user a whole new perspective on the words they use, that voice just doesn't do.
In fact, I would be willing to bet, that if voice recognition was the norm - and had always been the norm - and somebody came along with this thing called a 'keyboard' ... the advantage of keyboarding would be so large that a large percentage of professional 'writers' would stop using their voice to write, and would start using the keyboard.
It would probably wind up being just like it is with computers ... "can ya code?" ...
checking to see if somebody's for real would amount to
hmmm...I know a few people that can type over 100 words a minute, Its going to take a lot more powerfull computer to translate that fast, if you could find someone who could talk that fast, than we will have within the next 2 years.
1. I would speculate that a mature 130 nm PPC 970 could ship at 2.5 GHz.
2. I would speculate a 1st iteration 90 nm PPC 970 could ship at 3 GHz.
3. I would speculate that a 90 nm PPC 970 could eventually ship at 3.6 GHz.
Why?
1a. The 10 stage execution pipeline Athlon XP 3200+ (Barton) is a 130 nm processor that ships at 2.2 GHz.
1b. The PPC 970 is a 14 stage execution pipeline processor. It should clock higher than the Athlon on the same process and do it by a fair amount. A 2.5 GHz PPC 970 would have about 12% more clock rate than an Athlon 3200+, well within reason.
1c. It's probably fair to say that IBM's 300 mm 130 nm wafer fab is better than AMD's 200 mm 130 nm fab (which is Motorola influenced btw), and they can do it if they and Apple want to do it. It means 20% more power consumption per processor, but very doable.
2a. 45% increase in clock rate due to a die shrink is conservative for deeply pipelined processors. Intel Willamette went from 1.3 to 2 GHz while Northwood went from 2.2 GHz to 3.2 GHz, about 60% increase. AMD's Athlon K7 went from 500 to 850 MHz at 250 nm to 0.9 to 1.6 GHz at 180 nm, an amazing 100% increase from the top-end of process to the top end of another. It's only their 130 nm fab that's sort of gone awry.
2b. Given a 2.5 GHz 130 nm PPC 970, or a 2.4 or 2.2 GHz, 3 GHz is only an increase of 20%, 25%, or 36% above the 130 nm top-end. These percentages should be doable.
3a. Given a 2.5 GHz 130 nm PPC 970 top-end, a 3.6 GHz 90 nm top-end is only 45% higher.
3b. Given 2.0, 2.2, or 2.4 GHz 130 nm PPC 970 top-end, a 3.6 GHz 90 nm top-end is 80%, 64% or a 50% increase in clock rate. All doable given process improvements.
So, if Apple ships something like a 2.4 GHz 130 nm PPC 970 machine, a very doable 400 MHz I think, in Q1 04, I think a 90 nm 3 GHz machine is in the bag.
Extremely true - I heard last year, or so - that tests were done on persons who used headsets and voice recognition vs. persons who used a keyboard ... the results?
It's just not the same area of the brain that's working, you tend to get much better results when you use a keyboard, even if the voice recognition was perfect you'd still write better using a keyboard.
My mother, who's a professional writer, types her essays but writes her fiction out longhand, because she prefers the way her prose comes out typed when she's writing essays, but she prefers the result of using a pen and paper for prose.
This is perhaps a function of my age, and perhaps a function of the fact that I grew up with a pen or pencil and paper as an almost constant feature of my childhood, but even for programming I think a lot better with a pen and a paper notebook. When it comes to actual coding I sit down at a keyboard, but everything leading up to that is done the old fashioned way. I suppose it's the same thing - my thoughts just flow differently through a pen. So I'm looking forward to robust pen input: The combination of being able to use a pen and being able to use OmniGraffle simultaneously would be too good to pass up!
My mother, who's a professional writer, types her essays but writes her fiction out longhand, because she prefers the way her prose comes out typed when she's writing essays, but she prefers the result of using a pen and paper for prose.
This is perhaps a function of my age, and perhaps a function of the fact that I grew up with a pen or pencil and paper as an almost constant feature of my childhood, but even for programming I think a lot better with a pen and a paper notebook. When it comes to actual coding I sit down at a keyboard, but everything leading up to that is done the old fashioned way. I suppose it's the same thing - my thoughts just flow differently through a pen. So I'm looking forward to robust pen input: The combination of being able to use a pen and being able to use OmniGraffle simultaneously would be too good to pass up!
Have you tried that Wacom thingy combined with Inkwell yet?
Comments
Lemon Bon Bon
This is IBM now.
You mean the same IBM who couldn't scale the 750FX to 1GHz?
IBM is pushing the POWER5 very hard to bring it to the market as soon as possible, jan/feb 04 seems to be the timeline now (Itanium2 is the name of the game).
There is no pressure like that for IBM with the 980. But I have no doubt we will see it in a POWERmac (I like that, thanks LBB) only a 3/4 year later.
BTW the POWER5 is claimed to be 4times as fast as a POWER4 when it was introduced. So don't expect more than SPECint 2500 ...
Originally posted by Existence
FYI, here's an unofficial Intel roadmap:
Prescott will arrive by Christmas at speeds of up to 3.6GHz. With a monster 1MB L2 cache at 3GHz+ and improved Hyperthreading, there's little doubt it will be the speed champ considering the dual 2.0GHz G5 has trouble keeping up with the 8-month-old 3.06GHz P4 (533MHZ FSB) on non-memory intensive tasks.
The good for Apple is that they'll have faster buses. The bad news is that Apple will still have to use the same RAM as PC manufacturers use and so memory speed will be the bottleneck. Already we have a 1GHz (effective bus) but are relegated to use the same memory Intel's 800MHz FSB motherboards use--dual channel DDR400.
I know I'm being picky, but how does a dual 2GHz G5 have "trouble keeping up"? Are you just referring to the SPEC scores? In the bake-offs, I saw that the fastest intel systems were also rans. It looks that way too on QIII framerates. Why cast a negative light towards the G5 performance?
Originally posted by Programmer
Ya know, the guys over at Ars talk about how AltiVec was "tacked on" but I just don't get it. Yes they took the POWER4 and integrated a VMX unit into it, but in what way was it "tacked on"? All the internal busses are expanded to register widths, the AltiVec unit is fully integrated into the group dispatch mechanism, etc. The AltiVec unit in the G4 was just as tacked on to the G3 as it is onto the 970. This doesn't mean that future IBM chips won't have improved AltiVec units, but saying this about the 970 just isn't doing it justice. They are getting performance increasing linearly with clock rate, which is pretty damn good considering how impressive AltiVec performance has always been. Very few things scale linearly with clock rate.
The guys from Ars make some comment after the Keynote. He said that most of his article was true, except for altivec. An IBM engineer told him he was wrong for the dispatching between different units, wich is better than what he writed.
An update of his article have to be made. As you said the altivec unit of the PPC 970 is not crippled.
Prescott will arrive by Christmas at speeds of up to 3.6GHz. With a monster 1MB L2 cache at 3GHz+ and improved Hyperthreading, there's little doubt it will be the speed champ considering the dual 2.0GHz G5 has trouble keeping up with the 8-month-old 3.06GHz P4 (533MHZ FSB) on non-memory intensive tasks.
The good for Apple is that they'll have faster buses. The bad news is that Apple will still have to use the same RAM as PC manufacturers use and so memory speed will be the bottleneck. Already we have a 1GHz (effective bus) but are relegated to use the same memory Intel's 800MHz FSB motherboards use--dual channel DDR400.
"Monster" 1MB L2 cache. LOL. Sheesh "Prescott NI" and then "Tejas NI". With every new group of instructions Intel adds/removes they lessen the chances that a Developer will use them. Until we have "World Benchmarks" we have know Idea how the Dual 2Ghz will perform. Memory performance will only affect applications that are bound by it. There's more to an architecture than just Memory performance. I believe you will see the Dual 2Ghz G5 beat even Prescott(which isn't so exciting now that we have P2P Gigahertz memory busses on Powermacs). 1MB of caches is nice but Apple has based the G5 and a pretty fast Mobo.
I know I'm being picky, but how does a dual 2GHz G5 have "trouble keeping up"? Are you just referring to the SPEC scores? In the bake-offs, I saw that the fastest intel systems were also rans. It looks that way too on QIII framerates. Why cast a negative light towards the G5 performance?
Existence is a Troll. Expect nothing even remotely unbiased to come from him. Why he lurks around here is beyond me.
Originally posted by DHagan4755
Interesting point. At some point in the future, I would suspect we'll talk to our computers much like we talk on our cell phones. I believe the tablet is just a manifestation of how we will use computers at some point in the future when a keyboard is no longer useful. Right now the tablet isn't too useful. I'd imagine Apple is laying the framework where they would be the 1st ones to get rid of the keyboard and mouse -- as they did with the floppy disk -- and he way you'd use the computer is straight GUI, stylus, and Judy the TimeLife Operator style headsets. Bring it on!
Nope...writing a paper would suck with a headset. Think about how many minute changes you make to something 'official' that you're writing. There is no conceivable way you could do that in the headset.
"The quarterly performance chart shows...WAIT, NO, DELETE THAT...the performance for this quarter shows...NO, that's not it...Trends in the performance quarter...STRIKE THAT TOO!"
I don't think the keyboard is going anywhere anytime soon...
Originally posted by Clive
Actually he was being a bit pessimistic, 45% on 2GHz is 2.9GHz. It seems likely to me that if they can get that that gain from the process change, they are also likely to be able to get better yields and some process tweaks in to get to 3.0GHz.
Heh, its funny that you're basing all that deduction on my wild-assed stab at how much the improved process might affect the 970's clock rate performance. I would be very surprised if they actually achieved a 40% increase from a 0.13 -> 0.09 shrink.
Quote:
From the bare figures so far they would only be 3% off, it seems remarkably unlikely that the G5 is at top speed in its first production run (G4 went from 350-1,400, G3 has gone from 233-1,000).
The G4 from 0.35 to 1.42 represents 4 generations of G4, so by that logic we'd be at the generation after 990 (whatever they call it). The same holds for the G3 -- it is a considerably different chip than when it first arrived.
When good threads get old....
Originally posted by Programmer
I would be very surprised if they actually achieved a 40% increase from a 0.13 -> 0.09 shrink.
But if the current process can handle 2.5 GHZ, 3 GHZ wouldn't be too big of a jump when moving from .13 to .09.
Now, in the realm of informed speculation, let's remember that IBM as a rule underpromises and overdelivers. Let's also postulate that if Jobs is willing to announce 3 GHz in 12 months, he actually thinks 3 GHz is doable in 6 months, and gave himself an extra 6 months leeway just in case (and also, if things go well, setting up another mind-blowing "one more thing" for MWSF, since no one in their right mind could possibly expect 3 GHz in 6 months).
3 Ghz within 6-12 months has to be a 970, IMHO. This also strongly suggests that 2 GHz is not the top end of the .13 process. If the top end of the .13 970 is 2.5 GHz, that in turn suggests 3 GHz .09 970's for the high-end tower in January '04 (as a best case scenario).
Perhaps at that point Apple also replaces the $1299 1.25 G4 tower with a new mid-range tower using single .13 970's.
All of this develops logically from Jobs' public, unequivocal commitment to 3 GHz in 12 months. Remember all the discussion about how Apple, as a publicly traded company, would be legally obligated to disclaim the material mistakenly posted a few days prior to WWDC on its website, IF THE INFO WERE WRONG? When Apple failed to deny the truth of the "mistake," many people here correctly inferred that the specs were true. And indeed they were.
A public commitment by Jobs to 3 GHz certainly ranks higher on the "likely to result in massive lawsuits if it isn't true" scale than premature specification by a now-unemployed Apple webmaster.
It comes down to this: Jobs has to be absolutely certain he can get to 3 GHz in 12 months to make a public commitment like that.
So which scenario do you think Jobs is basing his commitment on? A 3 GHz .09 970 (a well-advertised process shrink for a shipping chip), or a 3 GHz 980 (which is still in the "gleam in IBM's eye" stage)?
IMHO the answer is fairly obvious.
(Note all the uncertain terms in my post. I'm NOT SURE about it
Originally posted by Anonymous Karma
A few random thoughts, in no particular order:
rickag: IIRC IBM is already using a low-k dieletric process at East Fishkill....
Yes IBM is using SOI with the 970, however, it may or may not be using SiLK, I don't know. IBM has published earlier documents on SOI they were using that definitely was not SiLK.
Speculation: Even if they are currently using SiLK with the 970, I doubt they are using Porous SiLK which provides additional energy and speed benefits, which I believe would provide at least enough improvements to get an IBM970 using a 0.09µm process to 3GHz.
Wintel had it's moment ... and now it's over, there's a new king now ... get over it.
8)
Lemon Bon Bon
Originally posted by mpls244
So which scenario do you think Jobs is basing his commitment on? A 3 GHz .09 970 (a well-advertised process shrink for a shipping chip), or a 3 GHz 980 (which is still in the "gleam in IBM's eye" stage)?
IMHO the answer is fairly obvious.
I agree -- a redesign for higher clock rates and taking full advantage of the latest process technology is certain to get them to 3 GHz. Much more likely than a 50% improvement from a mere process shrink of an existing design.
Originally posted by bauman
Isn't the reason there's such a large L2 cache simply because Intel/AMD processors still need to decode x86 code? The larger the cache between the decoding and the processing, the less decoding that needs to happen (I'm not entirely certain it's L2... but don't they use those terms interchangably). This is what made the P4 a lot faster, I believe. Now, I'm no processor whiz, but I would imagine that these new chips would be the same way. So, the 1 Meg L2 cache is simply making up for the performance hit that x86 code brings.... I think
(Note all the uncertain terms in my post. I'm NOT SURE about it
No, the x86 processors decode the instructions after they come from the cache. Due to its non-uniform size instructions the x86 code actually tends to be smaller than PowerPC code (of course it also tends to be slower). The P4 has an internal cache (roughly equivalent to an L1 instruction cache) of decoded instructions. The large L2 caches of the next generation processors is just the easiest way to take advantage of the extra real estate made available by the process shrink. The large caches are really just trying to make up for the large speed difference between memory and processor, which is equally true of PowerPC. I expect we'll see the 0.09 micro 970 having a larger L2 cache as well.
Originally posted by Gizzmonic
I don't think the keyboard is going anywhere anytime soon...
Extremely true - I heard last year, or so - that tests were done on persons who used headsets and voice recognition vs. persons who used a keyboard ... the results?
It's just not the same area of the brain that's working, you tend to get much better results when you use a keyboard, even if the voice recognition was perfect you'd still write better using a keyboard.
For some reason, using your hands to write gives a user a whole new perspective on the words they use, that voice just doesn't do.
In fact, I would be willing to bet, that if voice recognition was the norm - and had always been the norm - and somebody came along with this thing called a 'keyboard' ... the advantage of keyboarding would be so large that a large percentage of professional 'writers' would stop using their voice to write, and would start using the keyboard.
It would probably wind up being just like it is with computers ... "can ya code?" ...
checking to see if somebody's for real would amount to
... "can ya QWERTY?"
'nough said
Enumeration OTsnoggin = brainCloud.objectEnumerator();
while(OTsnoggin.hasMoreElements()){
Thought anIdea = (Thought)OTsnoggin.nextElement();
// if(anIdea.relevant()){
anIdea.spewForth().usingKeyboard();
// }
}
you get the idea
2. I would speculate a 1st iteration 90 nm PPC 970 could ship at 3 GHz.
3. I would speculate that a 90 nm PPC 970 could eventually ship at 3.6 GHz.
Why?
1a. The 10 stage execution pipeline Athlon XP 3200+ (Barton) is a 130 nm processor that ships at 2.2 GHz.
1b. The PPC 970 is a 14 stage execution pipeline processor. It should clock higher than the Athlon on the same process and do it by a fair amount. A 2.5 GHz PPC 970 would have about 12% more clock rate than an Athlon 3200+, well within reason.
1c. It's probably fair to say that IBM's 300 mm 130 nm wafer fab is better than AMD's 200 mm 130 nm fab (which is Motorola influenced btw), and they can do it if they and Apple want to do it. It means 20% more power consumption per processor, but very doable.
2a. 45% increase in clock rate due to a die shrink is conservative for deeply pipelined processors. Intel Willamette went from 1.3 to 2 GHz while Northwood went from 2.2 GHz to 3.2 GHz, about 60% increase. AMD's Athlon K7 went from 500 to 850 MHz at 250 nm to 0.9 to 1.6 GHz at 180 nm, an amazing 100% increase from the top-end of process to the top end of another. It's only their 130 nm fab that's sort of gone awry.
2b. Given a 2.5 GHz 130 nm PPC 970, or a 2.4 or 2.2 GHz, 3 GHz is only an increase of 20%, 25%, or 36% above the 130 nm top-end. These percentages should be doable.
3a. Given a 2.5 GHz 130 nm PPC 970 top-end, a 3.6 GHz 90 nm top-end is only 45% higher.
3b. Given 2.0, 2.2, or 2.4 GHz 130 nm PPC 970 top-end, a 3.6 GHz 90 nm top-end is 80%, 64% or a 50% increase in clock rate. All doable given process improvements.
So, if Apple ships something like a 2.4 GHz 130 nm PPC 970 machine, a very doable 400 MHz I think, in Q1 04, I think a 90 nm 3 GHz machine is in the bag.
Originally posted by OverToasty
Extremely true - I heard last year, or so - that tests were done on persons who used headsets and voice recognition vs. persons who used a keyboard ... the results?
It's just not the same area of the brain that's working, you tend to get much better results when you use a keyboard, even if the voice recognition was perfect you'd still write better using a keyboard.
My mother, who's a professional writer, types her essays but writes her fiction out longhand, because she prefers the way her prose comes out typed when she's writing essays, but she prefers the result of using a pen and paper for prose.
This is perhaps a function of my age, and perhaps a function of the fact that I grew up with a pen or pencil and paper as an almost constant feature of my childhood, but even for programming I think a lot better with a pen and a paper notebook. When it comes to actual coding I sit down at a keyboard, but everything leading up to that is done the old fashioned way. I suppose it's the same thing - my thoughts just flow differently through a pen. So I'm looking forward to robust pen input: The combination of being able to use a pen and being able to use OmniGraffle simultaneously would be too good to pass up!
Originally posted by Amorph
My mother, who's a professional writer, types her essays but writes her fiction out longhand, because she prefers the way her prose comes out typed when she's writing essays, but she prefers the result of using a pen and paper for prose.
This is perhaps a function of my age, and perhaps a function of the fact that I grew up with a pen or pencil and paper as an almost constant feature of my childhood, but even for programming I think a lot better with a pen and a paper notebook. When it comes to actual coding I sit down at a keyboard, but everything leading up to that is done the old fashioned way. I suppose it's the same thing - my thoughts just flow differently through a pen. So I'm looking forward to robust pen input: The combination of being able to use a pen and being able to use OmniGraffle simultaneously would be too good to pass up!
Have you tried that Wacom thingy combined with Inkwell yet?