Power5

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  • Reply 101 of 106
    stoostoo Posts: 1,490member
    [quote]The nForce has 2 channels from the memory controller to the memory. It then has the standard 200-333 Mhz FSB with 1.6-2.7 GB/s to the processor plus other connections to the system. The channels are not split out in the way you are implying. <hr></blockquote>



    I forgot that the memory bus(es) do not correspong directly to the CPU's FSB <img src="embarrassed.gif" border="0"> It does make more sense this way.



    [ 02-25-2003: Message edited by: Stoo ]</p>
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  • Reply 102 of 106
    [quote]Originally posted by costique:

    <strong>

    I must be going crazy. :eek: Did you notice the present continuous tense in IBM is producing?</strong><hr></blockquote>



    Don't wet your pants too much -- that just means its already in the design stages. This should be of no surprise since the 970's design started well before the POWER4 actually hit the market. The R&D stages of processor creation take a long time. Don't expect to see the 980 before Jan 2005 would be my guess. The 970+ (i.e. 0.09 micron) should hold us over for 2004.
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  • Reply 103 of 106
    bigcbigc Posts: 1,224member
    ...to say the least.
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  • Reply 104 of 106
    kurtkurt Posts: 225member
    I know this probably isn't correct but, what is 4x the estimated spec and fp numbers of the 970? They should be pretty high.



    Is this what moki has been talking about?
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  • Reply 105 of 106
    [quote]Originally posted by Kurt:

    <strong>I know this probably isn't correct but, what is 4x the estimated spec and fp numbers of the 970? They should be pretty high.



    Is this what moki has been talking about?</strong><hr></blockquote>

    4x the Power4, not the 970 for which we have only estimates.



    [ 02-26-2003: Message edited by: Tomb of the Unknown ]</p>
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  • Reply 106 of 106
    [quote]Originally posted by Tomb of the Unknown:

    <strong>

    4x the Power4, not the 970 for which we have only estimates.

    </strong><hr></blockquote>



    Since the SPECmarks aren't multi-threaded its also not at all clear that those numbers will be improved by 4x. I'd expect that in multi-threaded real-world benchmarks (server type stuff) we'll see the claimed 4x improvement due to the multi-threaded implementation. IBM has been claiming full performance from each of the threads (unlike Intel's Hyperthreading), so that theoretically gives 2x. The rest of the improvement must come from core & cache improvements, which is actually pretty impressive since they only seem to be talking about something like a 15% clockrate boost. The 'FastPath' stuff will be responsible for some of that, which probably won't show up much in SPECmarks, so its hard to say exactly what SPECmark numbers they'll be putting out.



    I really hope SPECmark goes multi-threaded soon -- it is rapidly becoming much less relevent without it. Allowing SIMD optimizations would be nice as well, but much less likely and easily abused.
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