1. The 970 should not be called G-something. Intel have had a good string of the Pentium the pentium II the pentium III and the pentium IV. As the 601, 603 and 604 was not called G1 and G2 the G-string is much shorter only G3 and G4 and the G4 has been an utter failure for four years it is time to make a clean break!
Apple allways talked about the cuddly GUI in the pre OS X days. Now with the power of industrial strength UNIX behind the lickable GUI it would fit to call the IBM 970 just that and mention that. "IBM uses this in their unix servers costing 20 000 dollars, we will bring that to your desktop" Holzt music "the planets" playing in the background ( the theme music in the movie of 2001 by A C Clarke).
2 If Apple adopt a sort of G3 with DDR and AV they should call it somthing else than G3. With DDR and AV it is as different as the G3 was to the 603 that it was based on.
My guess is that Apple will keep the G4 for the short time it take to shrink the 970 to replace the G4 everywere.
I remember the confusion with 601 603 and 604 aviable at the same time and quite different performance at the same CPU speed partly due to the CPU partly due to bus implementation and other factors. At the time Apple was spending a lot of effort on many different motherboard and box designs and before that we had the naming maze: LC Quadra Centris, Performa and so on.
The focus of the four quadrants and the good better best was a really good idea Now the CRT iMac and the eMac and the xServer all add stuff outside that. If we add to the current G3 and G4 add a 970 and an enhanced G3 things will become as complicated as it was in 93-95 with many CPUs and names <img src="graemlins/oyvey.gif" border="0" alt="[oyvey]" />
I. Introuduce the 970 (towers then servers). Mid to late 2003
II. Shrink the 970 Introduce in new iMac and PB. While the current iBooks and lowend iMac CRT and eMac is replaced by the former iMac and PB
<strong>The PowerPC 970 comes from the IBM/POWER side of the alliance and is essentially a desktop variant of the Power4: it isn't a Power5 yet. Yes, it is not that much like the (Motorola) G4.
If you add more/better FPUs, a longer pipeline for those all important clock speeds, an SIMD unit, a RapidIO memory controller, etc.. is it still a G3?</strong><hr></blockquote>
You are equating the POWER4 to a G4 in terms of "generation". This is invalid -- the POWER4 is quite clearly a later generation of the POWER series, and its design was started from scratch after the G4 arrived on the scene. Even the POWER3 is in many ways more sophisticated than the G4. The 970 will be the first "5th generation PowerPC" because it is the first major architectural change since AltiVec was added to create the G4 (actually the 7400 -> 7450 pipeline stretch was fairly major too, but they chose to call it the G4+).
IBM has some impressive SoC technologies and their low-power 7x0 core has some important improvements. I think the potential for getting lower power performance from an IBM SoC 7x0 VMX processor is better than from the 7457-RM, and is likely to happen sooner. The Motorola processor will be faster but consume more power. This will be useful to Apple because then they have the option to use the IBM solution in the iBook, the Motorola solution in the PowerBook and consumer desktop(s), and the IBM 970 in the towers. Into the future there will likely be a steady migration of processors to lower power versions, and faster ones introduced at the top end. Apple's problems with not being able to differentiate their lineup in terms of performance will be over, and they will have two suppliers. If both Motorola and IBM adopt RapidIO (and they say they are going to), then the rest of the system is independent of the choice of processor.
<strong>... If both Motorola and IBM adopt RapidIO (and they say they are going to), then the rest of the system is independent of the choice of processor.</strong><hr></blockquote>
Which is where I keep getting "So why in the blazes will it be tough to get a memory controller?"
A RIO based L3/main memory controller w/dual RIO ports would seem to be a very straight forward 'companion chip'. The chip that's always historically been the 'northbridge', can absorb the few remaining tasks of the southbridge, and effectively absorb the whole darn thing. I'm not claiming it's 'simple', but it keeps getting labeled 'tough, tough, tough', which is just baloney.
So it's CPU-RIONorth-RIOSouth(Everything but kitchensink), where 'RIONorth' is the L3 cache + the memory controller and two RIO ports _only_. RIO's bandwidth is such that the 'RIOSouth' won't have issues... and the RIONorth would be usable by non-Apple folk. Unlike the current NB/SB, Apple would potentially have options for the RIONorth - plenty of people interested in RIO. At the _very_ least both Mot & IBM are going to provide a RIO 'companion chip'.
And a multiprocessor system could use a _three_ RIO port RIONorth... which would mean that the two CPUs have non-conflicting access to L3. Or it could stick with a two-port chip & have more of them.
Which is where I keep getting "So why in the blazes will it be tough to get a memory controller?"</strong><hr></blockquote>
I think this is just a mix up. The 7xx series will use RapidIO but the 9xx series uses a different technology that will be more difficult to design for at least initially.
What name these PPC processors go by seems to be important to many, for a variety of reasons. One important quality about the name is mostly being missed, however, thought a couple posts did allude to it. The name must make it easy for consumers to understand system requirements for the software they are buying. It must convey the logical steps in the PPC development. If we take the G3 as a starting point, there will be two processor factors to consider, beyond the clock rate. First, does it have the Velocity Engine, or AltiVec? Second, is it a 64 bit processor? There must be names for these three increments in the PPC development. The names G3, G4 and G5 do make it simple to identify the proper family for system requirements. If Apple does not like it, they can change it. Yet it needs to be easy to understand when someone is trying to figure out whether the software in the box will work well on their Mac. The name for the 970, for example, should stick with it as it goes to the 980 and 990. These will still be 64 bit processors for system requirements.
Comments
Apple allways talked about the cuddly GUI in the pre OS X days. Now with the power of industrial strength UNIX behind the lickable GUI it would fit to call the IBM 970 just that and mention that. "IBM uses this in their unix servers costing 20 000 dollars, we will bring that to your desktop" Holzt music "the planets" playing in the background ( the theme music in the movie of 2001 by A C Clarke).
2 If Apple adopt a sort of G3 with DDR and AV they should call it somthing else than G3. With DDR and AV it is as different as the G3 was to the 603 that it was based on.
My guess is that Apple will keep the G4 for the short time it take to shrink the 970 to replace the G4 everywere.
I remember the confusion with 601 603 and 604 aviable at the same time and quite different performance at the same CPU speed partly due to the CPU partly due to bus implementation and other factors. At the time Apple was spending a lot of effort on many different motherboard and box designs and before that we had the naming maze: LC Quadra Centris, Performa and so on.
The focus of the four quadrants and the good better best was a really good idea
I. Introuduce the 970 (towers then servers). Mid to late 2003
II. Shrink the 970 Introduce in new iMac and PB. While the current iBooks and lowend iMac CRT and eMac is replaced by the former iMac and PB
Early 2004
III. In due time let the 970 replace all G4s
Later 2004
<strong>The PowerPC 970 comes from the IBM/POWER side of the alliance and is essentially a desktop variant of the Power4: it isn't a Power5 yet. Yes, it is not that much like the (Motorola) G4.
If you add more/better FPUs, a longer pipeline for those all important clock speeds, an SIMD unit, a RapidIO memory controller, etc.. is it still a G3?</strong><hr></blockquote>
You are equating the POWER4 to a G4 in terms of "generation". This is invalid -- the POWER4 is quite clearly a later generation of the POWER series, and its design was started from scratch after the G4 arrived on the scene. Even the POWER3 is in many ways more sophisticated than the G4. The 970 will be the first "5th generation PowerPC" because it is the first major architectural change since AltiVec was added to create the G4 (actually the 7400 -> 7450 pipeline stretch was fairly major too, but they chose to call it the G4+).
IBM has some impressive SoC technologies and their low-power 7x0 core has some important improvements. I think the potential for getting lower power performance from an IBM SoC 7x0 VMX processor is better than from the 7457-RM, and is likely to happen sooner. The Motorola processor will be faster but consume more power. This will be useful to Apple because then they have the option to use the IBM solution in the iBook, the Motorola solution in the PowerBook and consumer desktop(s), and the IBM 970 in the towers. Into the future there will likely be a steady migration of processors to lower power versions, and faster ones introduced at the top end. Apple's problems with not being able to differentiate their lineup in terms of performance will be over, and they will have two suppliers. If both Motorola and IBM adopt RapidIO (and they say they are going to), then the rest of the system is independent of the choice of processor.
<strong>... If both Motorola and IBM adopt RapidIO (and they say they are going to), then the rest of the system is independent of the choice of processor.</strong><hr></blockquote>
Which is where I keep getting "So why in the blazes will it be tough to get a memory controller?"
A RIO based L3/main memory controller w/dual RIO ports would seem to be a very straight forward 'companion chip'. The chip that's always historically been the 'northbridge', can absorb the few remaining tasks of the southbridge, and effectively absorb the whole darn thing. I'm not claiming it's 'simple', but it keeps getting labeled 'tough, tough, tough', which is just baloney.
So it's CPU-RIONorth-RIOSouth(Everything but kitchensink), where 'RIONorth' is the L3 cache + the memory controller and two RIO ports _only_. RIO's bandwidth is such that the 'RIOSouth' won't have issues... and the RIONorth would be usable by non-Apple folk. Unlike the current NB/SB, Apple would potentially have options for the RIONorth - plenty of people interested in RIO. At the _very_ least both Mot & IBM are going to provide a RIO 'companion chip'.
And a multiprocessor system could use a _three_ RIO port RIONorth... which would mean that the two CPUs have non-conflicting access to L3. Or it could stick with a two-port chip & have more of them.
<strong>
Which is where I keep getting "So why in the blazes will it be tough to get a memory controller?"</strong><hr></blockquote>
I think this is just a mix up. The 7xx series will use RapidIO but the 9xx series uses a different technology that will be more difficult to design for at least initially.
[ 02-26-2003: Message edited by: snoopy ]</p>