power dissipation in CMOS devices is due to the capacitances. this is why power dissipation goes up as you add transistors. it doesnt matter if ur in series or parallel with the Vdd and ground. when each logic gate charges up or goes down you are going to dissipate power.
Picky, picky. I was replying to the original posting, which made this statement about resistance. Maybe its real meaning didn't get through to me, but on the surface it appears to be a misunderstanding of electrical networks. So I simply addressed the resistance issue. The original statement reads:
"Transistor count is very important as the more transistors the greater the resistance which means that you have to run the chip at a higher voltage."
Now, if you wish to be really picky, it is not capacitance that dissipates power in the form of heat, it is in fact the resistance of the CMOS device. Capacitance is what's called a reactive characteristic, which cannot produce heat. Capacitance stores energy determined by the formula 1/2 C V ^ 2. As you can see, energy doubles when you double capacitance, and energy increases by a factor of 4 when you double the voltage. Heat is produced when the CMOS device conducts, discharging the stored energy. The amount of heat produced in the CMOS device is determined by the energy that was stored.
Power is the rate at which work is done or heat produced. A higher clock rate means more of these tiny packets of heat are produced every second, and a device would have higher power dissipation. So yes, you can determine power dissipation by knowing the capacitance energy, number of capacitors and the clock rate. But it is the device's resistance which generates heat. There are also other sources such as leakage current, which add to the total dissipation.
Picky, picky. I was replying to the original posting, which made this statement about resistance. Maybe its real meaning didn't get through to me, but on the surface it appears to be a misunderstanding of electrical networks. So I simply addressed the resistance issue. The original statement reads:
"Transistor count is very important as the more transistors the greater the resistance which means that you have to run the chip at a higher voltage."
Now, if you wish to be really picky, it is not capacitance that dissipates power in the form of heat, it is in fact the resistance of the CMOS device. Capacitance is what's called a reactive characteristic, which cannot produce heat. Capacitance stores energy determined by the formula 1/2 C V ^ 2. As you can see, energy doubles when you double capacitance, and energy increases by a factor of 4 when you double the voltage. Heat is produced when the CMOS device conducts, discharging the stored energy. The amount of heat produced in the CMOS device is determined by the energy that was stored.
Power is the rate at which work is done or heat produced. A higher clock rate means more of these tiny packets of heat are produced every second, and a device would have higher power dissipation. So yes, you can determine power dissipation by knowing the capacitance energy, number of capacitors and the clock rate. But it is the device's resistance which generates heat. There are also other sources such as leakage current, which add to the total dissipation.
no, the first post seemed to be more correct than what you are talking about. The device's resistance is negligable in power dissipation. No matter what its resistance is, 1/2cv^2 will be disspated during charging and 1/2cv^2 will be disspated discharging. Its not a resistor anyways, but you can think of it of having an equivalent resistance. the power is dissipated by the CMOS device.
additional power is definitely not due to "increased current due to extra transistors" the current is defined by the process and individual transistor design characteristics.
do you even kno the point of CMOS, there is not static current, either the PMOS is off or the NMOS is off therefore there is never a conduction path between Vdd and ground. resistance is irrelevant when it comes to power dissipation
his original statement was wrong, but yours just sounded worse
no, the first post seemed to be more correct than what you are talking about. The device's resistance is negligable in power dissipation. No matter what its resistance is, 1/2cv^2 will be disspated during charging and 1/2cv^2 will be disspated discharging. Its not a resistor anyways, but you can think of it of having an equivalent resistance. the power is dissipated by the CMOS device.
additional power is definitely not due to "increased current due to extra transistors" the current is defined by the process and individual transistor design characteristics.
do you even kno the point of CMOS, there is not static current, either the PMOS is off or the NMOS is off therefore there is never a conduction path between Vdd and ground. resistance is irrelevant when it comes to power dissipation
his original statement was wrong, but yours just sounded worse
The 1/2 CV ^ 2 energy will be dissipated as heat when the discharging (and charging) current flows through the CMOS's resistance. You are correct that it make no difference exactly what this resistance actually is. A higher resistance will discharge (and charge) the capacitor more slowly and dissipate lower power for a longer period of time, than a lower resistance. The heat packet produced by each discharge (and charge) will be the same for both the lower and higher resistance device. The heat packet is simply the energy stored by the capacitance converted to heat in the CMOS "resistance." This heat packet is produced by each switching device, and each device has an overall power dissipation depending on clock rate, or how rapidly these heat packets occur.
Not sure how you figure the number of transistors don't matter. Each one contributes to the current required by the processor.
The 1/2 CV ^ 2 energy will be dissipated as heat when the discharging (and charging) current flows through the CMOS's resistance. You are correct that it make no difference exactly what this resistance actually is. A higher resistance will discharge (and charge) the capacitor more slowly and dissipate lower power for a longer period of time, than a lower resistance. The heat packet produced by each discharge (and charge) will be the same for both the lower and higher resistance device. The heat packet is simply the energy stored by the capacitance converted to heat in the CMOS "resistance." This heat packet is produced by each switching device, and each device has an overall power dissipation depending on clock rate, or how rapidly these heat packets occur.
Not sure how you figure the number of transistors don't matter. Each one contributes to the current required by the processor.
u kno, u dont have to repeat what any fifth grader knows. also, dont attempt to correct people and looking like an idiot yourself. i never said the # of transistors dont increase power dissipation. its just that there is negligable static current in a CMOS chip and you dont appear to get that. There is no power dissipation unless a gate switches from high to low or low to high. each time it switches, the power dissipated is proportional to the load capacitance and the voltage^2. With more transistors, you just have more of these gates and more are switching. therefore when you add up more of these CV^2 shit, you get more power dissipated. CMOS devices dont require current to be on. Even if all the gates are at high voltage, there is no power dissipated. power is only dissipated during the switching.
I disagree with the statements that the G5 at current speeds only moves us to performance parity with PCs. That's only true running currently available software. Once we have software which takes advantage of the G5, we will move rapidly ahead of the price-competitive PC hardware.
Now, the PC world is getting new processors too, the Athlon64 and the Opteron. But while these processors are a big performance step, they're not boosting the performance of the PC mainstream yet, because the mainstream has not yet moved to Linux.
Now, the PC world is getting new processors too, the Athlon64 and the Opteron. But while these processors are a big performance step, they're not boosting the performance of the PC mainstream yet, because the mainstream has not yet moved to Linux.
Err.. how cannot newer/faster processors boost performance on Windows?
That is a good solid question, so here are my thoughts.
What is differrent this time around is MAC OS/X. Now some may laugh at that but a couple things come into play. First classic Mac OS was not suitable for high performance computing in any form. Unix,which is more or less what Mac OS/X is, has always been accepted in that realm.
Both the vector units and the floating point units have significant advantages relative to some other processors that could fill the high performance role. This is a realtively new reality but even now it is not a significant performance advantage and Apple has never really had a significant perfromance advantage. The trick is to mary these execution units with faster processors. So that the performance advantge is clear and undeniable by the industry.
Lastly there is a much greater concern in the computing communitiy over Microsofts huge corner of the market. Some purchase will be directed to other vendors just to avoid the hassle of working with a business that always has you at a disadvantage.
Thanks
Dave
Quote:
Originally posted by Snowster
I'm not going to comment on the "twisted marketing practices" you mention, but what makes you think a lead in performance would open new markets? Apple has had the lead in performance before and it didn't really help them that way at that time. Such a performance lead would stop some businesses (which need the fastest machines) going to wintel, but would it really open new markets for Apple? I doubt it.
Well that is one possilbe reality, but there has been IBM documentation floating around indicating that the processors would run at 2.5 GHz. Maybe that was projection on IBM's part, I don't know, I do know that there does not seem to be a supply issue with the 2GHz models.
Dave
Quote:
Originally posted by kupan787
All rumors were pointing to 1.8GHz at the top. Apple released 2.0GHz. If anyhting, Apple was pushing the limits of what IBM was giving them.
What, if anything, makes you think Apple held back, or could have even held back here?
Well I don't know how one can disagree with that statement, the G5 gives very mixed results but it in the end never shows a commanding lead. This is rather a shame as Apple cound have had that commanding lead buy adding a couple hundred MHz to each machine.
The peroformance of the software is a poor refuge. Some of the optimizing compilers becoming available produce code with performance increases on the G4 also. The probelm is by the time the compilers and the resulting software they produce are in wide circulation, the intel world will have moved to another generation of machines.
Now I love Linux too, but what does that have to do with the performance of the Opteron or the Athlon64? The opterons and the Athlon64 show performance increase on 32 bit code also, Windows doesn't need to be 64 bit to work with these processors.
Thanks
Dave
Quote:
Originally posted by cubist
I disagree with the statements that the G5 at current speeds only moves us to performance parity with PCs. That's only true running currently available software. Once we have software which takes advantage of the G5, we will move rapidly ahead of the price-competitive PC hardware.
Now, the PC world is getting new processors too, the Athlon64 and the Opteron. But while these processors are a big performance step, they're not boosting the performance of the PC mainstream yet, because the mainstream has not yet moved to Linux.
The peroformance of the software is a poor refuge. Some of the optimizing compilers becoming available produce code with performance increases on the G4 also. The probelm is by the time the compilers and the resulting software they produce are in wide circulation, the intel world will have moved to another generation of machines.
Thanks
Dave
some of the optimizaition use for G4 produce really shit code for G5
The last Pro App update was pleasing for those running FCP 4. It shows the G5 is still untapped. Apple/IBM have to bust their arses to get their compiler tech up to the point where the G5 is running at peak proficiency. Even as of TODAY the fastest computer UI i've seen is BeOS running on a "lowly" 603e processor.
Yes by all means give me a Dual 2.6Ghz G4 Powermac but also give me software that sings on the G5. 2004 needs to be the year in which Apples Software now rises to the challenge.
Well that is one possilbe reality, but there has been IBM documentation floating around indicating that the processors would run at 2.5 GHz. Maybe that was projection on IBM's part, I don't know, I do know that there does not seem to be a supply issue with the 2GHz models.
Dave
If IBM had 2.5GHz 970's, why would they not be using them in their own 970 based setups?
Your whole idea behind the fact that Apple held back, is based on a PDF on a German (it was german, right) IBM site that supposedly IBM had fabed some 2.5GHz parts. Even if this was true, how much would you want to bet that it was some small number (like 1 or less per wafer), and it was by no means enough to produce any kind of a machine around?
At the MPF, IBM anounded "up to" 1.8GHz. When Apple came out with teh dual 2.0GHz, every one was surprised.
when will there be a 4 ghz g5 chip? I know a dual 3 is coming in 04...so a dual 4 ghz by 05? Or are there limits to G5 mhz?
Don't count on a 4GHz G5, it could probably scale that far on 65nm, but don't be sure they will. You will probably see a 4GHz G6 with architectural improvements instead :-)
u kno, u dont have to repeat what any fifth grader knows. also, dont attempt to correct people and looking like an idiot yourself. i never said the # of transistors dont increase power dissipation. its just that there is negligable static current in a CMOS chip and you dont appear to get that. There is no power dissipation unless a gate switches from high to low or low to high. each time it switches, the power dissipated is proportional to the load capacitance and the voltage^2. With more transistors, you just have more of these gates and more are switching. therefore when you add up more of these CV^2 shit, you get more power dissipated. CMOS devices dont require current to be on. Even if all the gates are at high voltage, there is no power dissipated. power is only dissipated during the switching.
Easy there! Sorry if I offended you, which was not my intention. However, you did make a statement that appeared flat out wrong, and I pointed it out so you might clarify what you mean. I did not intend to declare war. You said, quote:
"additional power is definitely not due to "increased current due to extra transistors" the current is defined by the process and individual transistor design characteristics."
The fact is that power dissipation is indeed the result of switching current flowing through resistance of each CMOS transistor, plus some leakage current. Adding transistors adds more switching currents and results in higher power dissipation.
After reading your latest reply above, it appears you may not understand electrical network basics, and are having difficulty understanding what I said. Maybe you don't see the relationship between energy in the capacitance, and current. It is current that charges and discharges the capacitance and it is often called the switching current. Current flowing through the transistor's resistance produces heat. That is the bottom line, so to speak. So where does the energy formula 1/2 CV ^ 2 fit in? This is very important and useful to calculate just how much heat is produced. This is the energy that is dissipated as heat during switching. This formula tells us how much energy is stored. However, when it switches, the actual conversion of this energy to heat takes place as a current pulse passes through the resistance of the CMOS transistor.
Easy there! Sorry if I offended you, which was not my intention. However, you did make a statement that appeared flat out wrong, and I pointed it out so you might clarify what you mean. I did not intend to declare war. You said, quote:
"additional power is definitely not due to "increased current due to extra transistors" the current is defined by the process and individual transistor design characteristics."
The fact is that power dissipation is indeed the result of switching current flowing through resistance of each CMOS transistor, plus some leakage current. Adding transistors adds more switching currents and results in higher power dissipation.
After reading your latest reply above, it appears you may not understand electrical network basics, and are having difficulty understanding what I said. Maybe you don't see the relationship between energy in the capacitance, and current. It is current that charges and discharges the capacitance and it is often called the switching current. Current flowing through the transistor's resistance produces heat. That is the bottom line, so to speak. So where does the energy formula 1/2 CV ^ 2 fit in? This is very important and useful to calculate just how much heat is produced. This is the energy that is dissipated as heat during switching. This formula tells us how much energy is stored. However, when it switches, the actual conversion of this energy to heat takes place as a current pulse passes through the resistance of the CMOS transistor.
heh i think it is you who don't understand. when u were replying to the guy before, you said that since the transistors are in parallel so the resistance is lower but then the currents are higher. if you ever take an EE course you know you never analyze the CMOS that way. power dissipation is equal to CV^2 * frequency * number of transistors * probability that the transistor will switch.
what i meant in the above statement is the current in each transistor does not change due to the increased # of transistors. of course the average current in the whole circuit flowing at one time will increase, and that is necessary for obvious reasons(eh the power's gone up).
power dissipation is simply energy/time. you dont need to specify that its a current or a resistor. There is power absorbed or given anytime when you run a current through a voltage drop and when all the charges flow through, you are going to get power dissipated and u may say that it is an equivalent resistance. in fact, the resistance of transistors is voltage-dependent so its always chanigng. Its more accurate to just say that the power is dissipated through the transistor.
The conversion of energy is CV^2, not 1/2CV^2 for every switching cycle. This is how it goes: CMOS contains of at least two transistors. There are two kinds PMOS used for the pull up network and NMOS used for the pull down network. When you switch from low to high, 1/2CV^2 is stored dissipated in the PMOS transistors. and the 1/2CV^2 is stored in the capacitor. When you switch back to low, the capacitor discharges its 1/2CV^2 through the NMOS transistors.
Increased switching current has nothing to do with the parallel orientation of CMOS devices lowering the overall resistance, as you seemed to imply in your first post.
I dont think you really understand this stuff. go read a book.
If IBM had 2.5GHz 970's, why would they not be using them in their own 970 based setups?
Your whole idea behind the fact that Apple held back, is based on a PDF on a German (it was german, right) IBM site that supposedly IBM had fabed some 2.5GHz parts. Even if this was true, how much would you want to bet that it was some small number (like 1 or less per wafer), and it was by no means enough to produce any kind of a machine around?
Well it's not just the info from the German pdf that tells you this, it's allso the fact that IBM representetives went over and met Chinese goverment officials and claimed that they could produce 2.5 Ghz 970 processors, on the 130nm process.
These processors, however, have got lower yields then the 2Ghz and they produce close to 100 Watts of heat. Apple, me thinks, did not choose the 2.5 because they thought that the 2.0 was/is good enough. Good enough to substantiate the PR claims about the Power Mac being the fastest personal computer in the world, and this without having to deal with the problems that the 2.5 poses in terms of heat and low yields.
Well it's not just the info from the German pdf that tells you this, it's allso the fact that IBM representetives went over and met Chinese goverment officials and claimed that they could produce 2.5 Ghz 970 processors, on the 130nm process.
These processors, however, have got lower yields then the 2Ghz and they produce close to 100 Watts of heat. Apple, me thinks, did not choose the 2.5 because they thought that the 2.0 was/is good enough. Good enough to substantiate the PR claims about the Power Mac being the fastest personal computer in the world, and this without having to deal with the problems that the 2.5 poses in terms of heat and low yields.
Apple sells units in the hundreds of thousands. They simply could not meet the demand if they went with the lower yield speeds. They will always skip the leading edge speeds available because they need serious volume (unless they come out with a high end workstation and price it accordingly).
Comments
Originally posted by Nr9
er?!??! how about no?
power dissipation in CMOS devices is due to the capacitances. this is why power dissipation goes up as you add transistors. it doesnt matter if ur in series or parallel with the Vdd and ground. when each logic gate charges up or goes down you are going to dissipate power.
Picky, picky. I was replying to the original posting, which made this statement about resistance. Maybe its real meaning didn't get through to me, but on the surface it appears to be a misunderstanding of electrical networks. So I simply addressed the resistance issue. The original statement reads:
"Transistor count is very important as the more transistors the greater the resistance which means that you have to run the chip at a higher voltage."
Now, if you wish to be really picky, it is not capacitance that dissipates power in the form of heat, it is in fact the resistance of the CMOS device. Capacitance is what's called a reactive characteristic, which cannot produce heat. Capacitance stores energy determined by the formula 1/2 C V ^ 2. As you can see, energy doubles when you double capacitance, and energy increases by a factor of 4 when you double the voltage. Heat is produced when the CMOS device conducts, discharging the stored energy. The amount of heat produced in the CMOS device is determined by the energy that was stored.
Power is the rate at which work is done or heat produced. A higher clock rate means more of these tiny packets of heat are produced every second, and a device would have higher power dissipation. So yes, you can determine power dissipation by knowing the capacitance energy, number of capacitors and the clock rate. But it is the device's resistance which generates heat. There are also other sources such as leakage current, which add to the total dissipation.
Originally posted by snoopy
Picky, picky. I was replying to the original posting, which made this statement about resistance. Maybe its real meaning didn't get through to me, but on the surface it appears to be a misunderstanding of electrical networks. So I simply addressed the resistance issue. The original statement reads:
"Transistor count is very important as the more transistors the greater the resistance which means that you have to run the chip at a higher voltage."
Now, if you wish to be really picky, it is not capacitance that dissipates power in the form of heat, it is in fact the resistance of the CMOS device. Capacitance is what's called a reactive characteristic, which cannot produce heat. Capacitance stores energy determined by the formula 1/2 C V ^ 2. As you can see, energy doubles when you double capacitance, and energy increases by a factor of 4 when you double the voltage. Heat is produced when the CMOS device conducts, discharging the stored energy. The amount of heat produced in the CMOS device is determined by the energy that was stored.
Power is the rate at which work is done or heat produced. A higher clock rate means more of these tiny packets of heat are produced every second, and a device would have higher power dissipation. So yes, you can determine power dissipation by knowing the capacitance energy, number of capacitors and the clock rate. But it is the device's resistance which generates heat. There are also other sources such as leakage current, which add to the total dissipation.
no, the first post seemed to be more correct than what you are talking about. The device's resistance is negligable in power dissipation. No matter what its resistance is, 1/2cv^2 will be disspated during charging and 1/2cv^2 will be disspated discharging. Its not a resistor anyways, but you can think of it of having an equivalent resistance. the power is dissipated by the CMOS device.
additional power is definitely not due to "increased current due to extra transistors" the current is defined by the process and individual transistor design characteristics.
do you even kno the point of CMOS, there is not static current, either the PMOS is off or the NMOS is off therefore there is never a conduction path between Vdd and ground. resistance is irrelevant when it comes to power dissipation
his original statement was wrong, but yours just sounded worse
Originally posted by Nr9
no, the first post seemed to be more correct than what you are talking about. The device's resistance is negligable in power dissipation. No matter what its resistance is, 1/2cv^2 will be disspated during charging and 1/2cv^2 will be disspated discharging. Its not a resistor anyways, but you can think of it of having an equivalent resistance. the power is dissipated by the CMOS device.
additional power is definitely not due to "increased current due to extra transistors" the current is defined by the process and individual transistor design characteristics.
do you even kno the point of CMOS, there is not static current, either the PMOS is off or the NMOS is off therefore there is never a conduction path between Vdd and ground. resistance is irrelevant when it comes to power dissipation
his original statement was wrong, but yours just sounded worse
The 1/2 CV ^ 2 energy will be dissipated as heat when the discharging (and charging) current flows through the CMOS's resistance. You are correct that it make no difference exactly what this resistance actually is. A higher resistance will discharge (and charge) the capacitor more slowly and dissipate lower power for a longer period of time, than a lower resistance. The heat packet produced by each discharge (and charge) will be the same for both the lower and higher resistance device. The heat packet is simply the energy stored by the capacitance converted to heat in the CMOS "resistance." This heat packet is produced by each switching device, and each device has an overall power dissipation depending on clock rate, or how rapidly these heat packets occur.
Not sure how you figure the number of transistors don't matter. Each one contributes to the current required by the processor.
Originally posted by snoopy
The 1/2 CV ^ 2 energy will be dissipated as heat when the discharging (and charging) current flows through the CMOS's resistance. You are correct that it make no difference exactly what this resistance actually is. A higher resistance will discharge (and charge) the capacitor more slowly and dissipate lower power for a longer period of time, than a lower resistance. The heat packet produced by each discharge (and charge) will be the same for both the lower and higher resistance device. The heat packet is simply the energy stored by the capacitance converted to heat in the CMOS "resistance." This heat packet is produced by each switching device, and each device has an overall power dissipation depending on clock rate, or how rapidly these heat packets occur.
Not sure how you figure the number of transistors don't matter. Each one contributes to the current required by the processor.
u kno, u dont have to repeat what any fifth grader knows. also, dont attempt to correct people and looking like an idiot yourself. i never said the # of transistors dont increase power dissipation. its just that there is negligable static current in a CMOS chip and you dont appear to get that. There is no power dissipation unless a gate switches from high to low or low to high. each time it switches, the power dissipated is proportional to the load capacitance and the voltage^2. With more transistors, you just have more of these gates and more are switching. therefore when you add up more of these CV^2 shit, you get more power dissipated. CMOS devices dont require current to be on. Even if all the gates are at high voltage, there is no power dissipated. power is only dissipated during the switching.
http://www.amazon.com/exec/obidos/tg...books&n=507846
actually a lot of its available online but u'll have to look hard to find. im not going to violate the copyright by posting a link.
Now, the PC world is getting new processors too, the Athlon64 and the Opteron. But while these processors are a big performance step, they're not boosting the performance of the PC mainstream yet, because the mainstream has not yet moved to Linux.
Originally posted by cubist
Now, the PC world is getting new processors too, the Athlon64 and the Opteron. But while these processors are a big performance step, they're not boosting the performance of the PC mainstream yet, because the mainstream has not yet moved to Linux.
Err.. how cannot newer/faster processors boost performance on Windows?
That is a good solid question, so here are my thoughts.
What is differrent this time around is MAC OS/X. Now some may laugh at that but a couple things come into play. First classic Mac OS was not suitable for high performance computing in any form. Unix,which is more or less what Mac OS/X is, has always been accepted in that realm.
Both the vector units and the floating point units have significant advantages relative to some other processors that could fill the high performance role. This is a realtively new reality but even now it is not a significant performance advantage and Apple has never really had a significant perfromance advantage. The trick is to mary these execution units with faster processors. So that the performance advantge is clear and undeniable by the industry.
Lastly there is a much greater concern in the computing communitiy over Microsofts huge corner of the market. Some purchase will be directed to other vendors just to avoid the hassle of working with a business that always has you at a disadvantage.
Thanks
Dave
Originally posted by Snowster
I'm not going to comment on the "twisted marketing practices" you mention, but what makes you think a lead in performance would open new markets? Apple has had the lead in performance before and it didn't really help them that way at that time. Such a performance lead would stop some businesses (which need the fastest machines) going to wintel, but would it really open new markets for Apple? I doubt it.
-Snowster
Dave
Originally posted by kupan787
All rumors were pointing to 1.8GHz at the top. Apple released 2.0GHz. If anyhting, Apple was pushing the limits of what IBM was giving them.
What, if anything, makes you think Apple held back, or could have even held back here?
The peroformance of the software is a poor refuge. Some of the optimizing compilers becoming available produce code with performance increases on the G4 also. The probelm is by the time the compilers and the resulting software they produce are in wide circulation, the intel world will have moved to another generation of machines.
Now I love Linux too, but what does that have to do with the performance of the Opteron or the Athlon64? The opterons and the Athlon64 show performance increase on 32 bit code also, Windows doesn't need to be 64 bit to work with these processors.
Thanks
Dave
Originally posted by cubist
I disagree with the statements that the G5 at current speeds only moves us to performance parity with PCs. That's only true running currently available software. Once we have software which takes advantage of the G5, we will move rapidly ahead of the price-competitive PC hardware.
Now, the PC world is getting new processors too, the Athlon64 and the Opteron. But while these processors are a big performance step, they're not boosting the performance of the PC mainstream yet, because the mainstream has not yet moved to Linux.
Originally posted by wizard69
The peroformance of the software is a poor refuge. Some of the optimizing compilers becoming available produce code with performance increases on the G4 also. The probelm is by the time the compilers and the resulting software they produce are in wide circulation, the intel world will have moved to another generation of machines.
Thanks
Dave
some of the optimizaition use for G4 produce really shit code for G5
Yes by all means give me a Dual 2.6Ghz G4 Powermac but also give me software that sings on the G5. 2004 needs to be the year in which Apples Software now rises to the challenge.
Originally posted by wizard69
Well that is one possilbe reality, but there has been IBM documentation floating around indicating that the processors would run at 2.5 GHz. Maybe that was projection on IBM's part, I don't know, I do know that there does not seem to be a supply issue with the 2GHz models.
Dave
If IBM had 2.5GHz 970's, why would they not be using them in their own 970 based setups?
Your whole idea behind the fact that Apple held back, is based on a PDF on a German (it was german, right) IBM site that supposedly IBM had fabed some 2.5GHz parts. Even if this was true, how much would you want to bet that it was some small number (like 1 or less per wafer), and it was by no means enough to produce any kind of a machine around?
At the MPF, IBM anounded "up to" 1.8GHz. When Apple came out with teh dual 2.0GHz, every one was surprised.
when will there be a 4 ghz g5 chip? I know a dual 3 is coming in 04...so a dual 4 ghz by 05? Or are there limits to G5 mhz?
Originally posted by NYCFarmboy1
Just out of curiosty:
when will there be a 4 ghz g5 chip? I know a dual 3 is coming in 04...so a dual 4 ghz by 05? Or are there limits to G5 mhz?
Don't count on a 4GHz G5, it could probably scale that far on 65nm, but don't be sure they will. You will probably see a 4GHz G6 with architectural improvements instead :-)
Should come at summer 2005.
Originally posted by Nr9
u kno, u dont have to repeat what any fifth grader knows. also, dont attempt to correct people and looking like an idiot yourself. i never said the # of transistors dont increase power dissipation. its just that there is negligable static current in a CMOS chip and you dont appear to get that. There is no power dissipation unless a gate switches from high to low or low to high. each time it switches, the power dissipated is proportional to the load capacitance and the voltage^2. With more transistors, you just have more of these gates and more are switching. therefore when you add up more of these CV^2 shit, you get more power dissipated. CMOS devices dont require current to be on. Even if all the gates are at high voltage, there is no power dissipated. power is only dissipated during the switching.
Easy there! Sorry if I offended you, which was not my intention. However, you did make a statement that appeared flat out wrong, and I pointed it out so you might clarify what you mean. I did not intend to declare war. You said, quote:
"additional power is definitely not due to "increased current due to extra transistors" the current is defined by the process and individual transistor design characteristics."
The fact is that power dissipation is indeed the result of switching current flowing through resistance of each CMOS transistor, plus some leakage current. Adding transistors adds more switching currents and results in higher power dissipation.
After reading your latest reply above, it appears you may not understand electrical network basics, and are having difficulty understanding what I said. Maybe you don't see the relationship between energy in the capacitance, and current. It is current that charges and discharges the capacitance and it is often called the switching current. Current flowing through the transistor's resistance produces heat. That is the bottom line, so to speak. So where does the energy formula 1/2 CV ^ 2 fit in? This is very important and useful to calculate just how much heat is produced. This is the energy that is dissipated as heat during switching. This formula tells us how much energy is stored. However, when it switches, the actual conversion of this energy to heat takes place as a current pulse passes through the resistance of the CMOS transistor.
Originally posted by snoopy
Easy there! Sorry if I offended you, which was not my intention. However, you did make a statement that appeared flat out wrong, and I pointed it out so you might clarify what you mean. I did not intend to declare war. You said, quote:
"additional power is definitely not due to "increased current due to extra transistors" the current is defined by the process and individual transistor design characteristics."
The fact is that power dissipation is indeed the result of switching current flowing through resistance of each CMOS transistor, plus some leakage current. Adding transistors adds more switching currents and results in higher power dissipation.
After reading your latest reply above, it appears you may not understand electrical network basics, and are having difficulty understanding what I said. Maybe you don't see the relationship between energy in the capacitance, and current. It is current that charges and discharges the capacitance and it is often called the switching current. Current flowing through the transistor's resistance produces heat. That is the bottom line, so to speak. So where does the energy formula 1/2 CV ^ 2 fit in? This is very important and useful to calculate just how much heat is produced. This is the energy that is dissipated as heat during switching. This formula tells us how much energy is stored. However, when it switches, the actual conversion of this energy to heat takes place as a current pulse passes through the resistance of the CMOS transistor.
heh i think it is you who don't understand. when u were replying to the guy before, you said that since the transistors are in parallel so the resistance is lower but then the currents are higher. if you ever take an EE course you know you never analyze the CMOS that way. power dissipation is equal to CV^2 * frequency * number of transistors * probability that the transistor will switch.
what i meant in the above statement is the current in each transistor does not change due to the increased # of transistors. of course the average current in the whole circuit flowing at one time will increase, and that is necessary for obvious reasons(eh the power's gone up).
power dissipation is simply energy/time. you dont need to specify that its a current or a resistor. There is power absorbed or given anytime when you run a current through a voltage drop and when all the charges flow through, you are going to get power dissipated and u may say that it is an equivalent resistance. in fact, the resistance of transistors is voltage-dependent so its always chanigng. Its more accurate to just say that the power is dissipated through the transistor.
The conversion of energy is CV^2, not 1/2CV^2 for every switching cycle. This is how it goes: CMOS contains of at least two transistors. There are two kinds PMOS used for the pull up network and NMOS used for the pull down network. When you switch from low to high, 1/2CV^2 is stored dissipated in the PMOS transistors. and the 1/2CV^2 is stored in the capacitor. When you switch back to low, the capacitor discharges its 1/2CV^2 through the NMOS transistors.
Increased switching current has nothing to do with the parallel orientation of CMOS devices lowering the overall resistance, as you seemed to imply in your first post.
I dont think you really understand this stuff. go read a book.
Originally posted by kupan787
If IBM had 2.5GHz 970's, why would they not be using them in their own 970 based setups?
Your whole idea behind the fact that Apple held back, is based on a PDF on a German (it was german, right) IBM site that supposedly IBM had fabed some 2.5GHz parts. Even if this was true, how much would you want to bet that it was some small number (like 1 or less per wafer), and it was by no means enough to produce any kind of a machine around?
Well it's not just the info from the German pdf that tells you this, it's allso the fact that IBM representetives went over and met Chinese goverment officials and claimed that they could produce 2.5 Ghz 970 processors, on the 130nm process.
These processors, however, have got lower yields then the 2Ghz and they produce close to 100 Watts of heat. Apple, me thinks, did not choose the 2.5 because they thought that the 2.0 was/is good enough. Good enough to substantiate the PR claims about the Power Mac being the fastest personal computer in the world, and this without having to deal with the problems that the 2.5 poses in terms of heat and low yields.
Originally posted by Eric_Z
Well it's not just the info from the German pdf that tells you this, it's allso the fact that IBM representetives went over and met Chinese goverment officials and claimed that they could produce 2.5 Ghz 970 processors, on the 130nm process.
These processors, however, have got lower yields then the 2Ghz and they produce close to 100 Watts of heat. Apple, me thinks, did not choose the 2.5 because they thought that the 2.0 was/is good enough. Good enough to substantiate the PR claims about the Power Mac being the fastest personal computer in the world, and this without having to deal with the problems that the 2.5 poses in terms of heat and low yields.
Apple sells units in the hundreds of thousands. They simply could not meet the demand if they went with the lower yield speeds. They will always skip the leading edge speeds available because they need serious volume (unless they come out with a high end workstation and price it accordingly).